8268174: Move x86-specific stub declarations into stubRoutines_x86.hpp

Reviewed-by: kvn
This commit is contained in:
Vladimir Ivanov 2021-06-04 10:55:21 +00:00
parent 3025f05970
commit 069f180a85
16 changed files with 79 additions and 84 deletions

@ -1582,10 +1582,10 @@ void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) {
__ cvttsd2sil(dest->as_register(), src->as_xmm_double_reg());
} else {
assert(src->fpu() == 0, "input must be on TOS");
__ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_trunc()));
__ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_trunc()));
__ fist_s(Address(rsp, 0));
__ movl(dest->as_register(), Address(rsp, 0));
__ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
__ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
}
// IA32 conversion instructions do not match JLS for overflow, underflow and NaN -> fixup in stub
assert(op->stub() != NULL, "stub required");

@ -444,7 +444,7 @@ void C1_MacroAssembler::save_live_registers_no_oop_map(bool save_fpu_registers)
#ifdef ASSERT
Label ok;
__ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
__ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::x86::fpu_cntrl_wrd_std());
__ jccb(Assembler::equal, ok);
__ stop("corrupted control word detected");
__ bind(ok);
@ -454,7 +454,7 @@ void C1_MacroAssembler::save_live_registers_no_oop_map(bool save_fpu_registers)
// since fstp_d can cause FPU stack underflow exceptions. Write it
// into the on stack copy and then reload that to make sure that the
// current and future values are correct.
__ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
__ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::x86::fpu_cntrl_wrd_std());
__ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
// Save the FPU registers in de-opt-able form

@ -4580,7 +4580,7 @@ static bool _verify_FPU(int stack_depth, char* s, CPU_State* state) {
return true; // All other stack states do not matter
}
assert((fs->_control_word._value & 0xffff) == StubRoutines::_fpu_cntrl_wrd_std,
assert((fs->_control_word._value & 0xffff) == StubRoutines::x86::fpu_cntrl_wrd_std(),
"bad FPU control word");
// compute stack depth
@ -4646,7 +4646,7 @@ void MacroAssembler::restore_cpu_control_state_after_jni() {
// or verify that it wasn't changed (with -Xcheck:jni flag).
if (VM_Version::supports_sse()) {
if (RestoreMXCSROnJNICalls) {
ldmxcsr(ExternalAddress(StubRoutines::addr_mxcsr_std()));
ldmxcsr(ExternalAddress(StubRoutines::x86::addr_mxcsr_std()));
} else if (CheckJNICalls) {
call(RuntimeAddress(StubRoutines::x86::verify_mxcsr_entry()));
}
@ -5167,7 +5167,7 @@ void MacroAssembler::verified_entry(int framesize, int stack_bang_size, bool fp_
#ifndef _LP64
// If method sets FPU control word do it now
if (fp_mode_24b) {
fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_24()));
fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_24()));
}
if (UseSSE >= 2 && VerifyFPU) {
verify_FPU(0, "FPU stack must be clean on entry");

@ -175,7 +175,7 @@ OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_
#ifdef ASSERT
// Make sure the control word has the expected value
Label ok;
__ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
__ cmpw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std());
__ jccb(Assembler::equal, ok);
__ stop("corrupted control word detected");
__ bind(ok);
@ -185,14 +185,14 @@ OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_
// since fstp_d can cause FPU stack underflow exceptions. Write it
// into the on stack copy and then reload that to make sure that the
// current and future values are correct.
__ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
__ movw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std());
}
__ frstor(Address(rsp, 0));
if (!verify_fpu) {
// Set the control word so that exceptions are masked for the
// following code.
__ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
__ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
}
int off = st0_off;
@ -1937,7 +1937,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
if (AlwaysRestoreFPU) {
// Make sure the control word is correct.
__ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
__ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
}
// check for safepoint operation in progress and/or pending suspend requests
@ -2416,7 +2416,7 @@ void SharedRuntime::generate_deopt_blob() {
// Non standard control word may be leaked out through a safepoint blob, and we can
// deopt at a poll point with the non standard control word. However, we should make
// sure the control word is correct after restore_result_registers.
__ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
__ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
// All of the register save area has been popped of the stack. Only the
// return address remains.

@ -162,7 +162,7 @@ class StubGenerator: public StubCodeGenerator {
__ stmxcsr(mxcsr_save);
__ movl(rax, mxcsr_save);
__ andl(rax, MXCSR_MASK); // Only check control and mask bits
ExternalAddress mxcsr_std(StubRoutines::addr_mxcsr_std());
ExternalAddress mxcsr_std(StubRoutines::x86::addr_mxcsr_std());
__ cmp32(rax, mxcsr_std);
__ jcc(Assembler::equal, skip_ldmx);
__ ldmxcsr(mxcsr_std);
@ -170,7 +170,7 @@ class StubGenerator: public StubCodeGenerator {
}
// make sure the control word is correct.
__ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
__ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
#ifdef ASSERT
// make sure we have no pending exceptions
@ -446,7 +446,7 @@ class StubGenerator: public StubCodeGenerator {
if (CheckJNICalls && UseSSE > 0 ) {
Label ok_ret;
ExternalAddress mxcsr_std(StubRoutines::addr_mxcsr_std());
ExternalAddress mxcsr_std(StubRoutines::x86::addr_mxcsr_std());
__ push(rax);
__ subptr(rsp, wordSize); // allocate a temp location
__ stmxcsr(mxcsr_save);
@ -490,7 +490,7 @@ class StubGenerator: public StubCodeGenerator {
__ fnstcw(fpu_cntrl_wrd_save);
__ movl(rax, fpu_cntrl_wrd_save);
__ andl(rax, FPU_CNTRL_WRD_MASK);
ExternalAddress fpu_std(StubRoutines::addr_fpu_cntrl_wrd_std());
ExternalAddress fpu_std(StubRoutines::x86::addr_fpu_cntrl_wrd_std());
__ cmp32(rax, fpu_std);
__ jcc(Assembler::equal, ok_ret);
@ -3857,13 +3857,13 @@ class StubGenerator: public StubCodeGenerator {
void create_control_words() {
// Round to nearest, 53-bit mode, exceptions masked
StubRoutines::_fpu_cntrl_wrd_std = 0x027F;
StubRoutines::x86::_fpu_cntrl_wrd_std = 0x027F;
// Round to zero, 53-bit mode, exception mased
StubRoutines::_fpu_cntrl_wrd_trunc = 0x0D7F;
StubRoutines::x86::_fpu_cntrl_wrd_trunc = 0x0D7F;
// Round to nearest, 24-bit mode, exceptions masked
StubRoutines::_fpu_cntrl_wrd_24 = 0x007F;
StubRoutines::x86::_fpu_cntrl_wrd_24 = 0x007F;
// Round to nearest, 64-bit mode, exceptions masked
StubRoutines::_mxcsr_std = 0x1F80;
StubRoutines::x86::_mxcsr_std = 0x1F80;
// Note: the following two constants are 80-bit values
// layout is critical for correct loading by FPU.
// Bias for strict fp multiply/divide
@ -3896,12 +3896,10 @@ class StubGenerator: public StubCodeGenerator {
// platform dependent
create_control_words();
StubRoutines::x86::_verify_mxcsr_entry = generate_verify_mxcsr();
StubRoutines::x86::_verify_fpu_cntrl_wrd_entry = generate_verify_fpu_cntrl_wrd();
StubRoutines::_d2i_wrapper = generate_d2i_wrapper(T_INT,
CAST_FROM_FN_PTR(address, SharedRuntime::d2i));
StubRoutines::_d2l_wrapper = generate_d2i_wrapper(T_LONG,
CAST_FROM_FN_PTR(address, SharedRuntime::d2l));
StubRoutines::x86::_verify_mxcsr_entry = generate_verify_mxcsr();
StubRoutines::x86::_verify_fpu_cntrl_wrd_entry = generate_verify_fpu_cntrl_wrd();
StubRoutines::x86::_d2i_wrapper = generate_d2i_wrapper(T_INT, CAST_FROM_FN_PTR(address, SharedRuntime::d2i));
StubRoutines::x86::_d2l_wrapper = generate_d2i_wrapper(T_LONG, CAST_FROM_FN_PTR(address, SharedRuntime::d2l));
// Build this early so it's available for the interpreter
StubRoutines::_throw_StackOverflowError_entry = generate_throw_exception("StackOverflowError throw_exception",

@ -289,7 +289,7 @@ class StubGenerator: public StubCodeGenerator {
__ stmxcsr(mxcsr_save);
__ movl(rax, mxcsr_save);
__ andl(rax, MXCSR_MASK); // Only check control and mask bits
ExternalAddress mxcsr_std(StubRoutines::addr_mxcsr_std());
ExternalAddress mxcsr_std(StubRoutines::x86::addr_mxcsr_std());
__ cmp32(rax, mxcsr_std);
__ jcc(Assembler::equal, skip_ldmx);
__ ldmxcsr(mxcsr_std);
@ -602,7 +602,7 @@ class StubGenerator: public StubCodeGenerator {
if (CheckJNICalls) {
Label ok_ret;
ExternalAddress mxcsr_std(StubRoutines::addr_mxcsr_std());
ExternalAddress mxcsr_std(StubRoutines::x86::addr_mxcsr_std());
__ push(rax);
__ subptr(rsp, wordSize); // allocate a temp location
__ stmxcsr(mxcsr_save);
@ -6713,14 +6713,8 @@ address generate_avx_ghash_processBlocks() {
}
void create_control_words() {
// Round to nearest, 53-bit mode, exceptions masked
StubRoutines::_fpu_cntrl_wrd_std = 0x027F;
// Round to zero, 53-bit mode, exception mased
StubRoutines::_fpu_cntrl_wrd_trunc = 0x0D7F;
// Round to nearest, 24-bit mode, exceptions masked
StubRoutines::_fpu_cntrl_wrd_24 = 0x007F;
// Round to nearest, 64-bit mode, exceptions masked
StubRoutines::_mxcsr_std = 0x1F80;
StubRoutines::x86::_mxcsr_std = 0x1F80;
}
// Initialization

@ -96,19 +96,32 @@ class x86 {
private:
static address _verify_fpu_cntrl_wrd_entry;
static address _d2i_wrapper;
static address _d2l_wrapper;
static jint _fpu_cntrl_wrd_std;
static jint _fpu_cntrl_wrd_24;
static jint _fpu_cntrl_wrd_trunc;
static jint _fpu_subnormal_bias1[3];
static jint _fpu_subnormal_bias2[3];
public:
static address verify_fpu_cntrl_wrd_entry() { return _verify_fpu_cntrl_wrd_entry; }
static address d2i_wrapper() { return _d2i_wrapper; }
static address d2l_wrapper() { return _d2l_wrapper; }
static address addr_fpu_cntrl_wrd_std() { return (address)&_fpu_cntrl_wrd_std; }
static address addr_fpu_cntrl_wrd_24() { return (address)&_fpu_cntrl_wrd_24; }
static address addr_fpu_cntrl_wrd_trunc() { return (address)&_fpu_cntrl_wrd_trunc; }
static address addr_fpu_subnormal_bias1() { return (address)&_fpu_subnormal_bias1; }
static address addr_fpu_subnormal_bias2() { return (address)&_fpu_subnormal_bias2; }
static jint fpu_cntrl_wrd_std() { return _fpu_cntrl_wrd_std; }
#endif // !LP64
private:
static jint _mxcsr_std;
static address _verify_mxcsr_entry;
// shuffle mask for fixing up 128-bit words consisting of big-endian 32-bit integers
static address _key_shuffle_mask_addr;
@ -225,6 +238,7 @@ class x86 {
static address _ones_adr;
public:
static address addr_mxcsr_std() { return (address)&_mxcsr_std; }
static address verify_mxcsr_entry() { return _verify_mxcsr_entry; }
static address key_shuffle_mask_addr() { return _key_shuffle_mask_addr; }
static address counter_shuffle_mask_addr() { return _counter_shuffle_mask_addr; }

@ -34,6 +34,15 @@
address StubRoutines::x86::_verify_fpu_cntrl_wrd_entry = NULL;
address StubRoutines::x86::_method_entry_barrier = NULL;
address StubRoutines::x86::_d2i_wrapper = NULL;
address StubRoutines::x86::_d2l_wrapper = NULL;
jint StubRoutines::x86::_fpu_cntrl_wrd_std = 0;
jint StubRoutines::x86::_fpu_cntrl_wrd_24 = 0;
jint StubRoutines::x86::_fpu_cntrl_wrd_trunc = 0;
jint StubRoutines::x86::_mxcsr_std = 0;
jint StubRoutines::x86::_fpu_subnormal_bias1[3] = { 0, 0, 0 };
jint StubRoutines::x86::_fpu_subnormal_bias2[3] = { 0, 0, 0 };

@ -31,6 +31,8 @@
// Implementation of the platform-specific part of StubRoutines - for
// a description of how to extend it, see the stubRoutines.hpp file.
jint StubRoutines::x86::_mxcsr_std = 0;
address StubRoutines::x86::_get_previous_sp_entry = NULL;
address StubRoutines::x86::_f2i_fixup = NULL;
@ -42,3 +44,4 @@ address StubRoutines::x86::_float_sign_flip = NULL;
address StubRoutines::x86::_double_sign_mask = NULL;
address StubRoutines::x86::_double_sign_flip = NULL;
address StubRoutines::x86::_method_entry_barrier = NULL;

@ -1050,7 +1050,7 @@ address TemplateInterpreterGenerator::generate_native_entry(bool synchronized) {
#ifndef _LP64
if (AlwaysRestoreFPU) {
// Make sure the control word is correct.
__ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
__ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
}
#endif // _LP64

@ -483,7 +483,7 @@ static void preserve_callee_saved_registers(MacroAssembler* _masm, const ABIDesc
__ stmxcsr(mxcsr_save);
__ movl(rax, mxcsr_save);
__ andl(rax, MXCSR_MASK); // Only check control and mask bits
ExternalAddress mxcsr_std(StubRoutines::addr_mxcsr_std());
ExternalAddress mxcsr_std(StubRoutines::x86::addr_mxcsr_std());
__ cmp32(rax, mxcsr_std);
__ jcc(Assembler::equal, skip_ldmx);
__ ldmxcsr(mxcsr_std);

@ -688,7 +688,7 @@ void MachEpilogNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
}
// If method set FPU control word, restore to standard control word
if (C->in_24_bit_fp_mode()) {
_masm.fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
_masm.fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
}
int framesize = C->output()->frame_size_in_bytes();
@ -1778,7 +1778,7 @@ encode %{
debug_only(int off0 = cbuf.insts_size());
if (ra_->C->in_24_bit_fp_mode()) {
MacroAssembler _masm(&cbuf);
__ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
__ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
}
// Clear upper bits of YMM registers when current compiled code uses
// wide vectors to avoid AVX <-> SSE transition penalty during call.
@ -1792,7 +1792,7 @@ encode %{
// If method sets FPU control word do it here also
if (Compile::current()->in_24_bit_fp_mode()) {
MacroAssembler masm(&cbuf);
masm.fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_24()));
masm.fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_24()));
}
%}
@ -2888,7 +2888,7 @@ encode %{
// invalid value Intel stores down in the corner cases.
emit_opcode(cbuf,0xD9); // FLDCW trunc
emit_opcode(cbuf,0x2D);
emit_d32(cbuf,(int)StubRoutines::addr_fpu_cntrl_wrd_trunc());
emit_d32(cbuf,(int)StubRoutines::x86::addr_fpu_cntrl_wrd_trunc());
// Allocate a word
emit_opcode(cbuf,0x83); // SUB ESP,4
emit_opcode(cbuf,0xEC);
@ -2902,8 +2902,8 @@ encode %{
emit_opcode(cbuf,0xD9); // FLDCW std/24-bit mode
emit_opcode(cbuf,0x2D);
emit_d32( cbuf, Compile::current()->in_24_bit_fp_mode()
? (int)StubRoutines::addr_fpu_cntrl_wrd_24()
: (int)StubRoutines::addr_fpu_cntrl_wrd_std());
? (int)StubRoutines::x86::addr_fpu_cntrl_wrd_24()
: (int)StubRoutines::x86::addr_fpu_cntrl_wrd_std());
// Load the converted int; adjust CPU stack
emit_opcode(cbuf,0x58); // POP EAX
@ -2917,14 +2917,14 @@ encode %{
// CALL directly to the runtime
cbuf.set_insts_mark();
emit_opcode(cbuf,0xE8); // Call into runtime
emit_d32_reloc(cbuf, (StubRoutines::d2i_wrapper() - cbuf.insts_end()) - 4, runtime_call_Relocation::spec(), RELOC_IMM32 );
emit_d32_reloc(cbuf, (StubRoutines::x86::d2i_wrapper() - cbuf.insts_end()) - 4, runtime_call_Relocation::spec(), RELOC_IMM32 );
// Carry on here...
%}
enc_class DPR2L_encoding( regDPR src ) %{
emit_opcode(cbuf,0xD9); // FLDCW trunc
emit_opcode(cbuf,0x2D);
emit_d32(cbuf,(int)StubRoutines::addr_fpu_cntrl_wrd_trunc());
emit_d32(cbuf,(int)StubRoutines::x86::addr_fpu_cntrl_wrd_trunc());
// Allocate a word
emit_opcode(cbuf,0x83); // SUB ESP,8
emit_opcode(cbuf,0xEC);
@ -2938,8 +2938,8 @@ encode %{
emit_opcode(cbuf,0xD9); // FLDCW std/24-bit mode
emit_opcode(cbuf,0x2D);
emit_d32( cbuf, Compile::current()->in_24_bit_fp_mode()
? (int)StubRoutines::addr_fpu_cntrl_wrd_24()
: (int)StubRoutines::addr_fpu_cntrl_wrd_std());
? (int)StubRoutines::x86::addr_fpu_cntrl_wrd_24()
: (int)StubRoutines::x86::addr_fpu_cntrl_wrd_std());
// Load the converted int; adjust CPU stack
emit_opcode(cbuf,0x58); // POP EAX
@ -2959,7 +2959,7 @@ encode %{
// CALL directly to the runtime
cbuf.set_insts_mark();
emit_opcode(cbuf,0xE8); // Call into runtime
emit_d32_reloc(cbuf, (StubRoutines::d2l_wrapper() - cbuf.insts_end()) - 4, runtime_call_Relocation::spec(), RELOC_IMM32 );
emit_d32_reloc(cbuf, (StubRoutines::x86::d2l_wrapper() - cbuf.insts_end()) - 4, runtime_call_Relocation::spec(), RELOC_IMM32 );
// Carry on here...
%}
@ -10790,7 +10790,7 @@ instruct convD2I_reg_reg( eAXRegI dst, eDXRegI tmp, regD src, eFlagsReg cr ) %{
__ movdbl(Address(rsp, 0), $src$$XMMRegister);
__ fld_d(Address(rsp, 0));
__ addptr(rsp, 8);
__ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::d2i_wrapper())));
__ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::d2i_wrapper())));
__ bind(fast);
%}
ins_pipe( pipe_slow );
@ -10846,13 +10846,13 @@ instruct convD2L_reg_reg( eADXRegL dst, regD src, eFlagsReg cr ) %{
__ subptr(rsp, 8);
__ movdbl(Address(rsp, 0), $src$$XMMRegister);
__ fld_d(Address(rsp, 0));
__ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_trunc()));
__ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_trunc()));
__ fistp_d(Address(rsp, 0));
// Restore the rounding mode, mask the exception
if (Compile::current()->in_24_bit_fp_mode()) {
__ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_24()));
__ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_24()));
} else {
__ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
__ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
}
// Load the converted long, adjust CPU stack
__ pop(rax);
@ -10865,7 +10865,7 @@ instruct convD2L_reg_reg( eADXRegL dst, regD src, eFlagsReg cr ) %{
__ movdbl(Address(rsp, 0), $src$$XMMRegister);
__ fld_d(Address(rsp, 0));
__ addptr(rsp, 8);
__ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::d2l_wrapper())));
__ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::d2l_wrapper())));
__ bind(fast);
%}
ins_pipe( pipe_slow );
@ -10920,7 +10920,7 @@ instruct convF2I_reg(eAXRegI dst, eDXRegI tmp, regF src, eFlagsReg cr ) %{
__ movflt(Address(rsp, 0), $src$$XMMRegister);
__ fld_s(Address(rsp, 0));
__ addptr(rsp, 4);
__ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::d2i_wrapper())));
__ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::d2i_wrapper())));
__ bind(fast);
%}
ins_pipe( pipe_slow );
@ -10977,13 +10977,13 @@ instruct convF2L_reg_reg( eADXRegL dst, regF src, eFlagsReg cr ) %{
__ subptr(rsp, 8);
__ movflt(Address(rsp, 0), $src$$XMMRegister);
__ fld_s(Address(rsp, 0));
__ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_trunc()));
__ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_trunc()));
__ fistp_d(Address(rsp, 0));
// Restore the rounding mode, mask the exception
if (Compile::current()->in_24_bit_fp_mode()) {
__ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_24()));
__ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_24()));
} else {
__ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
__ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
}
// Load the converted long, adjust CPU stack
__ pop(rax);
@ -10996,7 +10996,7 @@ instruct convF2L_reg_reg( eADXRegL dst, regF src, eFlagsReg cr ) %{
__ movflt(Address(rsp, 0), $src$$XMMRegister);
__ fld_s(Address(rsp, 0));
__ addptr(rsp, 4);
__ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::d2l_wrapper())));
__ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::d2l_wrapper())));
__ bind(fast);
%}
ins_pipe( pipe_slow );

@ -2398,7 +2398,7 @@ LONG WINAPI Handle_FLT_Exception(struct _EXCEPTION_POINTERS* exceptionInfo) {
// See also CR 6192333
//
jint MxCsr = INITIAL_MXCSR;
// we can't use StubRoutines::addr_mxcsr_std()
// we can't use StubRoutines::x86::addr_mxcsr_std()
// because in Win64 mxcsr is not saved there
if (MxCsr != ctx->MxCsr) {
ctx->MxCsr = MxCsr;

@ -615,7 +615,7 @@ void os::print_register_info(outputStream *st, const void *context) {
void os::setup_fpu() {
#ifndef AMD64
address fpu_cntrl = StubRoutines::addr_fpu_cntrl_wrd_std();
address fpu_cntrl = StubRoutines::x86::addr_fpu_cntrl_wrd_std();
__asm__ volatile ( "fldcw (%0)" :
: "r" (fpu_cntrl) : "memory");
#endif // !AMD64

@ -73,13 +73,6 @@ address StubRoutines::_atomic_cmpxchg_long_entry = NULL;
address StubRoutines::_atomic_add_entry = NULL;
address StubRoutines::_atomic_add_long_entry = NULL;
address StubRoutines::_fence_entry = NULL;
address StubRoutines::_d2i_wrapper = NULL;
address StubRoutines::_d2l_wrapper = NULL;
jint StubRoutines::_fpu_cntrl_wrd_std = 0;
jint StubRoutines::_fpu_cntrl_wrd_24 = 0;
jint StubRoutines::_fpu_cntrl_wrd_trunc = 0;
jint StubRoutines::_mxcsr_std = 0;
// Compiled code entry points default values
// The default functions don't have separate disjoint versions.

@ -151,13 +151,6 @@ class StubRoutines: AllStatic {
static address _atomic_add_entry;
static address _atomic_add_long_entry;
static address _fence_entry;
static address _d2i_wrapper;
static address _d2l_wrapper;
static jint _fpu_cntrl_wrd_std;
static jint _fpu_cntrl_wrd_24;
static jint _fpu_cntrl_wrd_trunc;
static jint _mxcsr_std;
static BufferBlob* _code1; // code buffer for initial routines
static BufferBlob* _code2; // code buffer for all other routines
@ -325,15 +318,6 @@ class StubRoutines: AllStatic {
static address atomic_add_long_entry() { return _atomic_add_long_entry; }
static address fence_entry() { return _fence_entry; }
static address d2i_wrapper() { return _d2i_wrapper; }
static address d2l_wrapper() { return _d2l_wrapper; }
static jint fpu_cntrl_wrd_std() { return _fpu_cntrl_wrd_std; }
static address addr_fpu_cntrl_wrd_std() { return (address)&_fpu_cntrl_wrd_std; }
static address addr_fpu_cntrl_wrd_24() { return (address)&_fpu_cntrl_wrd_24; }
static address addr_fpu_cntrl_wrd_trunc() { return (address)&_fpu_cntrl_wrd_trunc; }
static address addr_mxcsr_std() { return (address)&_mxcsr_std; }
static address select_arraycopy_function(BasicType t, bool aligned, bool disjoint, const char* &name, bool dest_uninitialized);
static address jbyte_arraycopy() { return _jbyte_arraycopy; }