8064611: AARCH64: Changes to HotSpot shared code

Everything except cpu/ and os_cpu/

Reviewed-by: dholmes, goetz, dlong, coleenp, kvn
This commit is contained in:
Andrew Haley 2014-12-11 13:11:53 -08:00
parent ee49c27e76
commit 0b30e012ee
75 changed files with 420 additions and 23 deletions

@ -341,7 +341,7 @@ JNIEXPORT jbyteArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo
return (err == PS_OK)? array : 0;
}
#if defined(i386) || defined(amd64) || defined(sparc) || defined(sparcv9)
#if defined(i386) || defined(amd64) || defined(sparc) || defined(sparcv9) || defined(aarch64)
JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLocal_getThreadIntegerRegisterSet0
(JNIEnv *env, jobject this_obj, jint lwp_id) {
@ -363,6 +363,9 @@ JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo
#ifdef amd64
#define NPRGREG sun_jvm_hotspot_debugger_amd64_AMD64ThreadContext_NPRGREG
#endif
#ifdef aarch64
#define NPRGREG 32
#endif
#if defined(sparc) || defined(sparcv9)
#define NPRGREG sun_jvm_hotspot_debugger_sparc_SPARCThreadContext_NPRGREG
#endif
@ -458,6 +461,12 @@ JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo
regs[REG_INDEX(R_O7)] = gregs.u_regs[14];
#endif /* sparc */
#if defined(aarch64)
#define REG_INDEX(reg) sun_jvm_hotspot_debugger_aarch64_AARCH64ThreadContext_##reg
#endif /* aarch64 */
(*env)->ReleaseLongArrayElements(env, array, regs, JNI_COMMIT);
return array;

@ -71,6 +71,9 @@ combination of ptrace and /proc calls.
#if defined(sparc) || defined(sparcv9) || defined(ppc64)
#define user_regs_struct pt_regs
#endif
#if defined(aarch64)
#define user_regs_struct user_pt_regs
#endif
// This C bool type must be int for compatibility with Linux calls and
// it would be a mistake to equivalence it to C++ bool on many platforms

@ -34,6 +34,7 @@ import sun.jvm.hotspot.debugger.JVMDebugger;
import sun.jvm.hotspot.debugger.MachineDescription;
import sun.jvm.hotspot.debugger.MachineDescriptionAMD64;
import sun.jvm.hotspot.debugger.MachineDescriptionPPC64;
import sun.jvm.hotspot.debugger.MachineDescriptionAArch64;
import sun.jvm.hotspot.debugger.MachineDescriptionIA64;
import sun.jvm.hotspot.debugger.MachineDescriptionIntelX86;
import sun.jvm.hotspot.debugger.MachineDescriptionSPARC32Bit;
@ -591,6 +592,8 @@ public class HotSpotAgent {
machDesc = new MachineDescriptionAMD64();
} else if (cpu.equals("ppc64")) {
machDesc = new MachineDescriptionPPC64();
} else if (cpu.equals("aarch64")) {
machDesc = new MachineDescriptionAArch64();
} else if (cpu.equals("sparc")) {
if (LinuxDebuggerLocal.getAddressSize()==8) {
machDesc = new MachineDescriptionSPARC64Bit();

@ -0,0 +1,39 @@
/*
* Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
*
*/
package sun.jvm.hotspot.debugger;
public class MachineDescriptionAArch64 extends MachineDescriptionTwosComplement implements MachineDescription {
public long getAddressSize() {
return 8;
}
public boolean isLP64() {
return true;
}
public boolean isBigEndian() {
return false;
}
}

@ -61,7 +61,7 @@ public class PlatformInfo {
return "x86";
} else if (cpu.equals("sparc") || cpu.equals("sparcv9")) {
return "sparc";
} else if (cpu.equals("ia64") || cpu.equals("amd64") || cpu.equals("x86_64") || cpu.equals("ppc64")) {
} else if (cpu.equals("ia64") || cpu.equals("amd64") || cpu.equals("x86_64") || cpu.equals("ppc64") || cpu.equals("aarch64")) {
return cpu;
} else {
try {

@ -286,7 +286,7 @@ ifneq ($(OSNAME),windows)
# Use uname output for SRCARCH, but deal with platform differences. If ARCH
# is not explicitly listed below, it is treated as x86.
SRCARCH = $(ARCH/$(filter sparc sparc64 ia64 amd64 x86_64 arm ppc ppc64 zero,$(ARCH)))
SRCARCH = $(ARCH/$(filter sparc sparc64 ia64 amd64 x86_64 arm ppc ppc64 aarch64 zero,$(ARCH)))
ARCH/ = x86
ARCH/sparc = sparc
ARCH/sparc64= sparc
@ -296,6 +296,7 @@ ifneq ($(OSNAME),windows)
ARCH/ppc64 = ppc
ARCH/ppc = ppc
ARCH/arm = arm
ARCH/aarch64= aarch64
ARCH/zero = zero
# BUILDARCH is usually the same as SRCARCH, except for sparcv9
@ -326,11 +327,12 @@ ifneq ($(OSNAME),windows)
LIBARCH/sparcv9 = sparcv9
LIBARCH/ia64 = ia64
LIBARCH/ppc64 = ppc64
LIBARCH/aarch64 = aarch64
LIBARCH/ppc = ppc
LIBARCH/arm = arm
LIBARCH/zero = $(ZERO_LIBARCH)
LP64_ARCH = sparcv9 amd64 ia64 ppc64 zero
LP64_ARCH = sparcv9 amd64 ia64 ppc64 aarch64 zero
endif
# Required make macro settings for all platforms

@ -0,0 +1,32 @@
#
# Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
#
# This code is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License version 2 only, as
# published by the Free Software Foundation.
#
# This code is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# version 2 for more details (a copy is included in the LICENSE file that
# accompanied this code).
#
# You should have received a copy of the GNU General Public License version
# 2 along with this work; if not, write to the Free Software Foundation,
# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
#
# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
# or visit www.oracle.com if you need additional information or have any
# questions.
#
#
# The copied fdlibm routines in sharedRuntimeTrig.o must not be optimized
OPT_CFLAGS/sharedRuntimeTrig.o = $(OPT_CFLAGS/NOOPT)
# The copied fdlibm routines in sharedRuntimeTrans.o must not be optimized
OPT_CFLAGS/sharedRuntimeTrans.o = $(OPT_CFLAGS/NOOPT)
# Must also specify if CPU is little endian
CFLAGS += -DVM_LITTLE_ENDIAN
CFLAGS += -D_LP64=1

@ -194,6 +194,7 @@ DATA_MODE/sparc = 32
DATA_MODE/sparcv9 = 64
DATA_MODE/amd64 = 64
DATA_MODE/ppc64 = 64
DATA_MODE/aarch64 = 64
DATA_MODE = $(DATA_MODE/$(BUILDARCH))

@ -130,6 +130,15 @@ ifneq (,$(findstring $(ARCH), ppc ppc64))
HS_ARCH = ppc
endif
# AARCH64
ifeq ($(ARCH), aarch64)
ARCH_DATA_MODEL = 64
MAKE_ARGS += LP64=1
PLATFORM = linux-aarch64
VM_PLATFORM = linux_aarch64
HS_ARCH = aarch64
endif
# On 32 bit linux we build server and client, on 64 bit just server.
ifeq ($(JVM_VARIANTS),)
ifeq ($(ARCH_DATA_MODEL), 32)

@ -172,6 +172,7 @@ endif
ARCHFLAG = $(ARCHFLAG/$(BUILDARCH))
ARCHFLAG/i486 = -m32 -march=i586
ARCHFLAG/amd64 = -m64 $(STACK_ALIGNMENT_OPT)
ARCHFLAG/aarch64 =
ARCHFLAG/ia64 =
ARCHFLAG/sparc = -m32 -mcpu=v9
ARCHFLAG/sparcv9 = -m64 -mcpu=v9

@ -0,0 +1,15 @@
os_family = linux
arch = aarch64
arch_model = aarch64
os_arch = linux_aarch64
os_arch_model = linux_aarch64
lib_arch = aarch64
compiler = gcc
sysdefs = -DLINUX -D_GNU_SOURCE -DAARCH64

@ -246,6 +246,8 @@ static char cpu_arch[] = "sparcv9";
#else
static char cpu_arch[] = "sparc";
#endif
#elif defined(AARCH64)
static char cpu_arch[] = "aarch64";
#else
#error Add appropriate cpu_arch setting
#endif
@ -1900,6 +1902,9 @@ void * os::dll_load(const char *filename, char *ebuf, int ebuflen) {
#ifndef EM_486
#define EM_486 6 /* Intel 80486 */
#endif
#ifndef EM_AARCH64
#define EM_AARCH64 183 /* ARM AARCH64 */
#endif
static const arch_t arch_array[]={
{EM_386, EM_386, ELFCLASS32, ELFDATA2LSB, (char*)"IA 32"},
@ -1921,7 +1926,8 @@ void * os::dll_load(const char *filename, char *ebuf, int ebuflen) {
{EM_MIPS_RS3_LE, EM_MIPS_RS3_LE, ELFCLASS32, ELFDATA2LSB, (char*)"MIPSel"},
{EM_MIPS, EM_MIPS, ELFCLASS32, ELFDATA2MSB, (char*)"MIPS"},
{EM_PARISC, EM_PARISC, ELFCLASS32, ELFDATA2MSB, (char*)"PARISC"},
{EM_68K, EM_68K, ELFCLASS32, ELFDATA2MSB, (char*)"M68k"}
{EM_68K, EM_68K, ELFCLASS32, ELFDATA2MSB, (char*)"M68k"},
{EM_AARCH64, EM_AARCH64, ELFCLASS64, ELFDATA2LSB, (char*)"AARCH64"},
};
#if (defined IA32)
@ -1952,9 +1958,11 @@ void * os::dll_load(const char *filename, char *ebuf, int ebuflen) {
static Elf32_Half running_arch_code=EM_MIPS;
#elif (defined M68K)
static Elf32_Half running_arch_code=EM_68K;
#elif (defined AARCH64)
static Elf32_Half running_arch_code=EM_AARCH64;
#else
#error Method os::dll_load requires that one of following is defined:\
IA32, AMD64, IA64, __sparc, __powerpc__, ARM, S390, ALPHA, MIPS, MIPSEL, PARISC, M68K
IA32, AMD64, IA64, __sparc, __powerpc__, ARM, S390, ALPHA, MIPS, MIPSEL, PARISC, M68K, AARCH64
#endif
// Identify compatability class for VM's architecture and library's architecture
@ -3285,7 +3293,7 @@ size_t os::Linux::find_large_page_size() {
#ifndef ZERO
large_page_size = IA32_ONLY(4 * M) AMD64_ONLY(2 * M) IA64_ONLY(256 * M) SPARC_ONLY(4 * M)
ARM_ONLY(2 * M) PPC_ONLY(4 * M);
ARM_ONLY(2 * M) PPC_ONLY(4 * M) AARCH64_ONLY(2 * M);
#endif // ZERO
FILE *fp = fopen("/proc/meminfo", "r");
@ -5864,11 +5872,11 @@ void Parker::unpark() {
extern char** environ;
#ifndef __NR_fork
#define __NR_fork IA32_ONLY(2) IA64_ONLY(not defined) AMD64_ONLY(57)
#define __NR_fork IA32_ONLY(2) IA64_ONLY(not defined) AMD64_ONLY(57) AARCH64_ONLY(1079)
#endif
#ifndef __NR_execve
#define __NR_execve IA32_ONLY(11) IA64_ONLY(1033) AMD64_ONLY(59)
#define __NR_execve IA32_ONLY(11) IA64_ONLY(1033) AMD64_ONLY(59) AARCH64_ONLY(221)
#endif
// Run the specified command in a separate process. Return its exit value,

@ -433,6 +433,9 @@ class AbstractAssembler : public ResourceObj {
#ifdef TARGET_ARCH_ppc
# include "assembler_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "assembler_aarch64.hpp"
#endif
#endif // SHARE_VM_ASM_ASSEMBLER_HPP

@ -42,5 +42,8 @@
#ifdef TARGET_ARCH_ppc
# include "assembler_ppc.inline.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "assembler_aarch64.inline.hpp"
#endif
#endif // SHARE_VM_ASM_ASSEMBLER_INLINE_HPP

@ -632,6 +632,9 @@ class CodeBuffer: public StackObj {
#ifdef TARGET_ARCH_ppc
# include "codeBuffer_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "codeBuffer_aarch64.hpp"
#endif
};

@ -42,5 +42,8 @@
#ifdef TARGET_ARCH_ppc
# include "macroAssembler_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "macroAssembler_aarch64.hpp"
#endif
#endif // SHARE_VM_ASM_MACROASSEMBLER_HPP

@ -42,5 +42,8 @@
#ifdef TARGET_ARCH_ppc
# include "macroAssembler_ppc.inline.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "macroAssembler_aarch64.inline.hpp"
#endif
#endif // SHARE_VM_ASM_MACROASSEMBLER_INLINE_HPP

@ -108,6 +108,9 @@ const type name = ((type)name##_##type##EnumValue)
#ifdef TARGET_ARCH_ppc
# include "register_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "register_aarch64.hpp"
#endif
// Debugging support

@ -48,6 +48,9 @@ enum {
#ifdef TARGET_ARCH_ppc
# include "c1_Defs_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "c1_Defs_aarch64.hpp"
#endif
// native word offsets from memory address

@ -44,6 +44,9 @@ class FpuStackSim;
#ifdef TARGET_ARCH_ppc
# include "c1_FpuStackSim_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "c1_FpuStackSim_aarch64.hpp"
#endif
#endif // SHARE_VM_C1_C1_FPUSTACKSIM_HPP

@ -93,6 +93,9 @@ class FrameMap : public CompilationResourceObj {
#endif
#ifdef TARGET_ARCH_ppc
# include "c1_FrameMap_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "c1_FrameMap_aarch64.hpp"
#endif

@ -67,7 +67,7 @@ FloatRegister LIR_OprDesc::as_double_reg() const {
#endif
#ifdef ARM
#if defined(ARM) || defined (AARCH64)
FloatRegister LIR_OprDesc::as_float_reg() const {
return as_FloatRegister(fpu_regnr());
@ -154,7 +154,11 @@ void LIR_Address::verify() const {
#endif
#ifdef _LP64
assert(base()->is_cpu_register(), "wrong base operand");
#ifndef AARCH64
assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand");
#else
assert(index()->is_illegal() || index()->is_double_cpu() || index()->is_single_cpu(), "wrong index operand");
#endif
assert(base()->type() == T_OBJECT || base()->type() == T_LONG || base()->type() == T_METADATA,
"wrong type for addresses");
#else
@ -1576,6 +1580,11 @@ void LIR_OprDesc::print(outputStream* out) const {
out->print("fpu%d", fpu_regnr());
} else if (is_double_fpu()) {
out->print("fpu%d", fpu_regnrLo());
#elif defined(AARCH64)
} else if (is_single_fpu()) {
out->print("fpu%d", fpu_regnr());
} else if (is_double_fpu()) {
out->print("fpu%d", fpu_regnrLo());
#elif defined(ARM)
} else if (is_single_fpu()) {
out->print("s%d", fpu_regnr());

@ -450,8 +450,8 @@ class LIR_OprDesc: public CompilationResourceObj {
XMMRegister as_xmm_double_reg() const;
// for compatibility with RInfo
int fpu () const { return lo_reg_half(); }
#endif // X86
#if defined(SPARC) || defined(ARM) || defined(PPC)
#endif
#if defined(SPARC) || defined(ARM) || defined(PPC) || defined(AARCH64)
FloatRegister as_float_reg () const;
FloatRegister as_double_reg () const;
#endif
@ -541,7 +541,7 @@ class LIR_Address: public LIR_OprPtr {
, _type(type)
, _disp(0) { verify(); }
#if defined(X86) || defined(ARM)
#if defined(X86) || defined(ARM) || defined(AARCH64)
LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
_base(base)
, _index(index)
@ -622,7 +622,7 @@ class LIR_OprFact: public AllStatic {
LIR_OprDesc::fpu_register |
LIR_OprDesc::double_size); }
#endif
#ifdef X86
#if defined(X86) || defined(AARCH64)
static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
(reg << LIR_OprDesc::reg2_shift) |
LIR_OprDesc::double_type |

@ -274,6 +274,9 @@ class LIR_Assembler: public CompilationResourceObj {
#ifdef TARGET_ARCH_ppc
# include "c1_LIRAssembler_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "c1_LIRAssembler_aarch64.hpp"
#endif
};

@ -985,6 +985,9 @@ class LinearScanTimers : public StackObj {
#ifdef TARGET_ARCH_ppc
# include "c1_LinearScan_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "c1_LinearScan_aarch64.hpp"
#endif
#endif // SHARE_VM_C1_C1_LINEARSCAN_HPP

@ -59,6 +59,9 @@ class C1_MacroAssembler: public MacroAssembler {
#ifdef TARGET_ARCH_ppc
# include "c1_MacroAssembler_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "c1_MacroAssembler_aarch64.hpp"
#endif
};

@ -722,6 +722,8 @@ JRT_ENTRY(void, Runtime1::deoptimize(JavaThread* thread, jint trap_request))
JRT_END
#ifndef DEOPTIMIZE_WHEN_PATCHING
static Klass* resolve_field_return_klass(methodHandle caller, int bci, TRAPS) {
Bytecode_field field_access(caller, bci);
// This can be static or non-static field access
@ -1210,6 +1212,33 @@ JRT_ENTRY(void, Runtime1::patch_code(JavaThread* thread, Runtime1::StubID stub_i
}
JRT_END
#else // DEOPTIMIZE_WHEN_PATCHING
JRT_ENTRY(void, Runtime1::patch_code(JavaThread* thread, Runtime1::StubID stub_id ))
RegisterMap reg_map(thread, false);
NOT_PRODUCT(_patch_code_slowcase_cnt++;)
if (TracePatching) {
tty->print_cr("Deoptimizing because patch is needed");
}
frame runtime_frame = thread->last_frame();
frame caller_frame = runtime_frame.sender(&reg_map);
// It's possible the nmethod was invalidated in the last
// safepoint, but if it's still alive then make it not_entrant.
nmethod* nm = CodeCache::find_nmethod(caller_frame.pc());
if (nm != NULL) {
nm->make_not_entrant();
}
Deoptimization::deoptimize_frame(thread, caller_frame.id());
// Return to the now deoptimized frame.
JRT_END
#endif // DEOPTIMIZE_WHEN_PATCHING
//
// Entry point for compiled code. We want to patch a nmethod.
// We don't do a normal VM transition here because we want to

@ -38,6 +38,9 @@
#ifdef TARGET_ARCH_ppc
# include "c1_globals_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "c1_globals_aarch64.hpp"
#endif
#ifdef TARGET_OS_FAMILY_linux
# include "c1_globals_linux.hpp"
#endif

@ -40,5 +40,8 @@
#ifdef TARGET_ARCH_ppc
# include "nativeInst_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "nativeInst_aarch64.hpp"
#endif
#endif // SHARE_VM_CODE_NATIVEINST_HPP

@ -430,7 +430,9 @@ class relocInfo VALUE_OBJ_CLASS_SPEC {
#ifdef TARGET_ARCH_ppc
# include "relocInfo_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "relocInfo_aarch64.hpp"
#endif
protected:
// Derived constant, based on format_width which is PD:

@ -155,6 +155,9 @@ public:
#ifdef TARGET_ARCH_ppc
# include "vmreg_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "vmreg_aarch64.hpp"
#endif
};

@ -42,5 +42,8 @@
#ifdef TARGET_ARCH_ppc
# include "vmreg_ppc.inline.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "vmreg_aarch64.inline.hpp"
#endif
#endif // SHARE_VM_CODE_VMREG_INLINE_HPP

@ -48,6 +48,9 @@
#ifdef TARGET_ARCH_ppc
# include "depChecker_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "depChecker_aarch64.hpp"
#endif
#ifdef SHARK
#include "shark/sharkEntry.hpp"
#endif

@ -77,6 +77,9 @@ class Disassembler {
#endif
#ifdef TARGET_ARCH_ppc
# include "disassembler_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "disassembler_aarch64.hpp"
#endif

@ -588,6 +588,9 @@ void print();
#ifdef TARGET_ARCH_ppc
# include "bytecodeInterpreter_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "bytecodeInterpreter_aarch64.hpp"
#endif
}; // BytecodeInterpreter

@ -58,6 +58,9 @@
#ifdef TARGET_ARCH_ppc
# include "bytecodeInterpreter_ppc.inline.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "bytecodeInterpreter_aarch64.inline.hpp"
#endif
#endif // CC_INTERP

@ -96,6 +96,9 @@ class CppInterpreter: public AbstractInterpreter {
#ifdef TARGET_ARCH_ppc
# include "cppInterpreter_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "cppInterpreter_aarch64.hpp"
#endif
};

@ -59,6 +59,9 @@ class CppInterpreterGenerator: public AbstractInterpreterGenerator {
#ifdef TARGET_ARCH_ppc
# include "cppInterpreterGenerator_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "cppInterpreterGenerator_aarch64.hpp"
#endif
};

@ -45,5 +45,8 @@
#ifdef TARGET_ARCH_MODEL_ppc_64
# include "interp_masm_ppc_64.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_aarch64
# include "interp_masm_aarch64.hpp"
#endif
#endif // SHARE_VM_INTERPRETER_INTERP_MASM_HPP

@ -140,6 +140,9 @@ class Interpreter: public CC_INTERP_ONLY(CppInterpreter) NOT_CC_INTERP(TemplateI
#ifdef TARGET_ARCH_ppc
# include "interpreter_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "interpreter_aarch64.hpp"
#endif
};

@ -58,6 +58,9 @@ class InterpreterGenerator: public CC_INTERP_ONLY(CppInterpreterGenerator)
#ifdef TARGET_ARCH_ppc
# include "interpreterGenerator_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "interpreterGenerator_aarch64.hpp"
#endif
};

@ -176,6 +176,9 @@ class InterpreterRuntime: AllStatic {
#endif
#ifdef TARGET_ARCH_ppc
# include "interpreterRT_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "interpreterRT_aarch64.hpp"
#endif

@ -204,6 +204,9 @@ class TemplateInterpreter: public AbstractInterpreter {
#ifdef TARGET_ARCH_ppc
# include "templateInterpreter_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "templateInterpreter_aarch64.hpp"
#endif
};

@ -98,6 +98,9 @@ class TemplateInterpreterGenerator: public AbstractInterpreterGenerator {
#ifdef TARGET_ARCH_ppc
# include "templateInterpreterGenerator_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "templateInterpreterGenerator_aarch64.hpp"
#endif
};

@ -362,6 +362,9 @@ class TemplateTable: AllStatic {
#ifdef TARGET_ARCH_MODEL_ppc_64
# include "templateTable_ppc_64.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_aarch64
# include "templateTable_aarch64.hpp"
#endif
};
#endif /* !CC_INTERP */

@ -3020,10 +3020,55 @@ void Metaspace::allocate_metaspace_compressed_klass_ptrs(char* requested_addr, a
// Don't use large pages for the class space.
bool large_pages = false;
#ifndef AARCH64
ReservedSpace metaspace_rs = ReservedSpace(compressed_class_space_size(),
_reserve_alignment,
large_pages,
requested_addr, 0);
#else // AARCH64
ReservedSpace metaspace_rs;
// Our compressed klass pointers may fit nicely into the lower 32
// bits.
if ((uint64_t)requested_addr + compressed_class_space_size() < 4*G) {
metaspace_rs = ReservedSpace(compressed_class_space_size(),
_reserve_alignment,
large_pages,
requested_addr, 0);
}
if (! metaspace_rs.is_reserved()) {
// Try to align metaspace so that we can decode a compressed klass
// with a single MOVK instruction. We can do this iff the
// compressed class base is a multiple of 4G.
for (char *a = (char*)align_ptr_up(requested_addr, 4*G);
a < (char*)(1024*G);
a += 4*G) {
#if INCLUDE_CDS
if (UseSharedSpaces
&& ! can_use_cds_with_metaspace_addr(a, cds_base)) {
// We failed to find an aligned base that will reach. Fall
// back to using our requested addr.
metaspace_rs = ReservedSpace(compressed_class_space_size(),
_reserve_alignment,
large_pages,
requested_addr, 0);
break;
}
#endif
metaspace_rs = ReservedSpace(compressed_class_space_size(),
_reserve_alignment,
large_pages,
a, 0);
if (metaspace_rs.is_reserved())
break;
}
}
#endif // AARCH64
if (!metaspace_rs.is_reserved()) {
#if INCLUDE_CDS
if (UseSharedSpaces) {

@ -46,5 +46,8 @@
#ifdef TARGET_ARCH_MODEL_ppc_64
# include "adfiles/ad_ppc_64.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_aarch64
# include "adfiles/ad_aarch64.hpp"
#endif
#endif // SHARE_VM_OPTO_AD_HPP

@ -38,6 +38,9 @@
#ifdef TARGET_ARCH_ppc
# include "c2_globals_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "c2_globals_aarch64.hpp"
#endif
#ifdef TARGET_OS_FAMILY_linux
# include "c2_globals_linux.hpp"
#endif

@ -3813,7 +3813,7 @@ void GraphKit::write_barrier_post(Node* oop_store,
// Smash zero into card
if( !UseConcMarkSweepGC ) {
__ store(__ ctrl(), card_adr, zero, bt, adr_type, MemNode::release);
__ store(__ ctrl(), card_adr, zero, bt, adr_type, MemNode::unordered);
} else {
// Specialized path for CM store barrier
__ storeCM(__ ctrl(), card_adr, zero, oop_store, adr_idx, bt, adr_type);

@ -511,10 +511,16 @@ public:
// Conservatively release stores of object references in order to
// ensure visibility of object initialization.
static inline MemOrd release_if_reference(const BasicType t) {
#ifdef AARCH64
// AArch64 doesn't need a release store here because object
// initialization contains the necessary barriers.
return unordered;
#else
const MemOrd mo = (t == T_ARRAY ||
t == T_ADDRESS || // Might be the address of an object reference (`boxing').
t == T_OBJECT) ? release : unordered;
return mo;
#endif
}
// Polymorphic factory method

@ -48,6 +48,9 @@
#ifdef TARGET_ARCH_MODEL_ppc_64
# include "adfiles/adGlobals_ppc_64.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_aarch64
# include "adfiles/adGlobals_aarch64.hpp"
#endif
//------------------------------OptoReg----------------------------------------
// We eventually need Registers for the Real World. Registers are essentially

@ -1689,7 +1689,8 @@ void Parse::do_one_bytecode() {
a = pop(); // the array itself
const TypeOopPtr* elemtype = _gvn.type(a)->is_aryptr()->elem()->make_oopptr();
const TypeAryPtr* adr_type = TypeAryPtr::OOPS;
Node* store = store_oop_to_array(control(), a, d, adr_type, c, elemtype, T_OBJECT, MemNode::release);
Node* store = store_oop_to_array(control(), a, d, adr_type, c, elemtype, T_OBJECT,
StoreNode::release_if_reference(T_OBJECT));
break;
}
case Bytecodes::_lastore: {

@ -39,6 +39,9 @@
#ifdef TARGET_ARCH_ppc
# include "jni_ppc.h"
#endif
#ifdef TARGET_ARCH_aarch64
# include "jni_aarch64.h"
#endif
/*

@ -193,6 +193,9 @@ public:
#endif
#ifdef TARGET_ARCH_ppc
# include "methodHandles_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "methodHandles_aarch64.hpp"
#endif
// Tracing

@ -1164,7 +1164,8 @@ void Arguments::set_tiered_flags() {
}
// Increase the code cache size - tiered compiles a lot more.
if (FLAG_IS_DEFAULT(ReservedCodeCacheSize)) {
FLAG_SET_ERGO(uintx, ReservedCodeCacheSize, ReservedCodeCacheSize * 5);
FLAG_SET_ERGO(uintx, ReservedCodeCacheSize,
MIN2(CODE_CACHE_DEFAULT_LIMIT, ReservedCodeCacheSize * 5));
}
// Enable SegmentedCodeCache if TieredCompilation is enabled and ReservedCodeCacheSize >= 240M
if (FLAG_IS_DEFAULT(SegmentedCodeCache) && ReservedCodeCacheSize >= 240*M) {
@ -2520,11 +2521,11 @@ bool Arguments::check_vm_args_consistency() {
"Invalid ReservedCodeCacheSize=%dK. Must be at least %uK.\n", ReservedCodeCacheSize/K,
min_code_cache_size/K);
status = false;
} else if (ReservedCodeCacheSize > 2*G) {
// Code cache size larger than MAXINT is not supported.
} else if (ReservedCodeCacheSize > CODE_CACHE_SIZE_LIMIT) {
// Code cache size larger than CODE_CACHE_SIZE_LIMIT is not supported.
jio_fprintf(defaultStream::error_stream(),
"Invalid ReservedCodeCacheSize=%dM. Must be at most %uM.\n", ReservedCodeCacheSize/M,
(2*G)/M);
CODE_CACHE_SIZE_LIMIT/M);
status = false;
} else if (NonNMethodCodeHeapSize < min_code_cache_size){
jio_fprintf(defaultStream::error_stream(),

@ -43,6 +43,9 @@
#ifdef TARGET_OS_ARCH_linux_ppc
# include "atomic_linux_ppc.inline.hpp"
#endif
#ifdef TARGET_OS_ARCH_linux_aarch64
# include "atomic_linux_aarch64.inline.hpp"
#endif
// Solaris
#ifdef TARGET_OS_ARCH_solaris_x86

@ -469,6 +469,9 @@ class frame VALUE_OBJ_CLASS_SPEC {
#ifdef TARGET_ARCH_ppc
# include "frame_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "frame_aarch64.hpp"
#endif
};

@ -76,6 +76,9 @@ inline oop* frame::interpreter_frame_temp_oop_addr() const {
#ifdef TARGET_ARCH_ppc
# include "frame_ppc.inline.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "frame_aarch64.inline.hpp"
#endif
#endif // SHARE_VM_RUNTIME_FRAME_INLINE_HPP

@ -52,6 +52,9 @@
#ifdef TARGET_ARCH_ppc
# include "globals_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "globals_aarch64.hpp"
#endif
#ifdef TARGET_OS_FAMILY_linux
# include "globals_linux.hpp"
#endif
@ -91,6 +94,9 @@
#ifdef TARGET_OS_ARCH_linux_ppc
# include "globals_linux_ppc.hpp"
#endif
#ifdef TARGET_OS_ARCH_linux_aarch64
# include "globals_linux_aarch64.hpp"
#endif
#ifdef TARGET_OS_ARCH_aix_ppc
# include "globals_aix_ppc.hpp"
#endif
@ -110,8 +116,8 @@
#ifdef TARGET_ARCH_arm
# include "c1_globals_arm.hpp"
#endif
#ifdef TARGET_ARCH_ppc
# include "c1_globals_ppc.hpp"
#ifdef TARGET_ARCH_aarch64
# include "c1_globals_aarch64.hpp"
#endif
#ifdef TARGET_OS_FAMILY_linux
# include "c1_globals_linux.hpp"
@ -128,6 +134,9 @@
#ifdef TARGET_OS_FAMILY_bsd
# include "c1_globals_bsd.hpp"
#endif
#ifdef TARGET_ARCH_ppc
# include "c1_globals_ppc.hpp"
#endif
#endif
#ifdef COMPILER2
#ifdef TARGET_ARCH_x86
@ -142,6 +151,9 @@
#ifdef TARGET_ARCH_ppc
# include "c2_globals_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "c2_globals_aarch64.hpp"
#endif
#ifdef TARGET_OS_FAMILY_linux
# include "c2_globals_linux.hpp"
#endif

@ -83,6 +83,9 @@ class AbstractICache : AllStatic {
#ifdef TARGET_ARCH_ppc
# include "icache_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "icache_aarch64.hpp"
#endif

@ -46,6 +46,9 @@
#ifdef TARGET_ARCH_ppc
# include "jniTypes_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "jniTypes_aarch64.hpp"
#endif
// A JavaCallWrapper is constructed before each JavaCall and destructed after the call.
// Its purpose is to allocate/deallocate a new handle block and to save/restore the last

@ -92,6 +92,9 @@ friend class JavaCallWrapper;
#ifdef TARGET_ARCH_ppc
# include "javaFrameAnchor_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "javaFrameAnchor_aarch64.hpp"
#endif
public:

@ -41,6 +41,9 @@
#ifdef TARGET_OS_ARCH_linux_arm
# include "orderAccess_linux_arm.inline.hpp"
#endif
#ifdef TARGET_OS_ARCH_linux_aarch64
# include "orderAccess_linux_aarch64.inline.hpp"
#endif
#ifdef TARGET_OS_ARCH_linux_ppc
# include "orderAccess_linux_ppc.inline.hpp"
#endif

@ -804,6 +804,9 @@ class os: AllStatic {
#ifdef TARGET_OS_ARCH_aix_ppc
# include "os_aix_ppc.hpp"
#endif
#ifdef TARGET_OS_ARCH_linux_aarch64
# include "os_linux_aarch64.hpp"
#endif
#ifdef TARGET_OS_ARCH_bsd_x86
# include "os_bsd_x86.hpp"
#endif

@ -40,6 +40,9 @@
#ifdef TARGET_OS_ARCH_linux_arm
# include "prefetch_linux_arm.inline.hpp"
#endif
#ifdef TARGET_OS_ARCH_linux_aarch64
# include "prefetch_linux_aarch64.inline.hpp"
#endif
#ifdef TARGET_OS_ARCH_linux_ppc
# include "prefetch_linux_ppc.inline.hpp"
#endif

@ -135,6 +135,9 @@ class RegisterMap : public StackObj {
#ifdef TARGET_ARCH_ppc
# include "registerMap_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "registerMap_aarch64.hpp"
#endif
};

@ -104,6 +104,9 @@ class StubRoutines: AllStatic {
#endif
#ifdef TARGET_ARCH_MODEL_ppc_64
# include "stubRoutines_ppc_64.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_aarch64
# include "stubRoutines_aarch64.hpp"
#endif

@ -1694,6 +1694,9 @@ class JavaThread: public Thread {
#ifdef TARGET_OS_ARCH_linux_ppc
# include "thread_linux_ppc.hpp"
#endif
#ifdef TARGET_OS_ARCH_linux_aarch64
# include "thread_linux_aarch64.hpp"
#endif
#ifdef TARGET_OS_ARCH_aix_ppc
# include "thread_aix_ppc.hpp"
#endif

@ -68,6 +68,9 @@ class ThreadLocalStorage : AllStatic {
#ifdef TARGET_OS_ARCH_linux_ppc
# include "threadLS_linux_ppc.hpp"
#endif
#ifdef TARGET_OS_ARCH_linux_aarch64
# include "threadLS_linux_aarch64.hpp"
#endif
#ifdef TARGET_OS_ARCH_aix_ppc
# include "threadLS_aix_ppc.hpp"
#endif

@ -122,6 +122,9 @@
#ifdef TARGET_ARCH_ppc
# include "vmStructs_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "vmStructs_aarch64.hpp"
#endif
#ifdef TARGET_OS_ARCH_linux_x86
# include "vmStructs_linux_x86.hpp"
#endif
@ -146,6 +149,9 @@
#ifdef TARGET_OS_ARCH_linux_ppc
# include "vmStructs_linux_ppc.hpp"
#endif
#ifdef TARGET_OS_ARCH_linux_aarch64
# include "vmStructs_linux_aarch64.hpp"
#endif
#ifdef TARGET_OS_ARCH_aix_ppc
# include "vmStructs_aix_ppc.hpp"
#endif

@ -196,6 +196,7 @@ const char* Abstract_VM_Version::jre_release_version() {
ARM_ONLY("arm") \
PPC32_ONLY("ppc") \
PPC64_ONLY("ppc64") \
AARCH64_ONLY("aarch64") \
SPARC_ONLY("sparc")
#endif // ZERO

@ -40,5 +40,8 @@
#ifdef TARGET_ARCH_ppc
# include "bytes_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "bytes_aarch64.hpp"
#endif
#endif // SHARE_VM_UTILITIES_BYTES_HPP

@ -337,6 +337,9 @@ class Copy : AllStatic {
#ifdef TARGET_ARCH_ppc
# include "copy_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "copy_aarch64.hpp"
#endif
};

@ -417,6 +417,11 @@ enum RTMState {
ProfileRTM = 0x0 // Use RTM with abort ratio calculation
};
// The maximum size of the code cache. Can be overridden by targets.
#define CODE_CACHE_SIZE_LIMIT (2*G)
// Allow targets to reduce the default size of the code cache.
#define CODE_CACHE_DEFAULT_LIMIT CODE_CACHE_SIZE_LIMIT
#ifdef TARGET_ARCH_x86
# include "globalDefinitions_x86.hpp"
#endif
@ -432,6 +437,9 @@ enum RTMState {
#ifdef TARGET_ARCH_ppc
# include "globalDefinitions_ppc.hpp"
#endif
#ifdef TARGET_ARCH_aarch64
# include "globalDefinitions_aarch64.hpp"
#endif
/*
* If a platform does not support native stack walking

@ -401,6 +401,14 @@
#define NOT_ARM(code) code
#endif
#ifdef AARCH64
#define AARCH64_ONLY(code) code
#define NOT_AARCH64(code)
#else
#define AARCH64_ONLY(code)
#define NOT_AARCH64(code) code
#endif
#ifdef JAVASE_EMBEDDED
#define EMBEDDED_ONLY(code) code
#define NOT_EMBEDDED(code)