8309685: Fix -Wconversion warnings in assembler and register code
Reviewed-by: aph, fparain
This commit is contained in:
parent
370b8b2644
commit
230bcb769a
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2000, 2023, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2014, 2021, Red Hat Inc. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
@ -52,7 +52,7 @@ class Register {
|
||||
|
||||
public:
|
||||
// accessors
|
||||
constexpr int raw_encoding() const { return this - first(); }
|
||||
constexpr int raw_encoding() const { return checked_cast<int>(this - first()); }
|
||||
constexpr int encoding() const { assert(is_valid(), "invalid register"); return raw_encoding(); }
|
||||
constexpr bool is_valid() const { return 0 <= raw_encoding() && raw_encoding() < number_of_registers; }
|
||||
|
||||
@ -175,7 +175,7 @@ class FloatRegister {
|
||||
|
||||
public:
|
||||
// accessors
|
||||
constexpr int raw_encoding() const { return this - first(); }
|
||||
constexpr int raw_encoding() const { return checked_cast<int>(this - first()); }
|
||||
constexpr int encoding() const { assert(is_valid(), "invalid register"); return raw_encoding(); }
|
||||
constexpr bool is_valid() const { return 0 <= raw_encoding() && raw_encoding() < number_of_registers; }
|
||||
|
||||
@ -308,7 +308,7 @@ public:
|
||||
|
||||
public:
|
||||
// accessors
|
||||
int raw_encoding() const { return this - first(); }
|
||||
int raw_encoding() const { return checked_cast<int>(this - first()); }
|
||||
int encoding() const { assert(is_valid(), "invalid register"); return raw_encoding(); }
|
||||
bool is_valid() const { return 0 <= raw_encoding() && raw_encoding() < number_of_registers; }
|
||||
bool is_governing() const { return 0 <= raw_encoding() && raw_encoding() < number_of_governing_registers; }
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2000, 2020, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2000, 2023, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2020, 2023, Huawei Technologies Co., Ltd. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
@ -70,7 +70,7 @@ class Register {
|
||||
|
||||
public:
|
||||
// accessors
|
||||
constexpr int raw_encoding() const { return this - first(); }
|
||||
constexpr int raw_encoding() const { return checked_cast<int>(this - first()); }
|
||||
constexpr int encoding() const { assert(is_valid(), "invalid register"); return raw_encoding(); }
|
||||
constexpr bool is_valid() const { return 0 <= raw_encoding() && raw_encoding() < number_of_registers; }
|
||||
|
||||
@ -187,7 +187,7 @@ class FloatRegister {
|
||||
|
||||
public:
|
||||
// accessors
|
||||
constexpr int raw_encoding() const { return this - first(); }
|
||||
constexpr int raw_encoding() const { return checked_cast<int>(this - first()); }
|
||||
constexpr int encoding() const { assert(is_valid(), "invalid register"); return raw_encoding(); }
|
||||
constexpr bool is_valid() const { return 0 <= raw_encoding() && raw_encoding() < number_of_registers; }
|
||||
|
||||
@ -297,7 +297,7 @@ class VectorRegister {
|
||||
|
||||
public:
|
||||
// accessors
|
||||
constexpr int raw_encoding() const { return this - first(); }
|
||||
constexpr int raw_encoding() const { return checked_cast<int>(this - first()); }
|
||||
constexpr int encoding() const { assert(is_valid(), "invalid register"); return raw_encoding(); }
|
||||
constexpr bool is_valid() const { return 0 <= raw_encoding() && raw_encoding() < number_of_registers; }
|
||||
|
||||
|
@ -1922,7 +1922,7 @@ void Assembler::crc32(Register crc, Address adr, int8_t sizeInBytes) {
|
||||
int8_t w = 0x01;
|
||||
Prefix p = Prefix_EMPTY;
|
||||
|
||||
emit_int8((int8_t)0xF2);
|
||||
emit_int8((uint8_t)0xF2);
|
||||
switch (sizeInBytes) {
|
||||
case 1:
|
||||
w = 0;
|
||||
@ -2522,7 +2522,7 @@ void Assembler::jmp_literal(address dest, RelocationHolder const& rspec) {
|
||||
assert(dest != nullptr, "must have a target");
|
||||
intptr_t disp = dest - (pc() + sizeof(int32_t));
|
||||
assert(is_simm32(disp), "must be 32bit offset (jmp)");
|
||||
emit_data(disp, rspec, call32_operand);
|
||||
emit_data(checked_cast<int32_t>(disp), rspec, call32_operand);
|
||||
}
|
||||
|
||||
void Assembler::jmpb_0(Label& L, const char* file, int line) {
|
||||
|
@ -238,7 +238,7 @@ class Address {
|
||||
_index(index.register_or_noreg()),
|
||||
_xmmindex(xnoreg),
|
||||
_scale(scale),
|
||||
_disp (disp + (index.constant_or_zero() * scale_size(scale))),
|
||||
_disp (disp + checked_cast<int>(index.constant_or_zero() * scale_size(scale))),
|
||||
_isxmmindex(false){
|
||||
if (!index.is_register()) scale = Address::no_scale;
|
||||
assert(!_index->is_valid() == (scale == Address::no_scale),
|
||||
@ -276,7 +276,7 @@ class Address {
|
||||
}
|
||||
Address plus_disp(RegisterOrConstant disp, ScaleFactor scale = times_1) const {
|
||||
Address a = (*this);
|
||||
a._disp += disp.constant_or_zero() * scale_size(scale);
|
||||
a._disp += checked_cast<int>(disp.constant_or_zero() * scale_size(scale));
|
||||
if (disp.is_register()) {
|
||||
assert(!a.index()->is_valid(), "competing indexes");
|
||||
a._index = disp.as_register();
|
||||
|
@ -2021,10 +2021,10 @@ void MacroAssembler::post_call_nop() {
|
||||
InstructionMark im(this);
|
||||
relocate(post_call_nop_Relocation::spec());
|
||||
InlineSkippedInstructionsCounter skipCounter(this);
|
||||
emit_int8((int8_t)0x0f);
|
||||
emit_int8((int8_t)0x1f);
|
||||
emit_int8((int8_t)0x84);
|
||||
emit_int8((int8_t)0x00);
|
||||
emit_int8((uint8_t)0x0f);
|
||||
emit_int8((uint8_t)0x1f);
|
||||
emit_int8((uint8_t)0x84);
|
||||
emit_int8((uint8_t)0x00);
|
||||
emit_int32(0x00);
|
||||
}
|
||||
|
||||
@ -2033,11 +2033,11 @@ void MacroAssembler::fat_nop() {
|
||||
if (UseAddressNop) {
|
||||
addr_nop_5();
|
||||
} else {
|
||||
emit_int8((int8_t)0x26); // es:
|
||||
emit_int8((int8_t)0x2e); // cs:
|
||||
emit_int8((int8_t)0x64); // fs:
|
||||
emit_int8((int8_t)0x65); // gs:
|
||||
emit_int8((int8_t)0x90);
|
||||
emit_int8((uint8_t)0x26); // es:
|
||||
emit_int8((uint8_t)0x2e); // cs:
|
||||
emit_int8((uint8_t)0x64); // fs:
|
||||
emit_int8((uint8_t)0x65); // gs:
|
||||
emit_int8((uint8_t)0x90);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -117,13 +117,13 @@ class MacroAssembler: public Assembler {
|
||||
if (op == 0xEB || (op & 0xF0) == 0x70) {
|
||||
// short offset operators (jmp and jcc)
|
||||
char* disp = (char*) &branch[1];
|
||||
int imm8 = target - (address) &disp[1];
|
||||
int imm8 = checked_cast<int>(target - (address) &disp[1]);
|
||||
guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset at %s:%d",
|
||||
file == nullptr ? "<null>" : file, line);
|
||||
*disp = imm8;
|
||||
*disp = (char)imm8;
|
||||
} else {
|
||||
int* disp = (int*) &branch[(op == 0x0F || op == 0xC7)? 2: 1];
|
||||
int imm32 = target - (address) &disp[1];
|
||||
int imm32 = checked_cast<int>(target - (address) &disp[1]);
|
||||
*disp = imm32;
|
||||
}
|
||||
}
|
||||
@ -749,7 +749,7 @@ public:
|
||||
void addptr(Register dst, int32_t src);
|
||||
void addptr(Register dst, Register src);
|
||||
void addptr(Register dst, RegisterOrConstant src) {
|
||||
if (src.is_constant()) addptr(dst, src.as_constant());
|
||||
if (src.is_constant()) addptr(dst, checked_cast<int>(src.as_constant()));
|
||||
else addptr(dst, src.as_register());
|
||||
}
|
||||
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2000, 2023, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -56,7 +56,7 @@ public:
|
||||
|
||||
public:
|
||||
// accessors
|
||||
constexpr int raw_encoding() const { return this - first(); }
|
||||
constexpr int raw_encoding() const { return checked_cast<int>(this - first()); }
|
||||
constexpr int encoding() const { assert(is_valid(), "invalid register"); return raw_encoding(); }
|
||||
constexpr bool is_valid() const { return 0 <= raw_encoding() && raw_encoding() < number_of_registers; }
|
||||
bool has_byte_register() const { return 0 <= raw_encoding() && raw_encoding() < number_of_byte_registers; }
|
||||
@ -139,7 +139,7 @@ public:
|
||||
|
||||
public:
|
||||
// accessors
|
||||
int raw_encoding() const { return this - first(); }
|
||||
int raw_encoding() const { return checked_cast<int>(this - first()); }
|
||||
int encoding() const { assert(is_valid(), "invalid register"); return raw_encoding(); }
|
||||
bool is_valid() const { return 0 <= raw_encoding() && raw_encoding() < number_of_registers; }
|
||||
|
||||
@ -202,7 +202,7 @@ public:
|
||||
|
||||
public:
|
||||
// accessors
|
||||
constexpr int raw_encoding() const { return this - first(); }
|
||||
constexpr int raw_encoding() const { return checked_cast<int>(this - first()); }
|
||||
constexpr int encoding() const { assert(is_valid(), "invalid register"); return raw_encoding(); }
|
||||
constexpr bool is_valid() const { return 0 <= raw_encoding() && raw_encoding() < number_of_registers; }
|
||||
|
||||
@ -313,7 +313,7 @@ public:
|
||||
public:
|
||||
|
||||
// accessors
|
||||
int raw_encoding() const { return this - first(); }
|
||||
int raw_encoding() const { return checked_cast<int>(this - first()); }
|
||||
int encoding() const { assert(is_valid(), "invalid register"); return raw_encoding(); }
|
||||
bool is_valid() const { return 0 <= raw_encoding() && raw_encoding() < number_of_registers; }
|
||||
|
||||
|
@ -3137,8 +3137,8 @@ uint VM_Version::threads_per_core() {
|
||||
return (result == 0 ? 1 : result);
|
||||
}
|
||||
|
||||
intx VM_Version::L1_line_size() {
|
||||
intx result = 0;
|
||||
uint VM_Version::L1_line_size() {
|
||||
uint result = 0;
|
||||
if (is_intel()) {
|
||||
result = (_cpuid_info.dcp_cpuid4_ebx.bits.L1_line_size + 1);
|
||||
} else if (is_amd_family()) {
|
||||
|
@ -633,9 +633,9 @@ public:
|
||||
|
||||
static uint cores_per_cpu();
|
||||
static uint threads_per_core();
|
||||
static intx L1_line_size();
|
||||
static uint L1_line_size();
|
||||
|
||||
static intx prefetch_data_size() {
|
||||
static uint prefetch_data_size() {
|
||||
return L1_line_size();
|
||||
}
|
||||
|
||||
|
@ -86,7 +86,7 @@ address AbstractAssembler::start_a_const(int required_space, int required_align)
|
||||
CodeSection* cs = cb->consts();
|
||||
assert(_code_section == cb->insts() || _code_section == cb->stubs(), "not in insts/stubs?");
|
||||
address end = cs->end();
|
||||
int pad = -(intptr_t)end & (required_align-1);
|
||||
int pad = checked_cast<int>(-(intptr_t)end & (required_align-1));
|
||||
if (cs->maybe_expand_to_ensure_remaining(pad + required_space)) {
|
||||
if (cb->blob() == nullptr) return nullptr;
|
||||
end = cs->end(); // refresh pointer
|
||||
|
@ -252,7 +252,7 @@ class AbstractAssembler : public ResourceObj {
|
||||
InlineSkippedInstructionsCounter(AbstractAssembler* assm) : _assm(assm), _start(assm->pc()) {
|
||||
}
|
||||
~InlineSkippedInstructionsCounter() {
|
||||
_assm->register_skipped(_assm->pc() - _start);
|
||||
_assm->register_skipped(checked_cast<int>(_assm->pc() - _start));
|
||||
}
|
||||
};
|
||||
|
||||
|
@ -30,7 +30,7 @@
|
||||
// used by SA and jvmti, but it's a leaky abstraction: SA and jvmti
|
||||
// "know" that stack0 is an integer masquerading as a pointer. For the
|
||||
// sake of those clients, we preserve this interface.
|
||||
VMReg VMRegImpl::stack0 = (VMReg)VMRegImpl::stack_0()->value();
|
||||
VMReg VMRegImpl::stack0 = (VMReg)(intptr_t)VMRegImpl::stack_0()->value();
|
||||
|
||||
// VMRegs are 4 bytes wide on all platforms
|
||||
const int VMRegImpl::stack_slot_size = 4;
|
||||
@ -42,7 +42,7 @@ const char *VMRegImpl::regName[ConcreteRegisterImpl::number_of_registers];
|
||||
|
||||
void VMRegImpl::print_on(outputStream* st) const {
|
||||
if (is_reg()) {
|
||||
assert(VMRegImpl::regName[value()], "VMRegImpl::regName[" INTPTR_FORMAT "] returns nullptr", value());
|
||||
assert(VMRegImpl::regName[value()], "VMRegImpl::regName[%d] returns nullptr", value());
|
||||
st->print("%s",VMRegImpl::regName[value()]);
|
||||
} else if (is_stack()) {
|
||||
int stk = reg2stack();
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1998, 2022, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1998, 2023, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -88,7 +88,7 @@ public:
|
||||
return "STACKED REG";
|
||||
}
|
||||
}
|
||||
intptr_t value() const { return this - first(); }
|
||||
int value() const { return checked_cast<int>(this - first()); }
|
||||
static VMReg Bad() { return BAD_REG+first(); }
|
||||
bool is_valid() const { return value() != BAD_REG; }
|
||||
bool is_stack() const { return this >= stack_0(); }
|
||||
@ -143,9 +143,9 @@ public:
|
||||
return stack_0() + idx;
|
||||
}
|
||||
|
||||
uintptr_t reg2stack() const {
|
||||
int reg2stack() const {
|
||||
assert(is_stack(), "Not a stack-based register");
|
||||
return this - stack_0();
|
||||
return checked_cast<int>(this - stack_0());
|
||||
}
|
||||
|
||||
static void set_regName();
|
||||
|
@ -281,15 +281,15 @@ void OopMapSort::print() {
|
||||
OopMapValue omv = _values[i];
|
||||
if (omv.type() == OopMapValue::oop_value || omv.type() == OopMapValue::narrowoop_value) {
|
||||
if (omv.reg()->is_reg()) {
|
||||
tty->print_cr("[%c][%d] -> reg (" INTPTR_FORMAT ")", omv.type() == OopMapValue::narrowoop_value ? 'n' : 'o', i, omv.reg()->value());
|
||||
tty->print_cr("[%c][%d] -> reg (%d)", omv.type() == OopMapValue::narrowoop_value ? 'n' : 'o', i, omv.reg()->value());
|
||||
} else {
|
||||
tty->print_cr("[%c][%d] -> stack (" INTPTR_FORMAT ")", omv.type() == OopMapValue::narrowoop_value ? 'n' : 'o', i, omv.reg()->reg2stack() * VMRegImpl::stack_slot_size);
|
||||
tty->print_cr("[%c][%d] -> stack (%d)", omv.type() == OopMapValue::narrowoop_value ? 'n' : 'o', i, omv.reg()->reg2stack() * VMRegImpl::stack_slot_size);
|
||||
}
|
||||
} else {
|
||||
if (omv.content_reg()->is_reg()) {
|
||||
tty->print_cr("[d][%d] -> reg (" INTPTR_FORMAT ") stack (" INTPTR_FORMAT ")", i, omv.content_reg()->value(), omv.reg()->reg2stack() * VMRegImpl::stack_slot_size);
|
||||
tty->print_cr("[d][%d] -> reg (%d) stack (%d)", i, omv.content_reg()->value(), omv.reg()->reg2stack() * VMRegImpl::stack_slot_size);
|
||||
} else if (omv.reg()->is_reg()) {
|
||||
tty->print_cr("[d][%d] -> stack (" INTPTR_FORMAT ") reg (" INTPTR_FORMAT ")", i, omv.content_reg()->reg2stack() * VMRegImpl::stack_slot_size, omv.reg()->value());
|
||||
tty->print_cr("[d][%d] -> stack (%d) reg (%d)", i, omv.content_reg()->reg2stack() * VMRegImpl::stack_slot_size, omv.reg()->value());
|
||||
} else {
|
||||
int derived_offset = omv.reg()->reg2stack() * VMRegImpl::stack_slot_size;
|
||||
int base_offset = omv.content_reg()->reg2stack() * VMRegImpl::stack_slot_size;
|
||||
|
@ -54,9 +54,9 @@ enum class derived_pointer : intptr_t {};
|
||||
class OopMapValue: public StackObj {
|
||||
friend class VMStructs;
|
||||
private:
|
||||
short _value;
|
||||
int value() const { return _value; }
|
||||
void set_value(int value) { _value = value; }
|
||||
unsigned short _value;
|
||||
unsigned short value() const { return _value; }
|
||||
void set_value(unsigned short value) { _value = value; }
|
||||
short _content_reg;
|
||||
|
||||
public:
|
||||
@ -88,8 +88,8 @@ public:
|
||||
}
|
||||
|
||||
private:
|
||||
void set_reg_type(VMReg p, oop_types t) {
|
||||
set_value((p->value() << register_shift) | t);
|
||||
void set_reg_type(VMReg p, oop_types t) {
|
||||
set_value(checked_cast<unsigned short>((p->value() << register_shift) | t));
|
||||
assert(reg() == p, "sanity check" );
|
||||
assert(type() == t, "sanity check" );
|
||||
}
|
||||
@ -103,7 +103,7 @@ public:
|
||||
} else {
|
||||
assert (!r->is_valid(), "valid VMReg not allowed");
|
||||
}
|
||||
_content_reg = r->value();
|
||||
_content_reg = checked_cast<short>(r->value());
|
||||
}
|
||||
|
||||
public:
|
||||
@ -111,12 +111,12 @@ public:
|
||||
void write_on(CompressedWriteStream* stream) {
|
||||
stream->write_int(value());
|
||||
if(is_callee_saved() || is_derived_oop()) {
|
||||
stream->write_int(content_reg()->value());
|
||||
stream->write_int(checked_cast<int>(content_reg()->value()));
|
||||
}
|
||||
}
|
||||
|
||||
void read_from(CompressedReadStream* stream) {
|
||||
set_value(stream->read_int());
|
||||
set_value(checked_cast<unsigned short>(stream->read_int()));
|
||||
if (is_callee_saved() || is_derived_oop()) {
|
||||
set_content_reg(VMRegImpl::as_VMReg(stream->read_int(), true));
|
||||
}
|
||||
@ -128,7 +128,7 @@ public:
|
||||
bool is_callee_saved() { return mask_bits(value(), type_mask_in_place) == callee_saved_value; }
|
||||
bool is_derived_oop() { return mask_bits(value(), type_mask_in_place) == derived_oop_value; }
|
||||
|
||||
VMReg reg() const { return VMRegImpl::as_VMReg(mask_bits(value(), register_mask_in_place) >> register_shift); }
|
||||
VMReg reg() const { return VMRegImpl::as_VMReg(checked_cast<int>(mask_bits(value(), register_mask_in_place) >> register_shift)); }
|
||||
oop_types type() const { return (oop_types)mask_bits(value(), type_mask_in_place); }
|
||||
|
||||
static bool legal_vm_reg_name(VMReg p) {
|
||||
|
@ -113,7 +113,7 @@ void OopMapDo<OopFnT, DerivedOopFnT, ValueFilterT>::iterate_oops_do(const frame
|
||||
if (reg_map->should_skip_missing())
|
||||
continue;
|
||||
VMReg reg = omv.reg();
|
||||
tty->print_cr("missing saved register: reg: " INTPTR_FORMAT " %s loc: %p", reg->value(), reg->name(), loc);
|
||||
tty->print_cr("missing saved register: reg: %d %s loc: %p", reg->value(), reg->name(), loc);
|
||||
fr->print_on(tty);
|
||||
}
|
||||
#endif
|
||||
|
@ -1012,7 +1012,7 @@ class CompiledArgumentOopFinder: public SignatureIterator {
|
||||
}
|
||||
tty->print_cr("Error walking frame oops:");
|
||||
_fr.print_on(tty);
|
||||
assert(loc != nullptr, "missing register map entry reg: " INTPTR_FORMAT " %s loc: " INTPTR_FORMAT, reg->value(), reg->name(), p2i(loc));
|
||||
assert(loc != nullptr, "missing register map entry reg: %d %s loc: " INTPTR_FORMAT, reg->value(), reg->name(), p2i(loc));
|
||||
}
|
||||
#endif
|
||||
_f->do_oop(loc);
|
||||
@ -1441,7 +1441,7 @@ void frame::describe(FrameValues& values, int frame_no, const RegisterMap* reg_m
|
||||
assert(t == sig_bt[sig_index], "sigs in sync");
|
||||
VMReg fst = regs[sig_index].first();
|
||||
if (fst->is_stack()) {
|
||||
assert(((int)fst->reg2stack()) >= 0, "reg2stack: " INTPTR_FORMAT, fst->reg2stack());
|
||||
assert(((int)fst->reg2stack()) >= 0, "reg2stack: %d", fst->reg2stack());
|
||||
int offset = (fst->reg2stack() + out_preserve) * VMRegImpl::stack_slot_size + stack_slot_offset;
|
||||
intptr_t* stack_address = (intptr_t*)((address)unextended_sp() + offset);
|
||||
if (at_this) {
|
||||
|
@ -514,7 +514,7 @@ class FrameValues {
|
||||
if (a->location == b->location) {
|
||||
return a->priority - b->priority;
|
||||
}
|
||||
return a->location - b->location;
|
||||
return checked_cast<int>(a->location - b->location);
|
||||
}
|
||||
|
||||
void print_on(outputStream* out, int min_index, int max_index, intptr_t* v0, intptr_t* v1,
|
||||
|
@ -1995,7 +1995,7 @@ void SharedRuntime::check_member_name_argument_is_last_argument(const methodHand
|
||||
for (int i = 0; i < member_arg_pos; i++) {
|
||||
VMReg a = regs_with_member_name[i].first();
|
||||
VMReg b = regs_without_member_name[i].first();
|
||||
assert(a->value() == b->value(), "register allocation mismatch: a=" INTX_FORMAT ", b=" INTX_FORMAT, a->value(), b->value());
|
||||
assert(a->value() == b->value(), "register allocation mismatch: a= %d, b= %d", a->value(), b->value());
|
||||
}
|
||||
assert(regs_with_member_name[member_arg_pos].first()->is_valid(), "bad member arg");
|
||||
}
|
||||
|
@ -517,7 +517,7 @@ inline size_t pointer_delta(const MetaWord* left, const MetaWord* right) {
|
||||
// everything: it isn't intended to make sure that pointer types are
|
||||
// compatible, for example.
|
||||
template <typename T2, typename T1>
|
||||
T2 checked_cast(T1 thing) {
|
||||
constexpr T2 checked_cast(T1 thing) {
|
||||
T2 result = static_cast<T2>(thing);
|
||||
assert(static_cast<T1>(result) == thing, "must be");
|
||||
return result;
|
||||
|
Loading…
Reference in New Issue
Block a user