8297092: [macos_aarch64] Add support for SHA feature detection
Reviewed-by: njian, aph, gziemski
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parent
f52f6e65fb
commit
240830df7e
src/hotspot
@ -342,10 +342,14 @@ void VM_Version::initialize() {
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}
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if (UseSHA && VM_Version::supports_sha3()) {
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// Do not auto-enable UseSHA3Intrinsics until it has been fully tested on hardware
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// if (FLAG_IS_DEFAULT(UseSHA3Intrinsics)) {
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// FLAG_SET_DEFAULT(UseSHA3Intrinsics, true);
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// }
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// Auto-enable UseSHA3Intrinsics on hardware with performance benefit.
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// Note that the evaluation of UseSHA3Intrinsics shows better performance
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// on Apple silicon but worse performance on Neoverse V1 and N2.
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if (_cpu == CPU_APPLE) { // Apple silicon
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if (FLAG_IS_DEFAULT(UseSHA3Intrinsics)) {
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FLAG_SET_DEFAULT(UseSHA3Intrinsics, true);
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}
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}
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} else if (UseSHA3Intrinsics) {
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warning("Intrinsics for SHA3-224, SHA3-256, SHA3-384 and SHA3-512 crypto hash functions not available on this CPU.");
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FLAG_SET_DEFAULT(UseSHA3Intrinsics, false);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006, 2022, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2006, 2023, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2014, 2019, Red Hat Inc. All rights reserved.
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* Copyright (c) 2021, Azul Systems, Inc. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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@ -53,20 +53,46 @@ static bool cpu_has(const char* optional) {
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void VM_Version::get_os_cpu_info() {
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size_t sysctllen;
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// hw.optional.floatingpoint always returns 1, see
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// https://github.com/apple/darwin-xnu/blob/master/bsd/kern/kern_mib.c#L416.
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// ID_AA64PFR0_EL1 describes AdvSIMD always equals to FP field.
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assert(cpu_has("hw.optional.floatingpoint"), "should be");
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assert(cpu_has("hw.optional.neon"), "should be");
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// cpu_has() uses sysctlbyname function to check the existence of CPU
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// features. References: Apple developer document [1] and XNU kernel [2].
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// [1] https://developer.apple.com/documentation/kernel/1387446-sysctlbyname/determining_instruction_set_characteristics
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// [2] https://github.com/apple-oss-distributions/xnu/blob/main/bsd/kern/kern_mib.c
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//
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// Note that for some features (e.g., LSE, SHA512 and SHA3) there are two
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// parameters for sysctlbyname, which are invented at different times.
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// Considering backward compatibility, we check both here.
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//
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// Floating-point and Advance SIMD features are standard in Apple processors
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// beginning with M1 and A7, and don't need to be checked [1].
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// 1) hw.optional.floatingpoint always returns 1 [2].
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// 2) ID_AA64PFR0_EL1 describes AdvSIMD always equals to FP field.
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// See the Arm ARM, section "ID_AA64PFR0_EL1, AArch64 Processor Feature
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// Register 0".
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_features = CPU_FP | CPU_ASIMD;
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// All Apple-darwin Arm processors have AES and PMULL.
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_features |= CPU_AES | CPU_PMULL;
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// All Apple-darwin Arm processors have AES, PMULL, SHA1 and SHA2.
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// See https://github.com/apple-oss-distributions/xnu/blob/main/osfmk/arm/commpage/commpage.c#L412
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assert(cpu_has("hw.optional.arm.FEAT_AES"), "should be");
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assert(cpu_has("hw.optional.arm.FEAT_PMULL"), "should be");
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assert(cpu_has("hw.optional.arm.FEAT_SHA1"), "should be");
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assert(cpu_has("hw.optional.arm.FEAT_SHA256"), "should be");
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_features |= CPU_AES | CPU_PMULL | CPU_SHA1 | CPU_SHA2;
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// Only few features are available via sysctl, see line 614
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// https://opensource.apple.com/source/xnu/xnu-6153.141.1/bsd/kern/kern_mib.c.auto.html
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if (cpu_has("hw.optional.armv8_crc32")) _features |= CPU_CRC32;
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if (cpu_has("hw.optional.armv8_1_atomics")) _features |= CPU_LSE;
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if (cpu_has("hw.optional.armv8_crc32")) {
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_features |= CPU_CRC32;
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}
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if (cpu_has("hw.optional.arm.FEAT_LSE") ||
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cpu_has("hw.optional.armv8_1_atomics")) {
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_features |= CPU_LSE;
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}
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if (cpu_has("hw.optional.arm.FEAT_SHA512") ||
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cpu_has("hw.optional.armv8_2_sha512")) {
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_features |= CPU_SHA512;
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}
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if (cpu_has("hw.optional.arm.FEAT_SHA3") ||
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cpu_has("hw.optional.armv8_2_sha3")) {
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_features |= CPU_SHA3;
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}
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int cache_line_size;
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int hw_conf_cache_line[] = { CTL_HW, HW_CACHELINE };
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