This commit is contained in:
Vladimir Kozlov 2015-03-12 15:51:12 -07:00
commit 2632925f9f
31 changed files with 311 additions and 307 deletions

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -30,7 +30,7 @@
#include <stdint.h>
#include "proc_service.h"
#if defined(arm) || defined(ppc)
#ifdef ALT_SASRCDIR
#include "libproc_md.h"
#endif

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@ -1,5 +1,5 @@
#
# Copyright (c) 2006, 2013, Oracle and/or its affiliates. All rights reserved.
# Copyright (c) 2006, 2015, Oracle and/or its affiliates. All rights reserved.
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
#
# This code is free software; you can redistribute it and/or modify it
@ -286,7 +286,7 @@ ifneq ($(OSNAME),windows)
# Use uname output for SRCARCH, but deal with platform differences. If ARCH
# is not explicitly listed below, it is treated as x86.
SRCARCH = $(ARCH/$(filter sparc sparc64 ia64 amd64 x86_64 arm ppc ppc64 aarch64 zero,$(ARCH)))
SRCARCH ?= $(ARCH/$(filter sparc sparc64 ia64 amd64 x86_64 ppc ppc64 aarch64 zero,$(ARCH)))
ARCH/ = x86
ARCH/sparc = sparc
ARCH/sparc64= sparc
@ -295,12 +295,11 @@ ifneq ($(OSNAME),windows)
ARCH/x86_64 = x86
ARCH/ppc64 = ppc
ARCH/ppc = ppc
ARCH/arm = arm
ARCH/aarch64= aarch64
ARCH/zero = zero
# BUILDARCH is usually the same as SRCARCH, except for sparcv9
BUILDARCH = $(SRCARCH)
BUILDARCH ?= $(SRCARCH)
ifeq ($(BUILDARCH), x86)
ifdef LP64
BUILDARCH = amd64
@ -320,7 +319,7 @@ ifneq ($(OSNAME),windows)
endif
# LIBARCH is 1:1 mapping from BUILDARCH
LIBARCH = $(LIBARCH/$(BUILDARCH))
LIBARCH ?= $(LIBARCH/$(BUILDARCH))
LIBARCH/i486 = i386
LIBARCH/amd64 = amd64
LIBARCH/sparc = sparc
@ -328,8 +327,6 @@ ifneq ($(OSNAME),windows)
LIBARCH/ia64 = ia64
LIBARCH/ppc64 = ppc64
LIBARCH/aarch64 = aarch64
LIBARCH/ppc = ppc
LIBARCH/arm = arm
LIBARCH/zero = $(ZERO_LIBARCH)
LP64_ARCH = sparcv9 amd64 ia64 ppc64 aarch64 zero

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@ -1,31 +0,0 @@
#
# Copyright (c) 2008, 2013, Oracle and/or its affiliates. All rights reserved.
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
#
# This code is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License version 2 only, as
# published by the Free Software Foundation.
#
# This code is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# version 2 for more details (a copy is included in the LICENSE file that
# accompanied this code).
#
# You should have received a copy of the GNU General Public License version
# 2 along with this work; if not, write to the Free Software Foundation,
# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
#
# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
# or visit www.oracle.com if you need additional information or have any
# questions.
#
#
Obj_Files += linux_arm.o
ifneq ($(EXT_LIBS_PATH),)
LIBS += $(EXT_LIBS_PATH)/sflt_glibc.a
endif
CFLAGS += -DVM_LITTLE_ENDIAN

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@ -1,5 +1,5 @@
#
# Copyright (c) 2005, 2014, Oracle and/or its affiliates. All rights reserved.
# Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
#
# This code is free software; you can redistribute it and/or modify it
@ -70,6 +70,8 @@ else
PLATFORM_FILE = $(GAMMADIR)/make/$(OS_FAMILY)/platform_$(BUILDARCH).suncc
else
PLATFORM_FILE = $(GAMMADIR)/make/$(OS_FAMILY)/platform_$(BUILDARCH)
ALT_PLATFORM_FILE = $(HS_ALT_MAKE)/$(OS_FAMILY)/platform_$(BUILDARCH)
PLATFORM_FILE := $(if $(wildcard $(ALT_PLATFORM_FILE)),$(ALT_PLATFORM_FILE),$(PLATFORM_FILE))
endif
endif
@ -203,7 +205,7 @@ flags.make: $(BUILDTREE_MAKE) ../shared_dirs.lst
$(QUIETLY) ( \
$(BUILDTREE_COMMENT); \
echo; \
echo "Platform_file = $(PLATFORM_FILE)" | sed 's|$(GAMMADIR)|$$(GAMMADIR)|'; \
echo "Platform_file = $(PLATFORM_FILE)" | sed -e 's|$(HS_ALT_MAKE)|$$(HS_ALT_MAKE)|' -e 's|$(GAMMADIR)|$$(GAMMADIR)|'; \
sed -n '/=/s/^ */Platform_/p' < $(PLATFORM_FILE); \
echo; \
echo "GAMMADIR = $(GAMMADIR)"; \

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@ -1,5 +1,5 @@
#
# Copyright (c) 2006, 2014, Oracle and/or its affiliates. All rights reserved.
# Copyright (c) 2006, 2015, Oracle and/or its affiliates. All rights reserved.
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
#
# This code is free software; you can redistribute it and/or modify it
@ -105,14 +105,6 @@ ifneq (,$(findstring $(ARCH), amd64 x86_64 i686 i586))
HS_ARCH = x86
endif
# ARM
ifeq ($(ARCH), arm)
ARCH_DATA_MODEL = 32
PLATFORM = linux-arm
VM_PLATFORM = linux_arm
HS_ARCH = arm
endif
# PPC
# Notice: after 8046471 ARCH will be 'ppc' for top-level ppc64 builds but
# 'ppc64' for HotSpot-only ppc64 builds. Need to detect both variants here!
@ -121,10 +113,6 @@ ifneq (,$(findstring $(ARCH), ppc ppc64))
MAKE_ARGS += LP64=1
PLATFORM = linux-ppc64
VM_PLATFORM = linux_ppc64
else
ARCH_DATA_MODEL = 32
PLATFORM = linux-ppc
VM_PLATFORM = linux_ppc
endif
HS_ARCH = ppc

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@ -1,5 +1,5 @@
#
# Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
# Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
#
# This code is free software; you can redistribute it and/or modify it
@ -176,11 +176,7 @@ ARCHFLAG/aarch64 =
ARCHFLAG/ia64 =
ARCHFLAG/sparc = -m32 -mcpu=v9
ARCHFLAG/sparcv9 = -m64 -mcpu=v9
ARCHFLAG/arm = -fsigned-char
ARCHFLAG/zero = $(ZERO_ARCHFLAG)
ifndef E500V2
ARCHFLAG/ppc = -mcpu=powerpc
endif
ARCHFLAG/ppc64 = -m64
CFLAGS += $(ARCHFLAG)
@ -188,10 +184,6 @@ AOUT_FLAGS += $(ARCHFLAG)
LFLAGS += $(ARCHFLAG)
ASFLAGS += $(ARCHFLAG)
ifdef E500V2
CFLAGS += -DE500V2
endif
# Use C++ Interpreter
ifdef CC_INTERP
CFLAGS += -DCC_INTERP
@ -391,3 +383,5 @@ endif
ifndef USE_SUNCC
CFLAGS += -fno-omit-frame-pointer
endif
-include $(HS_ALT_MAKE)/linux/makefiles/gcc.make

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@ -1,33 +0,0 @@
#
# Copyright (c) 2004, 2012, Oracle and/or its affiliates. All rights reserved.
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
#
# This code is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License version 2 only, as
# published by the Free Software Foundation.
#
# This code is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# version 2 for more details (a copy is included in the LICENSE file that
# accompanied this code).
#
# You should have received a copy of the GNU General Public License version
# 2 along with this work; if not, write to the Free Software Foundation,
# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
#
# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
# or visit www.oracle.com if you need additional information or have any
# questions.
#
#
# The copied fdlibm routines in sharedRuntimeTrig.o must not be optimized
OPT_CFLAGS/sharedRuntimeTrig.o = $(OPT_CFLAGS/NOOPT)
# Must also specify if CPU is big endian
CFLAGS += -DVM_BIG_ENDIAN
ifdef E500V2
ASFLAGS += -Wa,-mspe -Wa,--defsym -Wa,E500V2=1
endif

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@ -1,5 +1,5 @@
#
# Copyright (c) 2005, 2014, Oracle and/or its affiliates. All rights reserved.
# Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
#
# This code is free software; you can redistribute it and/or modify it
@ -69,19 +69,21 @@ endif
endif
ifneq ($(ALT_SASRCDIR),)
ALT_SAINCDIR=-I$(ALT_SASRCDIR)
ALT_SAINCDIR=-I$(ALT_SASRCDIR) -DALT_SASRCDIR
else
ALT_SAINCDIR=
endif
SA_LFLAGS = $(MAPFLAG:FILENAME=$(SAMAPFILE)) $(LDFLAGS_HASH_STYLE)
SAARCH ?= $(BUILDARCH)
$(LIBSAPROC): $(SASRCFILES) $(SAMAPFILE)
$(QUIETLY) if [ "$(BOOT_JAVA_HOME)" = "" ]; then \
echo "ALT_BOOTDIR, BOOTDIR or JAVA_HOME needs to be defined to build SA"; \
exit 1; \
fi
@echo $(LOG_INFO) Making SA debugger back-end...
$(QUIETLY) $(CC) -D$(BUILDARCH) -D_GNU_SOURCE \
$(QUIETLY) $(CC) -D$(SAARCH) -D_GNU_SOURCE \
-D_FILE_OFFSET_BITS=64 \
$(SYMFLAG) $(ARCHFLAG) $(SHARED_FLAG) $(PICFLAG) \
-I$(SASRCDIR) \

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@ -45,8 +45,9 @@ DEP_DIR = $(GENERATED)/dependencies
ifeq ($(findstring true, $(JVM_VARIANT_ZERO) $(JVM_VARIANT_ZEROSHARK)), true)
include $(MAKEFILES_DIR)/zeroshark.make
else
include $(MAKEFILES_DIR)/$(BUILDARCH).make
-include $(HS_ALT_MAKE)/$(Platform_os_family)/makefiles/$(BUILDARCH).make
BUILDARCH_MAKE = $(MAKEFILES_DIR)/$(BUILDARCH).make
ALT_BUILDARCH_MAKE = $(HS_ALT_MAKE)/$(Platform_os_family)/makefiles/$(BUILDARCH).make
include $(if $(wildcard $(ALT_BUILDARCH_MAKE)),$(ALT_BUILDARCH_MAKE),$(BUILDARCH_MAKE))
endif
# set VPATH so make knows where to look for source files

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@ -1,17 +0,0 @@
os_family = linux
arch = arm
arch_model = arm
os_arch = linux_arm
os_arch_model = linux_arm
lib_arch = arm
compiler = gcc
gnu_dis_arch = arm
sysdefs = -DLINUX -D_GNU_SOURCE -DARM

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@ -1,17 +0,0 @@
os_family = linux
arch = ppc
arch_model = ppc_32
os_arch = linux_ppc
os_arch_model = linux_ppc_32
lib_arch = ppc
compiler = gcc
gnu_dis_arch = ppc
sysdefs = -DLINUX -D_GNU_SOURCE -DPPC32

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@ -227,31 +227,7 @@ bool os::have_special_privileges() {
#endif
// Cpu architecture string
#if defined(ZERO)
static char cpu_arch[] = ZERO_LIBARCH;
#elif defined(IA64)
static char cpu_arch[] = "ia64";
#elif defined(IA32)
static char cpu_arch[] = "i386";
#elif defined(AMD64)
static char cpu_arch[] = "amd64";
#elif defined(ARM)
static char cpu_arch[] = "arm";
#elif defined(PPC32)
static char cpu_arch[] = "ppc";
#elif defined(PPC64)
static char cpu_arch[] = "ppc64";
#elif defined(SPARC)
#ifdef _LP64
static char cpu_arch[] = "sparcv9";
#else
static char cpu_arch[] = "sparc";
#endif
#elif defined(AARCH64)
static char cpu_arch[] = "aarch64";
#else
#error Add appropriate cpu_arch setting
#endif
static char cpu_arch[] = HOTSPOT_LIB_ARCH;
// pid_t gettid()
@ -3296,7 +3272,7 @@ size_t os::Linux::find_large_page_size() {
#ifndef ZERO
large_page_size = IA32_ONLY(4 * M) AMD64_ONLY(2 * M) IA64_ONLY(256 * M) SPARC_ONLY(4 * M)
ARM_ONLY(2 * M) PPC_ONLY(4 * M) AARCH64_ONLY(2 * M);
ARM32_ONLY(2 * M) PPC_ONLY(4 * M) AARCH64_ONLY(2 * M);
#endif // ZERO
FILE *fp = fopen("/proc/meminfo", "r");

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@ -142,16 +142,11 @@ LIR_Address::Scale LIR_Address::scale(BasicType type) {
#ifndef PRODUCT
void LIR_Address::verify() const {
void LIR_Address::verify0() const {
#if defined(SPARC) || defined(PPC)
assert(scale() == times_1, "Scaled addressing mode not available on SPARC/PPC and should not be used");
assert(disp() == 0 || index()->is_illegal(), "can't have both");
#endif
#ifdef ARM
assert(disp() == 0 || index()->is_illegal(), "can't have both");
// Note: offsets higher than 4096 must not be rejected here. They can
// be handled by the back-end or will be rejected if not.
#endif
#ifdef _LP64
assert(base()->is_cpu_register(), "wrong base operand");
#ifndef AARCH64

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@ -25,6 +25,7 @@
#ifndef SHARE_VM_C1_C1_LIR_HPP
#define SHARE_VM_C1_C1_LIR_HPP
#include "c1/c1_Defs.hpp"
#include "c1/c1_ValueType.hpp"
#include "oops/method.hpp"
@ -561,7 +562,13 @@ class LIR_Address: public LIR_OprPtr {
virtual BasicType type() const { return _type; }
virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
void verify() const PRODUCT_RETURN;
void verify0() const PRODUCT_RETURN;
#if defined(LIR_ADDRESS_PD_VERIFY) && !defined(PRODUCT)
void pd_verify() const;
void verify() const { pd_verify(); }
#else
void verify() const { verify0(); }
#endif
static Scale scale(BasicType type);
};
@ -610,7 +617,7 @@ class LIR_OprFact: public AllStatic {
LIR_OprDesc::float_type |
LIR_OprDesc::fpu_register |
LIR_OprDesc::single_size); }
#if defined(ARM)
#if defined(ARM32)
static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); }
static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); }

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@ -23,6 +23,7 @@
*/
#include "precompiled.hpp"
#include "c1/c1_Defs.hpp"
#include "c1/c1_Compilation.hpp"
#include "c1/c1_FrameMap.hpp"
#include "c1/c1_Instruction.hpp"
@ -49,10 +50,7 @@
#define __ gen()->lir()->
#endif
// TODO: ARM - Use some recognizable constant which still fits architectural constraints
#ifdef ARM
#define PATCHED_ADDR (204)
#else
#ifndef PATCHED_ADDR
#define PATCHED_ADDR (max_jint)
#endif
@ -1600,24 +1598,9 @@ void LIRGenerator::CardTableModRef_post_barrier(LIR_OprDesc* addr, LIR_OprDesc*
}
assert(addr->is_register(), "must be a register at this point");
#ifdef ARM
// TODO: ARM - move to platform-dependent code
LIR_Opr tmp = FrameMap::R14_opr;
if (VM_Version::supports_movw()) {
__ move((LIR_Opr)card_table_base, tmp);
} else {
__ move(new LIR_Address(FrameMap::Rthread_opr, in_bytes(JavaThread::card_table_base_offset()), T_ADDRESS), tmp);
}
LIR_Address *card_addr = new LIR_Address(tmp, addr, (LIR_Address::Scale) -CardTableModRefBS::card_shift, 0, T_BYTE);
if(((int)ct->byte_map_base & 0xff) == 0) {
__ move(tmp, card_addr);
} else {
LIR_Opr tmp_zero = new_register(T_INT);
__ move(LIR_OprFact::intConst(0), tmp_zero);
__ move(tmp_zero, card_addr);
}
#else // ARM
#ifdef CARDTABLEMODREF_POST_BARRIER_HELPER
CardTableModRef_post_barrier_helper(addr, card_table_base);
#else
LIR_Opr tmp = new_pointer_register();
if (TwoOperandLIRForm) {
__ move(addr, tmp);
@ -1633,7 +1616,7 @@ void LIRGenerator::CardTableModRef_post_barrier(LIR_OprDesc* addr, LIR_OprDesc*
new LIR_Address(tmp, load_constant(card_table_base),
T_BYTE));
}
#endif // ARM
#endif
}
@ -2123,7 +2106,7 @@ void LIRGenerator::do_UnsafeGetRaw(UnsafeGetRaw* x) {
} else {
#ifdef X86
addr = new LIR_Address(base_op, index_op, LIR_Address::Scale(log2_scale), 0, dst_type);
#elif defined(ARM)
#elif defined(GENERATE_ADDRESS_IS_PREFERRED)
addr = generate_address(base_op, index_op, log2_scale, 0, dst_type);
#else
if (index_op->is_illegal() || log2_scale == 0) {
@ -2177,6 +2160,9 @@ void LIRGenerator::do_UnsafePutRaw(UnsafePutRaw* x) {
LIR_Opr base_op = base.result();
LIR_Opr index_op = idx.result();
#ifdef GENERATE_ADDRESS_IS_PREFERRED
LIR_Address* addr = generate_address(base_op, index_op, log2_scale, 0, x->basic_type());
#else
#ifndef _LP64
if (base_op->type() == T_LONG) {
base_op = new_register(T_INT);
@ -2210,6 +2196,7 @@ void LIRGenerator::do_UnsafePutRaw(UnsafePutRaw* x) {
}
LIR_Address* addr = new LIR_Address(base_op, index_op, x->basic_type());
#endif // !GENERATE_ADDRESS_IS_PREFERRED
__ move(value.result(), addr);
}

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@ -275,6 +275,9 @@ class LIRGenerator: public InstructionVisitor, public BlockClosure {
void G1SATBCardTableModRef_post_barrier(LIR_OprDesc* addr, LIR_OprDesc* new_val);
void CardTableModRef_post_barrier(LIR_OprDesc* addr, LIR_OprDesc* new_val);
#ifdef CARDTABLEMODREF_POST_BARRIER_HELPER
void CardTableModRef_post_barrier_helper(LIR_OprDesc* addr, LIR_Const* card_table_base);
#endif
static LIR_Opr result_register_for(ValueType* type, bool callee = false);
@ -546,6 +549,10 @@ class LIRGenerator: public InstructionVisitor, public BlockClosure {
#ifdef ASSERT
virtual void do_Assert (Assert* x);
#endif
#ifdef C1_LIRGENERATOR_MD_HPP
#include C1_LIRGENERATOR_MD_HPP
#endif
};

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2005, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -2123,7 +2123,7 @@ LIR_Opr LinearScan::calc_operand_for_interval(const Interval* interval) {
assert(interval->assigned_regHi() >= pd_first_fpu_reg && interval->assigned_regHi() <= pd_last_fpu_reg, "no fpu register");
assert(assigned_reg % 2 == 0 && assigned_reg + 1 == interval->assigned_regHi(), "must be sequential and even");
LIR_Opr result = LIR_OprFact::double_fpu(interval->assigned_regHi() - pd_first_fpu_reg, assigned_reg - pd_first_fpu_reg);
#elif defined(ARM)
#elif defined(ARM32)
assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register");
assert(interval->assigned_regHi() >= pd_first_fpu_reg && interval->assigned_regHi() <= pd_last_fpu_reg, "no fpu register");
assert(assigned_reg % 2 == 0 && assigned_reg + 1 == interval->assigned_regHi(), "must be sequential and even");
@ -2712,7 +2712,7 @@ int LinearScan::append_scope_value_for_operand(LIR_Opr opr, GrowableArray<ScopeV
#ifdef SPARC
assert(opr->fpu_regnrLo() == opr->fpu_regnrHi() + 1, "assumed in calculation (only fpu_regnrHi is used)");
#endif
#ifdef ARM
#ifdef ARM32
assert(opr->fpu_regnrHi() == opr->fpu_regnrLo() + 1, "assumed in calculation (only fpu_regnrLo is used)");
#endif
#ifdef PPC

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@ -1,5 +1,5 @@
/*
* Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -1120,7 +1120,7 @@ JRT_ENTRY(void, Runtime1::patch_code(JavaThread* thread, Runtime1::StubID stub_i
#ifdef ARM
if((load_klass_or_mirror_patch_id ||
stub_id == Runtime1::load_appendix_patching_id) &&
!VM_Version::supports_movw()) {
nativeMovConstReg_at(copy_buff)->is_pc_relative()) {
nmethod* nm = CodeCache::find_nmethod(instr_pc);
address addr = NULL;
assert(nm != NULL, "invalid nmethod_pc");

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, 2015, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -27,25 +27,17 @@
#include "asm/macroAssembler.hpp"
#ifdef TARGET_ARCH_x86
#if defined INTERP_MASM_MD_HPP
# include INTERP_MASM_MD_HPP
#elif defined TARGET_ARCH_x86
# include "interp_masm_x86.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_sparc
#elif defined TARGET_ARCH_MODEL_sparc
# include "interp_masm_sparc.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_zero
#elif defined TARGET_ARCH_MODEL_zero
# include "interp_masm_zero.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_arm
# include "interp_masm_arm.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_ppc_32
# include "interp_masm_ppc_32.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_ppc_64
#elif defined TARGET_ARCH_MODEL_ppc_64
# include "interp_masm_ppc_64.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_aarch64
#elif defined TARGET_ARCH_MODEL_aarch64
# include "interp_masm_aarch64.hpp"
#endif

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@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -341,28 +341,19 @@ class TemplateTable: AllStatic {
static Template* template_for_wide(Bytecodes::Code code) { Bytecodes::wide_check(code); return &_template_table_wide[code]; }
// Platform specifics
#ifdef TARGET_ARCH_MODEL_x86_32
#if defined TEMPLATETABLE_MD_HPP
# include TEMPLATETABLE_MD_HPP
#elif defined TARGET_ARCH_MODEL_x86_32
# include "templateTable_x86_32.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_x86_64
#elif defined TARGET_ARCH_MODEL_x86_64
# include "templateTable_x86_64.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_sparc
#elif defined TARGET_ARCH_MODEL_sparc
# include "templateTable_sparc.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_zero
#elif defined TARGET_ARCH_MODEL_zero
# include "templateTable_zero.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_arm
# include "templateTable_arm.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_ppc_32
# include "templateTable_ppc_32.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_ppc_64
#elif defined TARGET_ARCH_MODEL_ppc_64
# include "templateTable_ppc_64.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_aarch64
#elif defined TARGET_ARCH_MODEL_aarch64
# include "templateTable_aarch64.hpp"
#endif

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@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -139,7 +139,7 @@ class Generation: public CHeapObj<mtGC> {
// GenGrain.
// Note: on ARM we add 1 bit for card_table_base to be properly aligned
// (we expect its low byte to be zero - see implementation of post_barrier)
LogOfGenGrain = 16 ARM_ONLY(+1),
LogOfGenGrain = 16 ARM32_ONLY(+1),
GenGrain = 1 << LogOfGenGrain
};

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, 2015, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -25,28 +25,19 @@
#ifndef SHARE_VM_OPTO_AD_HPP
#define SHARE_VM_OPTO_AD_HPP
#ifdef TARGET_ARCH_MODEL_x86_32
#if defined AD_MD_HPP
# include AD_MD_HPP
#elif defined TARGET_ARCH_MODEL_x86_32
# include "adfiles/ad_x86_32.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_x86_64
#elif defined TARGET_ARCH_MODEL_x86_64
# include "adfiles/ad_x86_64.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_sparc
#elif defined TARGET_ARCH_MODEL_sparc
# include "adfiles/ad_sparc.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_zero
#elif defined TARGET_ARCH_MODEL_zero
# include "adfiles/ad_zero.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_arm
# include "adfiles/ad_arm.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_ppc_32
# include "adfiles/ad_ppc_32.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_ppc_64
#elif defined TARGET_ARCH_MODEL_ppc_64
# include "adfiles/ad_ppc_64.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_aarch64
#elif defined TARGET_ARCH_MODEL_aarch64
# include "adfiles/ad_aarch64.hpp"
#endif

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -847,7 +847,7 @@ void PhaseChaitin::gather_lrg_masks( bool after_aggressive ) {
case Op_RegD:
lrg.set_num_regs(2);
// Define platform specific register pressure
#if defined(SPARC) || defined(ARM)
#if defined(SPARC) || defined(ARM32)
lrg.set_reg_pressure(2);
#elif defined(IA32)
if( ireg == Op_RegL ) {

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2006, 2015, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -27,28 +27,19 @@
// AdGlobals contains c2 specific register handling code as specified
// in the .ad files.
#ifdef TARGET_ARCH_MODEL_x86_32
#if defined ADGLOBALS_MD_HPP
# include ADGLOBALS_MD_HPP
#elif defined TARGET_ARCH_MODEL_x86_32
# include "adfiles/adGlobals_x86_32.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_x86_64
#elif defined TARGET_ARCH_MODEL_x86_64
# include "adfiles/adGlobals_x86_64.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_sparc
#elif defined TARGET_ARCH_MODEL_sparc
# include "adfiles/adGlobals_sparc.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_zero
#elif defined TARGET_ARCH_MODEL_zero
# include "adfiles/adGlobals_zero.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_arm
# include "adfiles/adGlobals_arm.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_ppc_32
# include "adfiles/adGlobals_ppc_32.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_ppc_64
#elif defined TARGET_ARCH_MODEL_ppc_64
# include "adfiles/adGlobals_ppc_64.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_aarch64
#elif defined TARGET_ARCH_MODEL_aarch64
# include "adfiles/adGlobals_aarch64.hpp"
#endif

View File

@ -1133,6 +1133,75 @@ WB_ENTRY(void, WB_ForceSafepoint(JNIEnv* env, jobject wb))
VMThread::execute(&force_safepoint_op);
WB_END
template <typename T>
static bool GetMethodOption(JavaThread* thread, JNIEnv* env, jobject method, jstring name, T* value) {
assert(value != NULL, "sanity");
if (method == NULL || name == NULL) {
return false;
}
jmethodID jmid = reflected_method_to_jmid(thread, env, method);
CHECK_JNI_EXCEPTION_(env, false);
methodHandle mh(thread, Method::checked_resolve_jmethod_id(jmid));
// can't be in VM when we call JNI
ThreadToNativeFromVM ttnfv(thread);
const char* flag_name = env->GetStringUTFChars(name, NULL);
bool result = CompilerOracle::has_option_value(mh, flag_name, *value);
env->ReleaseStringUTFChars(name, flag_name);
return result;
}
WB_ENTRY(jobject, WB_GetMethodBooleaneOption(JNIEnv* env, jobject wb, jobject method, jstring name))
bool result;
if (GetMethodOption<bool> (thread, env, method, name, &result)) {
// can't be in VM when we call JNI
ThreadToNativeFromVM ttnfv(thread);
return booleanBox(thread, env, result);
}
return NULL;
WB_END
WB_ENTRY(jobject, WB_GetMethodIntxOption(JNIEnv* env, jobject wb, jobject method, jstring name))
intx result;
if (GetMethodOption <intx> (thread, env, method, name, &result)) {
// can't be in VM when we call JNI
ThreadToNativeFromVM ttnfv(thread);
return longBox(thread, env, result);
}
return NULL;
WB_END
WB_ENTRY(jobject, WB_GetMethodUintxOption(JNIEnv* env, jobject wb, jobject method, jstring name))
uintx result;
if (GetMethodOption <uintx> (thread, env, method, name, &result)) {
// can't be in VM when we call JNI
ThreadToNativeFromVM ttnfv(thread);
return longBox(thread, env, result);
}
return NULL;
WB_END
WB_ENTRY(jobject, WB_GetMethodDoubleOption(JNIEnv* env, jobject wb, jobject method, jstring name))
double result;
if (GetMethodOption <double> (thread, env, method, name, &result)) {
// can't be in VM when we call JNI
ThreadToNativeFromVM ttnfv(thread);
return doubleBox(thread, env, result);
}
return NULL;
WB_END
WB_ENTRY(jobject, WB_GetMethodStringOption(JNIEnv* env, jobject wb, jobject method, jstring name))
ccstr ccstrResult;
if (GetMethodOption <ccstr> (thread, env, method, name, &ccstrResult)) {
// can't be in VM when we call JNI
ThreadToNativeFromVM ttnfv(thread);
jstring result = env->NewStringUTF(ccstrResult);
CHECK_JNI_EXCEPTION_(env, NULL);
return result;
}
return NULL;
WB_END
//Some convenience methods to deal with objects from java
int WhiteBox::offset_for_field(const char* field_name, oop object,
Symbol* signature_symbol) {
@ -1333,6 +1402,21 @@ static JNINativeMethod methods[] = {
{CC"assertMatchingSafepointCalls", CC"(ZZ)V", (void*)&WB_AssertMatchingSafepointCalls },
{CC"isMonitorInflated", CC"(Ljava/lang/Object;)Z", (void*)&WB_IsMonitorInflated },
{CC"forceSafepoint", CC"()V", (void*)&WB_ForceSafepoint },
{CC"getMethodBooleanOption",
CC"(Ljava/lang/reflect/Executable;Ljava/lang/String;)Ljava/lang/Boolean;",
(void*)&WB_GetMethodBooleaneOption},
{CC"getMethodIntxOption",
CC"(Ljava/lang/reflect/Executable;Ljava/lang/String;)Ljava/lang/Long;",
(void*)&WB_GetMethodIntxOption},
{CC"getMethodUintxOption",
CC"(Ljava/lang/reflect/Executable;Ljava/lang/String;)Ljava/lang/Long;",
(void*)&WB_GetMethodUintxOption},
{CC"getMethodDoubleOption",
CC"(Ljava/lang/reflect/Executable;Ljava/lang/String;)Ljava/lang/Double;",
(void*)&WB_GetMethodDoubleOption},
{CC"getMethodStringOption",
CC"(Ljava/lang/reflect/Executable;Ljava/lang/String;)Ljava/lang/String;",
(void*)&WB_GetMethodStringOption},
};
#undef CC

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -84,32 +84,22 @@ class StubRoutines: AllStatic {
// Dependencies
friend class StubGenerator;
#ifdef TARGET_ARCH_MODEL_x86_32
#if defined STUBROUTINES_MD_HPP
# include STUBROUTINES_MD_HPP
#elif defined TARGET_ARCH_MODEL_x86_32
# include "stubRoutines_x86_32.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_x86_64
#elif defined TARGET_ARCH_MODEL_x86_64
# include "stubRoutines_x86_64.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_sparc
#elif defined TARGET_ARCH_MODEL_sparc
# include "stubRoutines_sparc.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_zero
#elif defined TARGET_ARCH_MODEL_zero
# include "stubRoutines_zero.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_arm
# include "stubRoutines_arm.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_ppc_32
# include "stubRoutines_ppc_32.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_ppc_64
#elif defined TARGET_ARCH_MODEL_ppc_64
# include "stubRoutines_ppc_64.hpp"
#endif
#ifdef TARGET_ARCH_MODEL_aarch64
#elif defined TARGET_ARCH_MODEL_aarch64
# include "stubRoutines_aarch64.hpp"
#endif
static jint _verify_oop_count;
static address _verify_oop_subroutine_entry;

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1998, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1998, 2015, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -187,18 +187,18 @@ const char* Abstract_VM_Version::jre_release_version() {
AIX_ONLY("aix") \
BSD_ONLY("bsd")
#ifndef CPU
#ifdef ZERO
#define CPU ZERO_LIBARCH
#else
#define CPU IA32_ONLY("x86") \
IA64_ONLY("ia64") \
AMD64_ONLY("amd64") \
ARM_ONLY("arm") \
PPC32_ONLY("ppc") \
PPC64_ONLY("ppc64") \
AARCH64_ONLY("aarch64") \
SPARC_ONLY("sparc")
#endif // ZERO
#endif
const char *Abstract_VM_Version::vm_platform_string() {
return OS "-" CPU;
@ -251,12 +251,6 @@ const char* Abstract_VM_Version::internal_vm_info_string() {
#ifndef FLOAT_ARCH
#if defined(__SOFTFP__)
#define FLOAT_ARCH_STR "-sflt"
#elif defined(E500V2)
#define FLOAT_ARCH_STR "-e500v2"
#elif defined(ARM)
#define FLOAT_ARCH_STR "-vfp"
#elif defined(PPC32)
#define FLOAT_ARCH_STR "-hflt"
#else
#define FLOAT_ARCH_STR ""
#endif

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1998, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1998, 2015, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -220,7 +220,7 @@ extern "C" {
#define DEBUG_EXCEPTION ::abort();
#ifdef ARM
#ifdef ARM32
#ifdef SOLARIS
#define BREAKPOINT __asm__ volatile (".long 0xe1200070")
#else

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -392,7 +392,6 @@
#define NOT_E500V2(code) code
#endif
#ifdef ARM
#define ARM_ONLY(code) code
#define NOT_ARM(code)
@ -401,6 +400,14 @@
#define NOT_ARM(code) code
#endif
#ifdef ARM32
#define ARM32_ONLY(code) code
#define NOT_ARM32(code)
#else
#define ARM32_ONLY(code)
#define NOT_ARM32(code) code
#endif
#ifdef AARCH64
#define AARCH64_ONLY(code) code
#define NOT_AARCH64(code)

View File

@ -0,0 +1,104 @@
/*
* Copyright (c) 2015, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
*/
import java.lang.reflect.Executable;
import java.util.function.BiFunction;
import com.oracle.java.testlibrary.Asserts;
import sun.hotspot.WhiteBox;
/*
* @test
* @bug 8074980
* @library /testlibrary /../../test/lib
* @build sun.hotspot.WhiteBox com.oracle.java.testlibrary.Asserts GetMethodOptionTest
* @run main ClassFileInstaller sun.hotspot.WhiteBox
* sun.hotspot.WhiteBox$WhiteBoxPermission
* @run main/othervm -Xbootclasspath/a:. -XX:+UnlockDiagnosticVMOptions -XX:+WhiteBoxAPI
* -XX:CompileCommand=option,GetMethodOptionTest::test,ccstrlist,MyListOption,_foo,_bar
* -XX:CompileCommand=option,GetMethodOptionTest::test,ccstr,MyStrOption,_foo
* -XX:CompileCommand=option,GetMethodOptionTest::test,bool,MyBoolOption,false
* -XX:CompileCommand=option,GetMethodOptionTest::test,intx,MyIntxOption,-1
* -XX:CompileCommand=option,GetMethodOptionTest::test,uintx,MyUintxOption,1
* -XX:CompileCommand=option,GetMethodOptionTest::test,MyFlag
* -XX:CompileCommand=option,GetMethodOptionTest::test,double,MyDoubleOption1,1.123
* -XX:CompileCommand=option,GetMethodOptionTest.test,double,MyDoubleOption2,1.123
* -XX:CompileCommand=option,GetMethodOptionTest::test,bool,MyBoolOptionX,false,intx,MyIntxOptionX,-1,uintx,MyUintxOptionX,1,MyFlagX,double,MyDoubleOptionX,1.123
* GetMethodOptionTest
*/
public class GetMethodOptionTest {
private static final WhiteBox WB = WhiteBox.getWhiteBox();
public static void main(String[] args) {
Executable test = getMethod("test");
Executable test2 = getMethod("test2");
BiFunction<Executable, String, Object> getter = WB::getMethodOption;
for (TestCase testCase : TestCase.values()) {
Object expected = testCase.value;
String name = testCase.name();
Asserts.assertEQ(expected, getter.apply(test, name),
testCase + ": universal getter returns wrong value");
Asserts.assertEQ(expected, testCase.getter.apply(test, name),
testCase + ": specific getter returns wrong value");
Asserts.assertEQ(null, getter.apply(test2, name),
testCase + ": universal getter returns value for unused method");
Asserts.assertEQ(null, testCase.getter.apply(test2, name),
testCase + ": type specific getter returns value for unused method");
}
}
private static void test() { }
private static void test2() { }
private static enum TestCase {
MyListOption("_foo _bar", WB::getMethodStringOption),
MyStrOption("_foo", WB::getMethodStringOption),
MyBoolOption(false, WB::getMethodBooleanOption),
MyIntxOption(-1L, WB::getMethodIntxOption),
MyUintxOption(1L, WB::getMethodUintxOption),
MyFlag(true, WB::getMethodBooleanOption),
MyDoubleOption1(1.123d, WB::getMethodDoubleOption),
MyDoubleOption2(1.123d, WB::getMethodDoubleOption),
MyBoolOptionX(false, WB::getMethodBooleanOption),
MyIntxOptionX(-1L, WB::getMethodIntxOption),
MyUintxOptionX(1L, WB::getMethodUintxOption),
MyFlagX(true, WB::getMethodBooleanOption),
MyDoubleOptionX(1.123d, WB::getMethodDoubleOption);
public final Object value;
public final BiFunction<Executable, String, Object> getter;
private TestCase(Object value, BiFunction<Executable, String, Object> getter) {
this.value = value;
this.getter = getter;
}
}
private static Executable getMethod(String name) {
Executable result;
try {
result = GetMethodOptionTest.class.getDeclaredMethod(name);
} catch (NoSuchMethodException | SecurityException e) {
throw new Error("TESTBUG : can't get method " + name, e);
}
return result;
}
}

View File

@ -31,11 +31,13 @@
* @run main/othervm -Xbootclasspath/a:. -XX:+UnlockDiagnosticVMOptions
* -XX:+WhiteBoxAPI -Xmixed
* -XX:CompileCommand=compileonly,DeoptimizeFramesTest$TestCaseImpl::method
* -XX:-DeoptimizeRandom -XX:-DeoptimizeALot DeoptimizeFramesTest true
* -XX:+IgnoreUnexpectedVMOptions -XX:-DeoptimizeRandom -XX:-DeoptimizeALot
* DeoptimizeFramesTest true
* @run main/othervm -Xbootclasspath/a:. -XX:+UnlockDiagnosticVMOptions
* -XX:+WhiteBoxAPI -Xmixed
* -XX:CompileCommand=compileonly,DeoptimizeFramesTest$TestCaseImpl::method
* -XX:-DeoptimizeRandom -XX:-DeoptimizeALot DeoptimizeFramesTest false
* -XX:+IgnoreUnexpectedVMOptions -XX:-DeoptimizeRandom -XX:-DeoptimizeALot
* DeoptimizeFramesTest false
* @summary testing of WB::deoptimizeFrames()
*/
import java.lang.reflect.Executable;