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8300247: Harden C1 xchg on AArch64 and PPC

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Co-authored-by: Martin Doerr <mdoerr@openjdk.org>
Reviewed-by: aph, rcastanedalo
This commit is contained in:
Erik Österlund 2023-01-26 14:35:25 +00:00
parent 3f6338146e
commit 28545dcf2b
3 changed files with 11 additions and 4 deletions
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3
src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp
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@ -3185,7 +3185,8 @@ void LIR_Assembler::atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr
__ encode_heap_oop(rscratch2, obj);
obj = rscratch2;
}
assert_different_registers(obj, addr.base(), tmp, rscratch1, dst);
assert_different_registers(obj, addr.base(), tmp, rscratch1);
assert_different_registers(dst, addr.base(), tmp, rscratch1);
__ lea(tmp, addr);
(_masm->*xchg)(dst, obj, tmp);
if (is_oop && UseCompressedOops) {

9
src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp
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@ -3019,8 +3019,13 @@ void LIR_Assembler::atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr
__ lwarx(Rold, Rptr, MacroAssembler::cmpxchgx_hint_atomic_update());
__ stwcx_(Rco, Rptr);
} else {
const Register Robj = data->as_register();
assert_different_registers(Rptr, Rold, Robj);
Register Robj = data->as_register();
assert_different_registers(Rptr, Rold, Rtmp);
assert_different_registers(Rptr, Robj, Rtmp);
if (Robj == Rold) { // May happen with ZGC.
__ mr(Rtmp, Robj);
Robj = Rtmp;
}
__ ldarx(Rold, Rptr, MacroAssembler::cmpxchgx_hint_atomic_update());
__ stdcx_(Robj, Rptr);
}

3
src/hotspot/cpu/riscv/c1_LIRAssembler_riscv.cpp
View File

@ -1967,7 +1967,8 @@ void LIR_Assembler::atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr
__ encode_heap_oop(t0, obj);
obj = t0;
}
assert_different_registers(obj, addr.base(), tmp, dst);
assert_different_registers(obj, addr.base(), tmp);
assert_different_registers(dst, addr.base(), tmp);
__ la(tmp, addr);
(_masm->*xchg)(dst, obj, tmp);
if (is_oop && UseCompressedOops) {