From 2c1e4c381615ce52276f4bf331a1e7a845af4b6e Mon Sep 17 00:00:00 2001 From: Hamlin Li Date: Tue, 12 Nov 2024 10:15:04 +0000 Subject: [PATCH] 8343600: RISC-V: enable CRC32 intrinsic when either Zba or RVV are supported Reviewed-by: fyang --- src/hotspot/cpu/riscv/vm_version_riscv.cpp | 34 ++++++++++++---------- 1 file changed, 18 insertions(+), 16 deletions(-) diff --git a/src/hotspot/cpu/riscv/vm_version_riscv.cpp b/src/hotspot/cpu/riscv/vm_version_riscv.cpp index 5c4e3ec1df2..6e8ee1ab7e0 100644 --- a/src/hotspot/cpu/riscv/vm_version_riscv.cpp +++ b/src/hotspot/cpu/riscv/vm_version_riscv.cpp @@ -122,22 +122,6 @@ void VM_Version::common_initialize() { FLAG_SET_DEFAULT(AllocatePrefetchDistance, 0); } - if (UseZba) { - if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) { - FLAG_SET_DEFAULT(UseCRC32Intrinsics, true); - } - } else { - if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics)) { - warning("CRC32 intrinsic requires Zba instructions (not available on this CPU)"); - } - FLAG_SET_DEFAULT(UseCRC32Intrinsics, false); - } - - if (UseCRC32CIntrinsics) { - warning("CRC32C intrinsics are not available on this CPU."); - FLAG_SET_DEFAULT(UseCRC32CIntrinsics, false); - } - if (UseVectorizedMismatchIntrinsic) { warning("VectorizedMismatch intrinsic is not available on this CPU."); FLAG_SET_DEFAULT(UseVectorizedMismatchIntrinsic, false); @@ -217,6 +201,24 @@ void VM_Version::common_initialize() { _initial_vector_length = cpu_vector_length(); } } + + // Misc Intrinsics could depend on RVV + + if (UseZba || UseRVV) { + if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) { + FLAG_SET_DEFAULT(UseCRC32Intrinsics, true); + } + } else { + if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics)) { + warning("CRC32 intrinsic requires Zba or RVV instructions (not available on this CPU)"); + } + FLAG_SET_DEFAULT(UseCRC32Intrinsics, false); + } + + if (UseCRC32CIntrinsics) { + warning("CRC32C intrinsics are not available on this CPU."); + FLAG_SET_DEFAULT(UseCRC32CIntrinsics, false); + } } #ifdef COMPILER2