8321308: AArch64: Fix matching predication for cbz/cbnz

Reviewed-by: fyang, adinn, aph
This commit is contained in:
Fei Gao 2024-06-12 13:29:45 +00:00
parent 5a8a9fdfa5
commit 2c9185eb81
3 changed files with 131 additions and 15 deletions
src/hotspot/cpu/aarch64
test/hotspot/jtreg/compiler

@ -5628,24 +5628,24 @@ operand cmpOpLtGe()
// used for certain unsigned integral comparisons which can be
// converted to cbxx or tbxx instructions
operand cmpOpUEqNeLtGe()
operand cmpOpUEqNeLeGt()
%{
match(Bool);
op_cost(0);
predicate(n->as_Bool()->_test._test == BoolTest::eq
|| n->as_Bool()->_test._test == BoolTest::ne
|| n->as_Bool()->_test._test == BoolTest::lt
|| n->as_Bool()->_test._test == BoolTest::ge);
predicate(n->as_Bool()->_test._test == BoolTest::eq ||
n->as_Bool()->_test._test == BoolTest::ne ||
n->as_Bool()->_test._test == BoolTest::le ||
n->as_Bool()->_test._test == BoolTest::gt);
format %{ "" %}
interface(COND_INTER) %{
equal(0x0, "eq");
not_equal(0x1, "ne");
less(0xb, "lt");
greater_equal(0xa, "ge");
less_equal(0xd, "le");
greater(0xc, "gt");
less(0x3, "lo");
greater_equal(0x2, "hs");
less_equal(0x9, "ls");
greater(0x8, "hi");
overflow(0x6, "vs");
no_overflow(0x7, "vc");
%}
@ -15687,7 +15687,7 @@ instruct cmpP_narrowOop_imm0_branch(cmpOpEqNe cmp, iRegN oop, immP0 zero, label
ins_pipe(pipe_cmp_branch);
%}
instruct cmpUI_imm0_branch(cmpOpUEqNeLtGe cmp, iRegIorL2I op1, immI0 op2, label labl, rFlagsRegU cr) %{
instruct cmpUI_imm0_branch(cmpOpUEqNeLeGt cmp, iRegIorL2I op1, immI0 op2, label labl) %{
match(If cmp (CmpU op1 op2));
effect(USE labl);
@ -15696,15 +15696,17 @@ instruct cmpUI_imm0_branch(cmpOpUEqNeLtGe cmp, iRegIorL2I op1, immI0 op2, label
ins_encode %{
Label* L = $labl$$label;
Assembler::Condition cond = (Assembler::Condition)$cmp$$cmpcode;
if (cond == Assembler::EQ || cond == Assembler::LS)
if (cond == Assembler::EQ || cond == Assembler::LS) {
__ cbzw($op1$$Register, *L);
else
} else {
assert(cond == Assembler::NE || cond == Assembler::HI, "unexpected condition");
__ cbnzw($op1$$Register, *L);
}
%}
ins_pipe(pipe_cmp_branch);
%}
instruct cmpUL_imm0_branch(cmpOpUEqNeLtGe cmp, iRegL op1, immL0 op2, label labl, rFlagsRegU cr) %{
instruct cmpUL_imm0_branch(cmpOpUEqNeLeGt cmp, iRegL op1, immL0 op2, label labl) %{
match(If cmp (CmpUL op1 op2));
effect(USE labl);
@ -15713,10 +15715,12 @@ instruct cmpUL_imm0_branch(cmpOpUEqNeLtGe cmp, iRegL op1, immL0 op2, label labl,
ins_encode %{
Label* L = $labl$$label;
Assembler::Condition cond = (Assembler::Condition)$cmp$$cmpcode;
if (cond == Assembler::EQ || cond == Assembler::LS)
if (cond == Assembler::EQ || cond == Assembler::LS) {
__ cbz($op1$$Register, *L);
else
} else {
assert(cond == Assembler::NE || cond == Assembler::HI, "unexpected condition");
__ cbnz($op1$$Register, *L);
}
%}
ins_pipe(pipe_cmp_branch);
%}

@ -0,0 +1,92 @@
/*
* Copyright (c) 2024, Arm Limited. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
*/
package compiler.c2.irTests;
import compiler.lib.ir_framework.*;
import jdk.test.lib.Asserts;
/*
* @test
* @bug 8321308
* @summary AArch64: Fix matching predication for cbz/cbnz
* @requires os.arch=="aarch64"
* @library /test/lib /
* @run driver compiler.c2.irTests.TestArrLenCheckOptimization
*/
public class TestArrLenCheckOptimization {
int result = 0;
@Test
@IR(counts = {IRNode.CBZW_LS, "1"})
void test_le_int(int ia[]) {
result += ia[0];
}
@Test
@IR(counts = {IRNode.CBNZW_HI, "1"})
void test_gt_int(int ia[]) {
if (ia.length > 0) {
result += 0x88;
} else {
result -= 1;
}
}
@Test
@IR(counts = {IRNode.CBZ_LS, "1"})
void test_le_long(int ia[]) {
if (Long.compareUnsigned(ia.length, 0) > 0) {
result += 0x80;
} else {
result -= 1;
}
}
@Test
@IR(counts = {IRNode.CBZ_HI, "1"})
void test_gt_long(int ia[]) {
if (Long.compareUnsigned(ia.length, 0) > 0) {
result += 0x82;
} else {
result -= 1;
}
}
@Run(test = {"test_le_int", "test_gt_int", "test_le_long", "test_gt_long"},
mode = RunMode.STANDALONE)
public void test_runner() {
for (int i = 0; i < 10_000; i++) {
test_le_int(new int[1]);
test_gt_int(new int[0]);
test_le_long(new int[1]);
test_gt_long(new int[0]);
}
}
public static void main(String [] args) {
TestFramework.run();
}
}

@ -378,6 +378,26 @@ public class IRNode {
beforeMatchingNameRegex(CAST_LL, "CastLL");
}
public static final String CBNZW_HI = PREFIX + "CBNZW_HI" + POSTFIX;
static {
optoOnly(CBNZW_HI, "cbwhi");
}
public static final String CBZW_LS = PREFIX + "CBZW_LS" + POSTFIX;
static {
optoOnly(CBZW_LS, "cbwls");
}
public static final String CBZ_LS = PREFIX + "CBZ_LS" + POSTFIX;
static {
optoOnly(CBZ_LS, "cbls");
}
public static final String CBZ_HI = PREFIX + "CBZ_HI" + POSTFIX;
static {
optoOnly(CBZ_HI, "cbhi");
}
public static final String CHECKCAST_ARRAY = PREFIX + "CHECKCAST_ARRAY" + POSTFIX;
static {
String regex = "(((?i:cmp|CLFI|CLR).*precise \\[.*:|.*(?i:mov|mv|or).*precise \\[.*:.*\\R.*(cmp|CMP|CLR))" + END;