8321308: AArch64: Fix matching predication for cbz/cbnz
Reviewed-by: fyang, adinn, aph
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parent
5a8a9fdfa5
commit
2c9185eb81
src/hotspot/cpu/aarch64
test/hotspot/jtreg/compiler
@ -5628,24 +5628,24 @@ operand cmpOpLtGe()
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// used for certain unsigned integral comparisons which can be
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// converted to cbxx or tbxx instructions
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operand cmpOpUEqNeLtGe()
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operand cmpOpUEqNeLeGt()
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%{
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match(Bool);
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op_cost(0);
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predicate(n->as_Bool()->_test._test == BoolTest::eq
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|| n->as_Bool()->_test._test == BoolTest::ne
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|| n->as_Bool()->_test._test == BoolTest::lt
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|| n->as_Bool()->_test._test == BoolTest::ge);
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predicate(n->as_Bool()->_test._test == BoolTest::eq ||
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n->as_Bool()->_test._test == BoolTest::ne ||
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n->as_Bool()->_test._test == BoolTest::le ||
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n->as_Bool()->_test._test == BoolTest::gt);
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format %{ "" %}
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interface(COND_INTER) %{
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equal(0x0, "eq");
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not_equal(0x1, "ne");
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less(0xb, "lt");
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greater_equal(0xa, "ge");
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less_equal(0xd, "le");
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greater(0xc, "gt");
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less(0x3, "lo");
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greater_equal(0x2, "hs");
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less_equal(0x9, "ls");
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greater(0x8, "hi");
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overflow(0x6, "vs");
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no_overflow(0x7, "vc");
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%}
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@ -15687,7 +15687,7 @@ instruct cmpP_narrowOop_imm0_branch(cmpOpEqNe cmp, iRegN oop, immP0 zero, label
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ins_pipe(pipe_cmp_branch);
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%}
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instruct cmpUI_imm0_branch(cmpOpUEqNeLtGe cmp, iRegIorL2I op1, immI0 op2, label labl, rFlagsRegU cr) %{
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instruct cmpUI_imm0_branch(cmpOpUEqNeLeGt cmp, iRegIorL2I op1, immI0 op2, label labl) %{
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match(If cmp (CmpU op1 op2));
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effect(USE labl);
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@ -15696,15 +15696,17 @@ instruct cmpUI_imm0_branch(cmpOpUEqNeLtGe cmp, iRegIorL2I op1, immI0 op2, label
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ins_encode %{
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Label* L = $labl$$label;
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Assembler::Condition cond = (Assembler::Condition)$cmp$$cmpcode;
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if (cond == Assembler::EQ || cond == Assembler::LS)
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if (cond == Assembler::EQ || cond == Assembler::LS) {
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__ cbzw($op1$$Register, *L);
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else
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} else {
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assert(cond == Assembler::NE || cond == Assembler::HI, "unexpected condition");
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__ cbnzw($op1$$Register, *L);
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}
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%}
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ins_pipe(pipe_cmp_branch);
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%}
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instruct cmpUL_imm0_branch(cmpOpUEqNeLtGe cmp, iRegL op1, immL0 op2, label labl, rFlagsRegU cr) %{
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instruct cmpUL_imm0_branch(cmpOpUEqNeLeGt cmp, iRegL op1, immL0 op2, label labl) %{
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match(If cmp (CmpUL op1 op2));
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effect(USE labl);
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@ -15713,10 +15715,12 @@ instruct cmpUL_imm0_branch(cmpOpUEqNeLtGe cmp, iRegL op1, immL0 op2, label labl,
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ins_encode %{
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Label* L = $labl$$label;
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Assembler::Condition cond = (Assembler::Condition)$cmp$$cmpcode;
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if (cond == Assembler::EQ || cond == Assembler::LS)
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if (cond == Assembler::EQ || cond == Assembler::LS) {
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__ cbz($op1$$Register, *L);
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else
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} else {
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assert(cond == Assembler::NE || cond == Assembler::HI, "unexpected condition");
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__ cbnz($op1$$Register, *L);
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}
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%}
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ins_pipe(pipe_cmp_branch);
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%}
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@ -0,0 +1,92 @@
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/*
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* Copyright (c) 2024, Arm Limited. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*/
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package compiler.c2.irTests;
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import compiler.lib.ir_framework.*;
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import jdk.test.lib.Asserts;
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/*
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* @test
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* @bug 8321308
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* @summary AArch64: Fix matching predication for cbz/cbnz
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* @requires os.arch=="aarch64"
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* @library /test/lib /
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* @run driver compiler.c2.irTests.TestArrLenCheckOptimization
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*/
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public class TestArrLenCheckOptimization {
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int result = 0;
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@Test
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@IR(counts = {IRNode.CBZW_LS, "1"})
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void test_le_int(int ia[]) {
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result += ia[0];
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}
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@Test
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@IR(counts = {IRNode.CBNZW_HI, "1"})
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void test_gt_int(int ia[]) {
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if (ia.length > 0) {
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result += 0x88;
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} else {
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result -= 1;
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}
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}
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@Test
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@IR(counts = {IRNode.CBZ_LS, "1"})
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void test_le_long(int ia[]) {
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if (Long.compareUnsigned(ia.length, 0) > 0) {
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result += 0x80;
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} else {
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result -= 1;
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}
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}
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@Test
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@IR(counts = {IRNode.CBZ_HI, "1"})
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void test_gt_long(int ia[]) {
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if (Long.compareUnsigned(ia.length, 0) > 0) {
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result += 0x82;
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} else {
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result -= 1;
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}
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}
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@Run(test = {"test_le_int", "test_gt_int", "test_le_long", "test_gt_long"},
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mode = RunMode.STANDALONE)
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public void test_runner() {
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for (int i = 0; i < 10_000; i++) {
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test_le_int(new int[1]);
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test_gt_int(new int[0]);
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test_le_long(new int[1]);
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test_gt_long(new int[0]);
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}
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}
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public static void main(String [] args) {
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TestFramework.run();
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}
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}
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@ -378,6 +378,26 @@ public class IRNode {
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beforeMatchingNameRegex(CAST_LL, "CastLL");
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}
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public static final String CBNZW_HI = PREFIX + "CBNZW_HI" + POSTFIX;
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static {
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optoOnly(CBNZW_HI, "cbwhi");
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}
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public static final String CBZW_LS = PREFIX + "CBZW_LS" + POSTFIX;
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static {
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optoOnly(CBZW_LS, "cbwls");
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}
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public static final String CBZ_LS = PREFIX + "CBZ_LS" + POSTFIX;
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static {
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optoOnly(CBZ_LS, "cbls");
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}
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public static final String CBZ_HI = PREFIX + "CBZ_HI" + POSTFIX;
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static {
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optoOnly(CBZ_HI, "cbhi");
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}
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public static final String CHECKCAST_ARRAY = PREFIX + "CHECKCAST_ARRAY" + POSTFIX;
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static {
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String regex = "(((?i:cmp|CLFI|CLR).*precise \\[.*:|.*(?i:mov|mv|or).*precise \\[.*:.*\\R.*(cmp|CMP|CLR))" + END;
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