8308091: Remove unused iRegIHeapbase() matching operand

Reviewed-by: fyang, thartmann
This commit is contained in:
Xiaolin Zheng 2023-05-24 09:42:26 +00:00 committed by Tobias Hartmann
parent b7a84b0fd7
commit 2d4d850813
2 changed files with 8 additions and 39 deletions
src/hotspot/cpu
aarch64
riscv

@ -664,11 +664,6 @@ reg_class method_reg(
R12, R12_H
);
// Class for heapbase register
reg_class heapbase_reg(
R27, R27_H
);
// Class for thread register
reg_class thread_reg(
R28, R28_H
@ -1244,15 +1239,15 @@ source %{
// zero, compressed klass pointers doesn't use r27 after JDK-8234794
if (UseCompressedOops && (CompressedOops::ptrs_base() != NULL)) {
_NO_SPECIAL_REG32_mask.Remove(OptoReg::as_OptoReg(r27->as_VMReg()));
_NO_SPECIAL_REG_mask.SUBTRACT(_HEAPBASE_REG_mask);
_NO_SPECIAL_PTR_REG_mask.SUBTRACT(_HEAPBASE_REG_mask);
_NO_SPECIAL_REG_mask.Remove(OptoReg::as_OptoReg(r27->as_VMReg()));
_NO_SPECIAL_PTR_REG_mask.Remove(OptoReg::as_OptoReg(r27->as_VMReg()));
}
// r29 is not allocatable when PreserveFramePointer is on
if (PreserveFramePointer) {
_NO_SPECIAL_REG32_mask.Remove(OptoReg::as_OptoReg(r29->as_VMReg()));
_NO_SPECIAL_REG_mask.SUBTRACT(_FP_REG_mask);
_NO_SPECIAL_PTR_REG_mask.SUBTRACT(_FP_REG_mask);
_NO_SPECIAL_REG_mask.Remove(OptoReg::as_OptoReg(r29->as_VMReg()));
_NO_SPECIAL_PTR_REG_mask.Remove(OptoReg::as_OptoReg(r29->as_VMReg()));
}
}
@ -5320,17 +5315,6 @@ operand iRegNNoSp()
interface(REG_INTER);
%}
// heap base register -- used for encoding immN0
operand iRegIHeapbase()
%{
constraint(ALLOC_IN_RC(heapbase_reg));
match(RegI);
op_cost(0);
format %{ %}
interface(REG_INTER);
%}
// Float Register
// Float register operands
operand vRegF()

@ -705,11 +705,6 @@ reg_class method_reg(
R31, R31_H
);
// Class for heapbase register
reg_class heapbase_reg(
R27, R27_H
);
// Class for java thread register
reg_class java_thread_reg(
R23, R23_H
@ -1077,15 +1072,15 @@ void reg_mask_init() {
// x27 is not allocatable when compressed oops is on
if (UseCompressedOops) {
_NO_SPECIAL_REG32_mask.Remove(OptoReg::as_OptoReg(x27->as_VMReg()));
_NO_SPECIAL_REG_mask.SUBTRACT(_HEAPBASE_REG_mask);
_NO_SPECIAL_PTR_REG_mask.SUBTRACT(_HEAPBASE_REG_mask);
_NO_SPECIAL_REG_mask.Remove(OptoReg::as_OptoReg(x27->as_VMReg()));
_NO_SPECIAL_PTR_REG_mask.Remove(OptoReg::as_OptoReg(x27->as_VMReg()));
}
// x8 is not allocatable when PreserveFramePointer is on
if (PreserveFramePointer) {
_NO_SPECIAL_REG32_mask.Remove(OptoReg::as_OptoReg(x8->as_VMReg()));
_NO_SPECIAL_REG_mask.SUBTRACT(_FP_REG_mask);
_NO_SPECIAL_PTR_REG_mask.SUBTRACT(_FP_REG_mask);
_NO_SPECIAL_REG_mask.Remove(OptoReg::as_OptoReg(x8->as_VMReg()));
_NO_SPECIAL_PTR_REG_mask.Remove(OptoReg::as_OptoReg(x8->as_VMReg()));
}
}
@ -3507,16 +3502,6 @@ operand iRegNNoSp()
interface(REG_INTER);
%}
// heap base register -- used for encoding immN0
operand iRegIHeapbase()
%{
constraint(ALLOC_IN_RC(heapbase_reg));
match(RegI);
op_cost(0);
format %{ %}
interface(REG_INTER);
%}
// Long 64 bit Register R10 only
operand iRegL_R10()
%{