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8173472: AArch64: C1 comparisons with null only use 32-bit instructions

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Reviewed-by: roland
This commit is contained in:
Andrew Haley 2017-01-27 09:50:15 +00:00
parent 9eb2a991de
commit 30b20a3edb
1 changed files with 8 additions and 3 deletions
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11
hotspot/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp
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@ -1922,12 +1922,17 @@ void LIR_Assembler::comp_op(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2,
} }
if (opr2->is_constant()) { if (opr2->is_constant()) {
bool is_32bit = false; // width of register operand
jlong imm; jlong imm;
switch(opr2->type()) { switch(opr2->type()) {
case T_INT:
imm = opr2->as_constant_ptr()->as_jint();
is_32bit = true;
break;
case T_LONG: case T_LONG:
imm = opr2->as_constant_ptr()->as_jlong(); imm = opr2->as_constant_ptr()->as_jlong();
break; break;
case T_INT:
case T_ADDRESS: case T_ADDRESS:
imm = opr2->as_constant_ptr()->as_jint(); imm = opr2->as_constant_ptr()->as_jint();
break; break;
@ -1942,14 +1947,14 @@ void LIR_Assembler::comp_op(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2,
} }
if (Assembler::operand_valid_for_add_sub_immediate(imm)) { if (Assembler::operand_valid_for_add_sub_immediate(imm)) {
if (type2aelembytes(opr1->type()) <= 4) if (is_32bit)
__ cmpw(reg1, imm); __ cmpw(reg1, imm);
else else
__ cmp(reg1, imm); __ cmp(reg1, imm);
return; return;
} else { } else {
__ mov(rscratch1, imm); __ mov(rscratch1, imm);
if (type2aelembytes(opr1->type()) <= 4) if (is_32bit)
__ cmpw(reg1, rscratch1); __ cmpw(reg1, rscratch1);
else else
__ cmp(reg1, rscratch1); __ cmp(reg1, rscratch1);