8202993: Add support for x86 testptr/testq with register and address

Reviewed-by: kvn, neliasso

src/hotspot/cpu/x86/assembler_x86.cpp

@@ -8981,6 +8981,13 @@ void Assembler::testq(Register dst, Register src) {
   emit_arith(0x85, 0xC0, dst, src);
 }
 
+void Assembler::testq(Register dst, Address src) {
+  InstructionMark im(this);
+  prefixq(src, dst);
+  emit_int8((unsigned char)0x85);
+  emit_operand(dst, src);
+}
+
 void Assembler::xaddq(Address dst, Register src) {
   InstructionMark im(this);
   prefixq(dst, src);

src/hotspot/cpu/x86/assembler_x86.hpp

@@ -1813,6 +1813,7 @@ private:
 
   void testq(Register dst, int32_t imm32);
   void testq(Register dst, Register src);
+  void testq(Register dst, Address src);
 
   // BMI - count trailing zeros
   void tzcntl(Register dst, Register src);

src/hotspot/cpu/x86/macroAssembler_x86.hpp

@@ -836,6 +836,7 @@ class MacroAssembler: public Assembler {
   void orptr(Address dst, int32_t imm32) { LP64_ONLY(orq(dst, imm32)) NOT_LP64(orl(dst, imm32)); }
 
   void testptr(Register src, int32_t imm32) {  LP64_ONLY(testq(src, imm32)) NOT_LP64(testl(src, imm32)); }
+  void testptr(Register src1, Address src2) { LP64_ONLY(testq(src1, src2)) NOT_LP64(testl(src1, src2)); }
   void testptr(Register src1, Register src2);
 
   void xorptr(Register dst, Register src) { LP64_ONLY(xorq(dst, src)) NOT_LP64(xorl(dst, src)); }