8315801: [PPC64] JNI code should be more similar to the Panama implementation
Reviewed-by: rrich, lucy
This commit is contained in:
parent
8ec6b8de3b
commit
368e4f60a9
@ -801,9 +801,7 @@ AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm
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static int c_calling_convention_priv(const BasicType *sig_bt,
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VMRegPair *regs,
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VMRegPair *regs2,
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int total_args_passed) {
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assert(regs2 == nullptr, "not needed on AArch64");
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// We return the amount of VMRegImpl stack slots we need to reserve for all
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// the arguments NOT counting out_preserve_stack_slots.
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@ -897,10 +895,9 @@ int SharedRuntime::vector_calling_convention(VMRegPair *regs,
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int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
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VMRegPair *regs,
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VMRegPair *regs2,
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int total_args_passed)
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{
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int result = c_calling_convention_priv(sig_bt, regs, regs2, total_args_passed);
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int result = c_calling_convention_priv(sig_bt, regs, total_args_passed);
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guarantee(result >= 0, "Unsupported arguments configuration");
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return result;
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}
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@ -1457,7 +1454,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
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// Now figure out where the args must be stored and how much stack space
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// they require.
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int out_arg_slots;
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out_arg_slots = c_calling_convention_priv(out_sig_bt, out_regs, nullptr, total_c_args);
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out_arg_slots = c_calling_convention_priv(out_sig_bt, out_regs, total_c_args);
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if (out_arg_slots < 0) {
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return nullptr;
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@ -254,10 +254,7 @@ bool SharedRuntime::is_wide_vector(int size) {
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int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
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VMRegPair *regs,
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VMRegPair *regs2,
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int total_args_passed) {
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assert(regs2 == nullptr, "not needed on arm");
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int slot = 0;
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int ireg = 0;
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#ifdef __ABI_HARD__
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@ -795,7 +792,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
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out_sig_bt[argc++] = in_sig_bt[i];
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}
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int out_arg_slots = c_calling_convention(out_sig_bt, out_regs, nullptr, total_c_args);
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int out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
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int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
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// Since object arguments need to be wrapped, we must preserve space
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// for those object arguments which come in registers (GPR_PARAMS maximum)
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@ -126,20 +126,20 @@ class Argument {
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int _number; // The number of the argument.
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public:
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enum {
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// Only 8 registers may contain integer parameters.
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n_register_parameters = 8,
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// Can have up to 8 floating registers.
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n_float_register_parameters = 8,
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// PPC C calling conventions.
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// The first eight arguments are passed in int regs if they are int.
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n_int_register_parameters_c = 8,
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// The first thirteen float arguments are passed in float regs.
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n_float_register_parameters_c = 13,
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// Only the first 8 parameters are not placed on the stack. Aix disassembly
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// shows that xlC places all float args after argument 8 on the stack AND
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// in a register. This is not documented, but we follow this convention, too.
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n_regs_not_on_stack_c = 8,
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#ifdef VM_LITTLE_ENDIAN
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// Floats are in the least significant word of an argument slot.
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float_on_stack_offset_in_bytes_c = 0,
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#else
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// Although AIX runs on big endian CPU, float is in the most
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// significant word of an argument slot.
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float_on_stack_offset_in_bytes_c = AIX_ONLY(0) NOT_AIX(4),
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#endif
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n_int_register_parameters_j = 8, // duplicates num_java_iarg_registers
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n_float_register_parameters_j = 13, // num_java_farg_registers
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@ -150,7 +150,7 @@ class Argument {
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int number() const { return _number; }
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// Locating register-based arguments:
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bool is_register() const { return _number < n_register_parameters; }
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bool is_register() const { return _number < n_int_register_parameters_c; }
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Register as_register() const {
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assert(is_register(), "must be a register argument");
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@ -179,7 +179,7 @@ static void move_float(MacroAssembler* masm, int out_stk_bias,
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case StorageType::STACK:
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if (from_reg.segment_mask() == REG32_MASK) {
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assert(to_reg.stack_size() == 4, "size should match");
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// TODO: Check if AIX needs 4 Byte offset
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// Note: Argument::float_on_stack_offset_in_bytes_c is handled by CallArranger
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__ stfs(as_FloatRegister(from_reg), reg2offset(to_reg, out_stk_bias), R1_SP);
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} else {
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assert(to_reg.stack_size() == 8, "size should match");
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@ -204,6 +204,7 @@ static void move_stack(MacroAssembler* masm, Register callerSP, int in_stk_bias,
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case StorageType::FLOAT:
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switch (from_reg.stack_size()) {
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case 8: __ lfd(as_FloatRegister(to_reg), reg2offset(from_reg, in_stk_bias), callerSP); break;
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// Note: Argument::float_on_stack_offset_in_bytes_c is handled by CallArranger
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case 4: __ lfs(as_FloatRegister(to_reg), reg2offset(from_reg, in_stk_bias), callerSP); break;
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default: ShouldNotReachHere();
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}
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@ -741,7 +741,6 @@ int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
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// Calling convention for calling C code.
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int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
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VMRegPair *regs,
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VMRegPair *regs2,
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int total_args_passed) {
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// Calling conventions for C runtime calls and calls to JNI native methods.
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//
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@ -782,35 +781,20 @@ int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
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sizeof(farg_reg) / sizeof(farg_reg[0]) == Argument::n_float_register_parameters_c,
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"consistency");
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// `Stk' counts stack slots. Due to alignment, 32 bit values occupy
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// 2 such slots, like 64 bit values do.
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const int inc_stk_for_intfloat = 2; // 2 slots for ints and floats
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const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles
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const int additional_frame_header_slots = ((frame::native_abi_minframe_size - frame::jit_out_preserve_size)
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/ VMRegImpl::stack_slot_size);
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const int float_offset_in_slots = Argument::float_on_stack_offset_in_bytes_c / VMRegImpl::stack_slot_size;
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int i;
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VMReg reg;
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// Leave room for C-compatible ABI_REG_ARGS.
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int stk = (frame::native_abi_reg_args_size - frame::jit_out_preserve_size) / VMRegImpl::stack_slot_size;
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int arg = 0;
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int freg = 0;
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bool stack_used = false;
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// Avoid passing C arguments in the wrong stack slots.
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#if defined(ABI_ELFv2)
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assert((SharedRuntime::out_preserve_stack_slots() + stk) * VMRegImpl::stack_slot_size == 96,
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"passing C arguments in wrong stack slots");
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#else
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assert((SharedRuntime::out_preserve_stack_slots() + stk) * VMRegImpl::stack_slot_size == 112,
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"passing C arguments in wrong stack slots");
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#endif
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// We fill-out regs AND regs2 if an argument must be passed in a
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// register AND in a stack slot. If regs2 is null in such a
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// situation, we bail-out with a fatal error.
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for (int i = 0; i < total_args_passed; ++i, ++arg) {
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// Initialize regs2 to BAD.
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if (regs2 != nullptr) regs2[i].set_bad();
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// Each argument corresponds to a slot in the Parameter Save Area (if not omitted)
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int stk = (arg * 2) + additional_frame_header_slots;
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switch(sig_bt[i]) {
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//
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// If arguments 0-7 are integers, they are passed in integer registers.
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// Argument i is placed in iarg_reg[i].
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@ -832,7 +816,7 @@ int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
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reg = iarg_reg[arg];
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} else {
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reg = VMRegImpl::stack2reg(stk);
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stk += inc_stk_for_longdouble;
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stack_used = true;
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}
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regs[i].set2(reg);
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break;
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@ -844,43 +828,14 @@ int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
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// in farg_reg[j] if argument i is the j-th float argument of this call.
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//
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case T_FLOAT:
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#if defined(LINUX)
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// Linux uses ELF ABI. Both original ELF and ELFv2 ABIs have float
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// in the least significant word of an argument slot.
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#if defined(VM_LITTLE_ENDIAN)
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#define FLOAT_WORD_OFFSET_IN_SLOT 0
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#else
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#define FLOAT_WORD_OFFSET_IN_SLOT 1
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#endif
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#elif defined(AIX)
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// Although AIX runs on big endian CPU, float is in the most
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// significant word of an argument slot.
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#define FLOAT_WORD_OFFSET_IN_SLOT 0
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#else
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#error "unknown OS"
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#endif
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if (freg < Argument::n_float_register_parameters_c) {
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// Put float in register ...
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reg = farg_reg[freg];
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++freg;
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// Argument i for i > 8 is placed on the stack even if it's
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// placed in a register (if it's a float arg). Aix disassembly
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// shows that xlC places these float args on the stack AND in
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// a register. This is not documented, but we follow this
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// convention, too.
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if (arg >= Argument::n_regs_not_on_stack_c) {
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// ... and on the stack.
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guarantee(regs2 != nullptr, "must pass float in register and stack slot");
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VMReg reg2 = VMRegImpl::stack2reg(stk + FLOAT_WORD_OFFSET_IN_SLOT);
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regs2[i].set1(reg2);
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stk += inc_stk_for_intfloat;
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}
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} else {
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// Put float on stack.
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reg = VMRegImpl::stack2reg(stk + FLOAT_WORD_OFFSET_IN_SLOT);
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stk += inc_stk_for_intfloat;
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reg = VMRegImpl::stack2reg(stk + float_offset_in_slots);
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stack_used = true;
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}
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regs[i].set1(reg);
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break;
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@ -890,23 +845,10 @@ int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
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// Put double in register ...
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reg = farg_reg[freg];
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++freg;
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// Argument i for i > 8 is placed on the stack even if it's
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// placed in a register (if it's a double arg). Aix disassembly
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// shows that xlC places these float args on the stack AND in
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// a register. This is not documented, but we follow this
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// convention, too.
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if (arg >= Argument::n_regs_not_on_stack_c) {
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// ... and on the stack.
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guarantee(regs2 != nullptr, "must pass float in register and stack slot");
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VMReg reg2 = VMRegImpl::stack2reg(stk);
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regs2[i].set2(reg2);
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stk += inc_stk_for_longdouble;
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}
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} else {
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// Put double on stack.
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reg = VMRegImpl::stack2reg(stk);
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stk += inc_stk_for_longdouble;
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stack_used = true;
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}
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regs[i].set2(reg);
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break;
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@ -921,7 +863,17 @@ int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
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}
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}
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return align_up(stk, 2);
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// Return size of the stack frame excluding the jit_out_preserve part in single-word slots.
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#if defined(ABI_ELFv2)
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assert(additional_frame_header_slots == 0, "ABIv2 shouldn't use extra slots");
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// ABIv2 allows omitting the Parameter Save Area if the callee's prototype
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// indicates that all parameters can be passed in registers.
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return stack_used ? (arg * 2) : 0;
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#else
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// The Parameter Save Area needs to be at least 8 double-word slots for ABIv1.
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// We have to add extra slots because ABIv1 uses a larger header.
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return MAX2(arg, 8) * 2 + additional_frame_header_slots;
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#endif
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}
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#endif // COMPILER2
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@ -2140,7 +2092,6 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
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BasicType *out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
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VMRegPair *out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
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VMRegPair *out_regs2 = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
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BasicType* in_elem_bt = nullptr;
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// Create the signature for the C call:
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@ -2193,7 +2144,7 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
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// - *_slot_offset Indicates offset from SP in number of stack slots.
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// - *_offset Indicates offset from SP in bytes.
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int stack_slots = c_calling_convention(out_sig_bt, out_regs, out_regs2, total_c_args) + // 1+2)
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int stack_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args) + // 1+2)
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SharedRuntime::out_preserve_stack_slots(); // See c_calling_convention.
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// Now the space for the inbound oop handle area.
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@ -2358,11 +2309,6 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
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} else if (out_regs[out].first()->is_FloatRegister()) {
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freg_destroyed[out_regs[out].first()->as_FloatRegister()->encoding()] = true;
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}
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if (out_regs2[out].first()->is_Register()) {
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reg_destroyed[out_regs2[out].first()->as_Register()->encoding()] = true;
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} else if (out_regs2[out].first()->is_FloatRegister()) {
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freg_destroyed[out_regs2[out].first()->as_FloatRegister()->encoding()] = true;
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}
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#endif // ASSERT
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switch (in_sig_bt[in]) {
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@ -2389,15 +2335,9 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
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break;
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case T_FLOAT:
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float_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
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if (out_regs2[out].first()->is_valid()) {
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float_move(masm, in_regs[in], out_regs2[out], r_callers_sp, r_temp_1);
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}
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break;
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case T_DOUBLE:
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double_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
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if (out_regs2[out].first()->is_valid()) {
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double_move(masm, in_regs[in], out_regs2[out], r_callers_sp, r_temp_1);
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}
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break;
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case T_ADDRESS:
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fatal("found type (T_ADDRESS) in java args");
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@ -2474,7 +2414,7 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
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// Save argument registers and leave room for C-compatible ABI_REG_ARGS.
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int frame_size = frame::native_abi_reg_args_size + align_up(total_c_args * wordSize, frame::alignment_in_bytes);
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__ mr(R11_scratch1, R1_SP);
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RegisterSaver::push_frame_and_save_argument_registers(masm, R12_scratch2, frame_size, total_c_args, out_regs, out_regs2);
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RegisterSaver::push_frame_and_save_argument_registers(masm, R12_scratch2, frame_size, total_c_args, out_regs);
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// Do the call.
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__ set_last_Java_frame(R11_scratch1, r_return_pc);
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@ -2482,7 +2422,7 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
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__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), r_oop, r_box, R16_thread);
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__ reset_last_Java_frame();
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RegisterSaver::restore_argument_registers_and_pop_frame(masm, frame_size, total_c_args, out_regs, out_regs2);
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RegisterSaver::restore_argument_registers_and_pop_frame(masm, frame_size, total_c_args, out_regs);
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__ asm_assert_mem8_is_zero(thread_(pending_exception),
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"no pending exception allowed on exit from SharedRuntime::complete_monitor_locking_C");
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@ -291,21 +291,7 @@ address TemplateInterpreterGenerator::generate_slow_signature_handler() {
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__ bind(do_float);
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__ lfs(floatSlot, 0, arg_java);
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#if defined(LINUX)
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// Linux uses ELF ABI. Both original ELF and ELFv2 ABIs have float
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// in the least significant word of an argument slot.
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#if defined(VM_LITTLE_ENDIAN)
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__ stfs(floatSlot, 0, arg_c);
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#else
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__ stfs(floatSlot, 4, arg_c);
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#endif
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#elif defined(AIX)
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// Although AIX runs on big endian CPU, float is in most significant
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// word of an argument slot.
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__ stfs(floatSlot, 0, arg_c);
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#else
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#error "unknown OS"
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#endif
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__ stfs(floatSlot, Argument::float_on_stack_offset_in_bytes_c, arg_c);
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__ addi(arg_java, arg_java, -BytesPerWord);
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__ addi(arg_c, arg_c, BytesPerWord);
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__ cmplwi(CCR0, fpcnt, max_fp_register_arguments);
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@ -951,14 +937,14 @@ void TemplateInterpreterGenerator::generate_fixed_frame(bool native_call, Regist
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in_bytes(ConstMethod::size_of_parameters_offset()), Rconst_method);
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if (native_call) {
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// If we're calling a native method, we reserve space for the worst-case signature
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// handler varargs vector, which is max(Argument::n_register_parameters, parameter_count+2).
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// handler varargs vector, which is max(Argument::n_int_register_parameters_c, parameter_count+2).
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// We add two slots to the parameter_count, one for the jni
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// environment and one for a possible native mirror.
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Label skip_native_calculate_max_stack;
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__ addi(Rtop_frame_size, Rsize_of_parameters, 2);
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__ cmpwi(CCR0, Rtop_frame_size, Argument::n_register_parameters);
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__ cmpwi(CCR0, Rtop_frame_size, Argument::n_int_register_parameters_c);
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__ bge(CCR0, skip_native_calculate_max_stack);
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__ li(Rtop_frame_size, Argument::n_register_parameters);
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__ li(Rtop_frame_size, Argument::n_int_register_parameters_c);
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__ bind(skip_native_calculate_max_stack);
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__ sldi(Rsize_of_parameters, Rsize_of_parameters, Interpreter::logStackElementSize);
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__ sldi(Rtop_frame_size, Rtop_frame_size, Interpreter::logStackElementSize);
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@ -1355,7 +1341,7 @@ address TemplateInterpreterGenerator::generate_native_entry(bool synchronized) {
|
||||
// outgoing argument area.
|
||||
//
|
||||
// Not needed on PPC64.
|
||||
//__ add(SP, SP, Argument::n_register_parameters*BytesPerWord);
|
||||
//__ add(SP, SP, Argument::n_int_register_parameters_c*BytesPerWord);
|
||||
|
||||
assert(result_handler_addr->is_nonvolatile(), "result_handler_addr must be in a non-volatile register");
|
||||
// Save across call to native method.
|
||||
|
@ -694,9 +694,7 @@ int SharedRuntime::vector_calling_convention(VMRegPair *regs,
|
||||
|
||||
int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
|
||||
VMRegPair *regs,
|
||||
VMRegPair *regs2,
|
||||
int total_args_passed) {
|
||||
assert(regs2 == nullptr, "not needed on riscv");
|
||||
|
||||
// We return the amount of VMRegImpl stack slots we need to reserve for all
|
||||
// the arguments NOT counting out_preserve_stack_slots.
|
||||
@ -1345,7 +1343,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
|
||||
|
||||
// Now figure out where the args must be stored and how much stack space
|
||||
// they require.
|
||||
int out_arg_slots = c_calling_convention(out_sig_bt, out_regs, nullptr, total_c_args);
|
||||
int out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
|
||||
|
||||
// Compute framesize for the wrapper. We need to handlize all oops in
|
||||
// incoming registers
|
||||
|
@ -760,9 +760,7 @@ int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
|
||||
|
||||
int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
|
||||
VMRegPair *regs,
|
||||
VMRegPair *regs2,
|
||||
int total_args_passed) {
|
||||
assert(regs2 == nullptr, "second VMRegPair array not used on this platform");
|
||||
|
||||
// Calling conventions for C runtime calls and calls to JNI native methods.
|
||||
const VMReg z_iarg_reg[5] = {
|
||||
@ -1457,7 +1455,7 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
|
||||
// *_slot_offset indicates offset from SP in #stack slots
|
||||
// *_offset indicates offset from SP in #bytes
|
||||
|
||||
int stack_slots = c_calling_convention(out_sig_bt, out_regs, /*regs2=*/nullptr, total_c_args) + // 1+2
|
||||
int stack_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args) + // 1+2
|
||||
SharedRuntime::out_preserve_stack_slots(); // see c_calling_convention
|
||||
|
||||
// Now the space for the inbound oop handle area.
|
||||
|
@ -978,9 +978,8 @@ AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm
|
||||
|
||||
int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
|
||||
VMRegPair *regs,
|
||||
VMRegPair *regs2,
|
||||
int total_args_passed) {
|
||||
assert(regs2 == nullptr, "not needed on x86");
|
||||
|
||||
// We return the amount of VMRegImpl stack slots we need to reserve for all
|
||||
// the arguments NOT counting out_preserve_stack_slots.
|
||||
|
||||
@ -1366,7 +1365,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
|
||||
// Now figure out where the args must be stored and how much stack space
|
||||
// they require.
|
||||
int out_arg_slots;
|
||||
out_arg_slots = c_calling_convention(out_sig_bt, out_regs, nullptr, total_c_args);
|
||||
out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
|
||||
|
||||
// Compute framesize for the wrapper. We need to handlize all oops in
|
||||
// registers a max of 2 on x86.
|
||||
|
@ -1053,9 +1053,8 @@ AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm
|
||||
|
||||
int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
|
||||
VMRegPair *regs,
|
||||
VMRegPair *regs2,
|
||||
int total_args_passed) {
|
||||
assert(regs2 == nullptr, "not needed on x86");
|
||||
|
||||
// We return the amount of VMRegImpl stack slots we need to reserve for all
|
||||
// the arguments NOT counting out_preserve_stack_slots.
|
||||
|
||||
@ -1803,7 +1802,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
|
||||
// Now figure out where the args must be stored and how much stack space
|
||||
// they require.
|
||||
int out_arg_slots;
|
||||
out_arg_slots = c_calling_convention(out_sig_bt, out_regs, nullptr, total_c_args);
|
||||
out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
|
||||
|
||||
// Compute framesize for the wrapper. We need to handlize all oops in
|
||||
// incoming registers
|
||||
|
@ -118,7 +118,6 @@ RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const cha
|
||||
|
||||
int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
|
||||
VMRegPair *regs,
|
||||
VMRegPair *regs2,
|
||||
int total_args_passed) {
|
||||
ShouldNotCallThis();
|
||||
return 0;
|
||||
|
@ -118,7 +118,7 @@ CallingConvention* FrameMap::c_calling_convention(const BasicTypeArray* signatur
|
||||
}
|
||||
}
|
||||
|
||||
intptr_t out_preserve = SharedRuntime::c_calling_convention(sig_bt, regs, nullptr, sizeargs);
|
||||
intptr_t out_preserve = SharedRuntime::c_calling_convention(sig_bt, regs, sizeargs);
|
||||
LIR_OprList* args = new LIR_OprList(signature->length());
|
||||
for (i = 0; i < sizeargs;) {
|
||||
BasicType t = sig_bt[i];
|
||||
|
@ -1232,7 +1232,7 @@ bool CallLeafVectorNode::cmp( const Node &n ) const {
|
||||
|
||||
//------------------------------calling_convention-----------------------------
|
||||
void CallRuntimeNode::calling_convention(BasicType* sig_bt, VMRegPair *parm_regs, uint argcnt) const {
|
||||
SharedRuntime::c_calling_convention(sig_bt, parm_regs, /*regs2=*/nullptr, argcnt);
|
||||
SharedRuntime::c_calling_convention(sig_bt, parm_regs, argcnt);
|
||||
}
|
||||
|
||||
void CallLeafVectorNode::calling_convention( BasicType* sig_bt, VMRegPair *parm_regs, uint argcnt ) const {
|
||||
|
@ -387,8 +387,7 @@ class SharedRuntime: AllStatic {
|
||||
// to be filled by the c_calling_convention method. On other architectures,
|
||||
// null is being passed as the second VMRegPair array, so arguments are either
|
||||
// passed in a register OR in a stack slot.
|
||||
static int c_calling_convention(const BasicType *sig_bt, VMRegPair *regs, VMRegPair *regs2,
|
||||
int total_args_passed);
|
||||
static int c_calling_convention(const BasicType *sig_bt, VMRegPair *regs, int total_args_passed);
|
||||
|
||||
static int vector_calling_convention(VMRegPair *regs,
|
||||
uint num_bits,
|
||||
|
Loading…
Reference in New Issue
Block a user