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8296975: RISC-V: Enable UseRVA20U64 profile by default

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Reviewed-by: fyang, vkempik
This commit is contained in:
Xiaolin Zheng 2022-11-17 13:45:56 +00:00 committed by Vladimir Kempik
parent b6aff54245
commit 38eb80d4d8
2 changed files with 7 additions and 2 deletions
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4
src/hotspot/cpu/riscv/globals_riscv.hpp
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@ -96,10 +96,10 @@ define_pd_global(intx, InlineSmallCode, 1000);
"Extend i for r and o for w in the pred/succ flags of fence") \
product(bool, AvoidUnalignedAccesses, true, \
"Avoid generating unaligned memory accesses") \
product(bool, UseRVA20U64, false, EXPERIMENTAL, "Use RVA20U64 profile") \
product(bool, UseRVA20U64, true, "Use RVA20U64 profile") \
product(bool, UseRVC, false, "Use RVC instructions") \
product(bool, UseRVA22U64, false, EXPERIMENTAL, "Use RVA22U64 profile") \
product(bool, UseRVV, false, EXPERIMENTAL, "Use RVV instructions") \
product(bool, UseRVC, false, EXPERIMENTAL, "Use RVC instructions") \
product(bool, UseZba, false, EXPERIMENTAL, "Use Zba instructions") \
product(bool, UseZbb, false, EXPERIMENTAL, "Use Zbb instructions") \
product(bool, UseZic64b, false, EXPERIMENTAL, "Use Zic64b instructions") \

5
src/hotspot/cpu/riscv/vm_version_riscv.cpp
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@ -157,6 +157,11 @@ void VM_Version::initialize() {
if (UseRVC && !(_features & CPU_C)) {
warning("RVC is not supported on this CPU");
FLAG_SET_DEFAULT(UseRVC, false);
if (UseRVA20U64) {
warning("UseRVA20U64 is not supported on this CPU");
FLAG_SET_DEFAULT(UseRVA20U64, false);
}
}
if (FLAG_IS_DEFAULT(AvoidUnalignedAccesses)) {