Merge
This commit is contained in:
Phil Race
commit
39f36c179d
make
src/hotspot
cpu
aarch64
aarch64.adc1_CodeStubs_aarch64.cppc1_LIRAssembler_aarch64.cppc1_LIRGenerator_aarch64.cpp
gc/g1
interp_masm_aarch64.cppinterp_masm_aarch64.hppinterpreterRT_aarch64.cppmacroAssembler_aarch64.hppnativeInst_aarch64.hppregister_definitions_aarch64.cpptemplateInterpreterGenerator_aarch64.cpptemplateTable_aarch64.cppvtableStubs_aarch64.cpparm
c1_CodeStubs_arm.cppc1_LIRAssembler_arm.cppc1_LIRGenerator_arm.cppc1_Runtime1_arm.cpp
gc/g1
interp_masm_arm.cppinterp_masm_arm.hppinterpreterRT_arm.cpprelocInfo_arm.cpptemplateInterpreterGenerator_arm.cpptemplateTable_arm.cppvtableStubs_arm.cppppc
c1_CodeStubs_ppc.cppc1_LIRAssembler_ppc.cppc1_LIRGenerator_ppc.cppc1_MacroAssembler_ppc.cppc1_Runtime1_ppc.cpp
gc/g1
nativeInst_ppc.cpps390
assembler_s390.hppassembler_s390.inline.hppc1_CodeStubs_s390.cppc1_LIRAssembler_s390.cppc1_MacroAssembler_s390.cppc1_MacroAssembler_s390.hppc1_Runtime1_s390.cpp
gc/g1
sparc
c1_CodeStubs_sparc.cppc1_LIRAssembler_sparc.cppc1_LIRGenerator_sparc.cppc1_MacroAssembler_sparc.cppc1_Runtime1_sparc.cpp
gc
interp_masm_sparc.cppinterp_masm_sparc.hppmacroAssembler_sparc.cppmacroAssembler_sparc.hppmacroAssembler_sparc.inline.hppmemset_with_concurrent_readers_sparc.cppmethodHandles_sparc.cpprelocInfo_sparc.cpptemplateInterpreterGenerator_sparc.cpptemplateTable_sparc.cppx86
zero
os
os_cpu
aix_ppc
bsd_x86
bsd_zero
linux_aarch64
linux_arm
linux_ppc
linux_s390
linux_sparc
linux_x86
linux_zero
solaris_sparc
solaris_x86
windows_x86
share
@ -325,6 +325,10 @@ jdk.internal.le_COPY += .properties
|
||||
|
||||
################################################################################
|
||||
|
||||
jdk.internal.opt_COPY += .properties
|
||||
|
||||
################################################################################
|
||||
|
||||
jdk.jcmd_COPY += _options
|
||||
|
||||
################################################################################
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
#
|
||||
# Copyright (c) 2000, 2016, Oracle and/or its affiliates. All rights reserved.
|
||||
# Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
#
|
||||
# This code is free software; you can redistribute it and/or modify it
|
||||
@ -32,7 +32,7 @@ formatVersion=3
|
||||
# Version of the currency code information in this class.
|
||||
# It is a serial number that accompanies with each amendment.
|
||||
|
||||
dataVersion=164
|
||||
dataVersion=167
|
||||
|
||||
# List of all valid ISO 4217 currency codes.
|
||||
# To ensure compatibility, do not remove codes.
|
||||
@ -47,7 +47,7 @@ all=ADP020-AED784-AFA004-AFN971-ALL008-AMD051-ANG532-AOA973-ARS032-ATS040-AUD036
|
||||
HRK191-HTG332-HUF348-IDR360-IEP372-ILS376-INR356-IQD368-IRR364-ISK352-\
|
||||
ITL380-JMD388-JOD400-JPY392-KES404-KGS417-KHR116-KMF174-KPW408-KRW410-\
|
||||
KWD414-KYD136-KZT398-LAK418-LBP422-LKR144-LRD430-LSL426-LTL440-LUF442-\
|
||||
LVL428-LYD434-MAD504-MDL498-MGA969-MGF450-MKD807-MMK104-MNT496-MOP446-MRO478-\
|
||||
LVL428-LYD434-MAD504-MDL498-MGA969-MGF450-MKD807-MMK104-MNT496-MOP446-MRO478-MRU929-\
|
||||
MTL470-MUR480-MVR462-MWK454-MXN484-MXV979-MYR458-MZM508-MZN943-NAD516-NGN566-\
|
||||
NIO558-NLG528-NOK578-NPR524-NZD554-OMR512-PAB590-PEN604-PGK598-PHP608-\
|
||||
PKR586-PLN985-PTE620-PYG600-QAR634-ROL946-RON946-RSD941-RUB643-RUR810-RWF646-SAR682-\
|
||||
@ -324,7 +324,7 @@ KG=KGS
|
||||
# LAO PEOPLE'S DEMOCRATIC REPUBLIC (THE)
|
||||
LA=LAK
|
||||
# LATVIA
|
||||
LV=LVL;2013-12-31-22-00-00;EUR
|
||||
LV=EUR
|
||||
# LEBANON
|
||||
LB=LBP
|
||||
# LESOTHO
|
||||
@ -336,7 +336,7 @@ LY=LYD
|
||||
# LIECHTENSTEIN
|
||||
LI=CHF
|
||||
# LITHUANIA
|
||||
LT=LTL;2014-12-31-22-00-00;EUR
|
||||
LT=EUR
|
||||
# LUXEMBOURG
|
||||
LU=EUR
|
||||
# MACAU
|
||||
@ -360,7 +360,7 @@ MH=USD
|
||||
# MARTINIQUE
|
||||
MQ=EUR
|
||||
# MAURITANIA
|
||||
MR=MRO
|
||||
MR=MRU
|
||||
# MAURITIUS
|
||||
MU=MUR
|
||||
# MAYOTTE
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
File-Date: 2017-08-15
|
||||
File-Date: 2018-04-23
|
||||
%%
|
||||
Type: language
|
||||
Subtag: aa
|
||||
@ -378,6 +378,7 @@ Subtag: hy
|
||||
Description: Armenian
|
||||
Added: 2005-10-16
|
||||
Suppress-Script: Armn
|
||||
Comments: see also hyw
|
||||
%%
|
||||
Type: language
|
||||
Subtag: hz
|
||||
@ -525,6 +526,7 @@ Suppress-Script: Latn
|
||||
%%
|
||||
Type: language
|
||||
Subtag: km
|
||||
Description: Khmer
|
||||
Description: Central Khmer
|
||||
Added: 2005-10-16
|
||||
Suppress-Script: Khmr
|
||||
@ -957,6 +959,7 @@ Subtag: sr
|
||||
Description: Serbian
|
||||
Added: 2005-10-16
|
||||
Macrolanguage: sh
|
||||
Comments: see cnr for Montenegrin
|
||||
%%
|
||||
Type: language
|
||||
Subtag: ss
|
||||
@ -1531,6 +1534,7 @@ Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: add
|
||||
Description: Lidzonka
|
||||
Description: Dzodinka
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
@ -2114,7 +2118,7 @@ Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: aja
|
||||
Description: Aja (Sudan)
|
||||
Description: Aja (South Sudan)
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
@ -3097,6 +3101,7 @@ Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: asf
|
||||
Description: Auslan
|
||||
Description: Australian Sign Language
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
@ -4240,7 +4245,7 @@ Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: bdh
|
||||
Description: Baka (Sudan)
|
||||
Description: Baka (South Sudan)
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
@ -4250,6 +4255,7 @@ Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: bdj
|
||||
Description: Bai (South Sudan)
|
||||
Description: Bai
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
@ -5293,7 +5299,7 @@ Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: blm
|
||||
Description: Beli (Sudan)
|
||||
Description: Beli (South Sudan)
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
@ -8104,6 +8110,13 @@ Description: Con
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: cnr
|
||||
Description: Montenegrin
|
||||
Added: 2018-01-23
|
||||
Macrolanguage: sh
|
||||
Comments: see sr for Serbian
|
||||
%%
|
||||
Type: language
|
||||
Subtag: cns
|
||||
Description: Central Asmat
|
||||
Added: 2009-07-29
|
||||
@ -8768,6 +8781,11 @@ Description: Tepeuxila Cuicatec
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: cuy
|
||||
Description: Cuitlatec
|
||||
Added: 2018-03-08
|
||||
%%
|
||||
Type: language
|
||||
Subtag: cvg
|
||||
Description: Chug
|
||||
Added: 2009-07-29
|
||||
@ -11089,7 +11107,7 @@ Added: 2005-10-16
|
||||
%%
|
||||
Type: language
|
||||
Subtag: fap
|
||||
Description: Palor
|
||||
Description: Paloor
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
@ -12282,6 +12300,11 @@ Description: Guya
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: gkd
|
||||
Description: Magɨ (Madang Province)
|
||||
Added: 2018-03-08
|
||||
%%
|
||||
Type: language
|
||||
Subtag: gke
|
||||
Description: Ndai
|
||||
Added: 2009-07-29
|
||||
@ -12494,6 +12517,11 @@ Description: Gooniyandi
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: gnj
|
||||
Description: Ngen
|
||||
Added: 2018-03-08
|
||||
%%
|
||||
Type: language
|
||||
Subtag: gnk
|
||||
Description: //Gana
|
||||
Description: ǁGana
|
||||
@ -13224,6 +13252,11 @@ Description: Guyanese Creole English
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: gyo
|
||||
Description: Gyalsumdo
|
||||
Added: 2018-03-08
|
||||
%%
|
||||
Type: language
|
||||
Subtag: gyr
|
||||
Description: Guarayu
|
||||
Added: 2009-07-29
|
||||
@ -13584,6 +13617,11 @@ Description: Hunjara-Kaina Ke
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: hkn
|
||||
Description: Mel-Khaonh
|
||||
Added: 2018-03-08
|
||||
%%
|
||||
Type: language
|
||||
Subtag: hks
|
||||
Description: Hong Kong Sign Language
|
||||
Description: Heung Kong Sau Yue
|
||||
@ -14238,6 +14276,12 @@ Description: Hya
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: hyw
|
||||
Description: Western Armenian
|
||||
Added: 2018-03-08
|
||||
Comments: see also hy
|
||||
%%
|
||||
Type: language
|
||||
Subtag: hyx
|
||||
Description: Armenian (family)
|
||||
Added: 2009-07-29
|
||||
@ -14860,6 +14904,7 @@ Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: iri
|
||||
Description: Rigwe
|
||||
Description: Irigwe
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
@ -20313,7 +20358,7 @@ Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: lno
|
||||
Description: Lango (Sudan)
|
||||
Description: Lango (South Sudan)
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
@ -20579,6 +20624,7 @@ Type: language
|
||||
Subtag: lsg
|
||||
Description: Lyons Sign Language
|
||||
Added: 2009-07-29
|
||||
Deprecated: 2018-03-08
|
||||
%%
|
||||
Type: language
|
||||
Subtag: lsh
|
||||
@ -20850,6 +20896,11 @@ Description: Luwo
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: lws
|
||||
Description: Malawian Sign Language
|
||||
Added: 2018-03-08
|
||||
%%
|
||||
Type: language
|
||||
Subtag: lwt
|
||||
Description: Lewotobi
|
||||
Added: 2009-07-29
|
||||
@ -20904,6 +20955,7 @@ Type: language
|
||||
Subtag: maa
|
||||
Description: San Jerónimo Tecóatl Mazatec
|
||||
Added: 2009-07-29
|
||||
Comments: see also pbm
|
||||
%%
|
||||
Type: language
|
||||
Subtag: mab
|
||||
@ -23799,11 +23851,13 @@ Type: language
|
||||
Subtag: mwx
|
||||
Description: Mediak
|
||||
Added: 2009-07-29
|
||||
Deprecated: 2018-03-08
|
||||
%%
|
||||
Type: language
|
||||
Subtag: mwy
|
||||
Description: Mosiro
|
||||
Added: 2009-07-29
|
||||
Deprecated: 2018-03-08
|
||||
%%
|
||||
Type: language
|
||||
Subtag: mwz
|
||||
@ -24527,6 +24581,8 @@ Type: language
|
||||
Subtag: ncp
|
||||
Description: Ndaktup
|
||||
Added: 2009-07-29
|
||||
Deprecated: 2018-03-08
|
||||
Preferred-Value: kdz
|
||||
%%
|
||||
Type: language
|
||||
Subtag: ncq
|
||||
@ -25458,6 +25514,11 @@ Description: Nihali
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: nlm
|
||||
Description: Mankiyali
|
||||
Added: 2018-03-08
|
||||
%%
|
||||
Type: language
|
||||
Subtag: nln
|
||||
Description: Durango Nahuatl
|
||||
Added: 2009-07-29
|
||||
@ -26693,6 +26754,11 @@ Description: Njebi
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: nzd
|
||||
Description: Nzadi
|
||||
Added: 2018-03-08
|
||||
%%
|
||||
Type: language
|
||||
Subtag: nzi
|
||||
Description: Nzima
|
||||
Added: 2005-10-16
|
||||
@ -27757,6 +27823,12 @@ Description: Mak (Nigeria)
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: pbm
|
||||
Description: Puebla Mazatec
|
||||
Added: 2018-03-08
|
||||
Comments: see also maa
|
||||
%%
|
||||
Type: language
|
||||
Subtag: pbn
|
||||
Description: Kpasam
|
||||
Added: 2009-07-29
|
||||
@ -30902,6 +30974,7 @@ Added: 2005-10-16
|
||||
%%
|
||||
Type: language
|
||||
Subtag: scp
|
||||
Description: Hyolmo
|
||||
Description: Helambu Sherpa
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
@ -33049,6 +33122,7 @@ Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: sxg
|
||||
Description: Shuhi
|
||||
Description: Shixing
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
@ -33835,6 +33909,11 @@ Description: Tulishi
|
||||
Added: 2009-07-29
|
||||
%%
|
||||
Type: language
|
||||
Subtag: tez
|
||||
Description: Tetserret
|
||||
Added: 2018-03-08
|
||||
%%
|
||||
Type: language
|
||||
Subtag: tfi
|
||||
Description: Tofin Gbe
|
||||
Added: 2009-07-29
|
||||
@ -34399,7 +34478,7 @@ Added: 2009-07-29
|
||||
Type: language
|
||||
Subtag: tlh
|
||||
Description: Klingon
|
||||
Description: tlhIngan-Hol
|
||||
Description: tlhIngan Hol
|
||||
Added: 2005-10-16
|
||||
%%
|
||||
Type: language
|
||||
@ -42199,6 +42278,7 @@ Prefix: sgn
|
||||
%%
|
||||
Type: extlang
|
||||
Subtag: asf
|
||||
Description: Auslan
|
||||
Description: Australian Sign Language
|
||||
Added: 2009-07-29
|
||||
Preferred-Value: asf
|
||||
@ -42927,7 +43007,7 @@ Type: extlang
|
||||
Subtag: lsg
|
||||
Description: Lyons Sign Language
|
||||
Added: 2009-07-29
|
||||
Preferred-Value: lsg
|
||||
Deprecated: 2018-03-08
|
||||
Prefix: sgn
|
||||
%%
|
||||
Type: extlang
|
||||
@ -42983,6 +43063,13 @@ Prefix: lv
|
||||
Macrolanguage: lv
|
||||
%%
|
||||
Type: extlang
|
||||
Subtag: lws
|
||||
Description: Malawian Sign Language
|
||||
Added: 2018-03-08
|
||||
Preferred-Value: lws
|
||||
Prefix: sgn
|
||||
%%
|
||||
Type: extlang
|
||||
Subtag: lzh
|
||||
Description: Literary Chinese
|
||||
Added: 2009-07-29
|
||||
@ -44493,6 +44580,11 @@ Description: Kaganga
|
||||
Added: 2006-10-17
|
||||
%%
|
||||
Type: script
|
||||
Subtag: Rohg
|
||||
Description: Hanifi Rohingya
|
||||
Added: 2017-12-13
|
||||
%%
|
||||
Type: script
|
||||
Subtag: Roro
|
||||
Description: Rongorongo
|
||||
Added: 2005-10-16
|
||||
@ -44563,6 +44655,16 @@ Description: Sinhala
|
||||
Added: 2005-10-16
|
||||
%%
|
||||
Type: script
|
||||
Subtag: Sogd
|
||||
Description: Sogdian
|
||||
Added: 2017-12-13
|
||||
%%
|
||||
Type: script
|
||||
Subtag: Sogo
|
||||
Description: Old Sogdian
|
||||
Added: 2017-12-13
|
||||
%%
|
||||
Type: script
|
||||
Subtag: Sora
|
||||
Description: Sora Sompeng
|
||||
Added: 2011-01-07
|
||||
@ -46412,15 +46514,26 @@ Comments: Portuguese orthography conventions established in 1990 but
|
||||
not brought into effect until 2009
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: aranes
|
||||
Description: Aranese
|
||||
Added: 2018-04-22
|
||||
Prefix: oc
|
||||
Comments: Occitan variant spoken in the Val d'Aran
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: arevela
|
||||
Description: Eastern Armenian
|
||||
Added: 2006-09-18
|
||||
Deprecated: 2018-03-24
|
||||
Preferred-Value: hy
|
||||
Prefix: hy
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: arevmda
|
||||
Description: Western Armenian
|
||||
Added: 2006-09-18
|
||||
Deprecated: 2018-03-24
|
||||
Preferred-Value: hyw
|
||||
Prefix: hy
|
||||
%%
|
||||
Type: variant
|
||||
@ -46431,6 +46544,13 @@ Added: 2017-06-05
|
||||
Prefix: tw
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: auvern
|
||||
Description: Auvergnat
|
||||
Added: 2018-04-22
|
||||
Prefix: oc
|
||||
Comments: Occitan variant spoken in Auvergne
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: baku1926
|
||||
Description: Unified Turkic Latin Alphabet (Historical)
|
||||
Added: 2007-04-18
|
||||
@ -46510,6 +46630,13 @@ Prefix: en
|
||||
Comments: Jargon embedded in American English
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: cisaup
|
||||
Description: Cisalpine
|
||||
Added: 2018-04-22
|
||||
Prefix: oc
|
||||
Comments: Occitan variant spoken in northwestern Italy
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: colb1945
|
||||
Description: Portuguese-Brazilian Orthographic Convention of 1945
|
||||
(Convenção Ortográfica Luso-Brasileira de 1945)
|
||||
@ -46528,6 +46655,12 @@ Added: 2015-12-07
|
||||
Prefix: en
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: creiss
|
||||
Description: Occitan variants of the Croissant area
|
||||
Added: 2018-04-22
|
||||
Prefix: oc
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: dajnko
|
||||
Description: Slovene in Dajnko alphabet
|
||||
Added: 2012-06-27
|
||||
@ -46556,6 +46689,11 @@ Description: International Phonetic Alphabet
|
||||
Added: 2006-12-11
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: fonkirsh
|
||||
Description: Kirshenbaum Phonetic Alphabet
|
||||
Added: 2018-04-22
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: fonnapa
|
||||
Description: North American Phonetic Alphabet
|
||||
Description: Americanist Phonetic Notation
|
||||
@ -46573,6 +46711,36 @@ Added: 2010-10-23
|
||||
Comments: Indicates that the content is transcribed according to X-SAMPA
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: gascon
|
||||
Description: Gascon
|
||||
Added: 2018-04-22
|
||||
Prefix: oc
|
||||
Comments: Occitan variant spoken in Gascony
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: grclass
|
||||
Description: Classical Occitan orthography
|
||||
Added: 2018-04-22
|
||||
Prefix: oc
|
||||
Comments: Classical written standard for Occitan developed in 1935 by
|
||||
Alibèrt
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: grital
|
||||
Description: Italian-inspired Occitan orthography
|
||||
Added: 2018-04-22
|
||||
Prefix: oc
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: grmistr
|
||||
Description: Mistralian or Mistralian-inspired Occitan orthography
|
||||
Added: 2018-04-22
|
||||
Prefix: oc
|
||||
Comments: Written standard developed by Romanilha in 1853 and used by
|
||||
Mistral and the Félibres, including derived standards such as Escolo
|
||||
dóu Po, Escolo Gaston Febus, and others
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: hepburn
|
||||
Description: Hepburn romanization
|
||||
Added: 2009-10-01
|
||||
@ -46617,6 +46785,13 @@ Added: 2010-07-28
|
||||
Prefix: sa
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: ivanchov
|
||||
Description: Bulgarian in 1899 orthography
|
||||
Added: 2017-12-13
|
||||
Prefix: bg
|
||||
Comments: Bulgarian orthography introduced by Todor Ivanchov in 1899
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: jauer
|
||||
Description: Jauer dialect of Romansh
|
||||
Added: 2010-06-29
|
||||
@ -46659,6 +46834,20 @@ Added: 2010-07-28
|
||||
Prefix: sa
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: lemosin
|
||||
Description: Limousin
|
||||
Added: 2018-04-22
|
||||
Prefix: oc
|
||||
Comments: Occitan variant spoken in Limousin
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: lengadoc
|
||||
Description: Languedocien
|
||||
Added: 2018-04-22
|
||||
Prefix: oc
|
||||
Comments: Occitan variant spoken in Languedoc
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: lipaw
|
||||
Description: The Lipovaz dialect of Resian
|
||||
Description: The Lipovec dialect of Resian
|
||||
@ -46712,6 +46901,13 @@ Added: 2015-11-25
|
||||
Prefix: en-CA
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: nicard
|
||||
Description: Niçard
|
||||
Added: 2018-04-22
|
||||
Prefix: oc
|
||||
Comments: Occitan variant spoken in Nice
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: njiva
|
||||
Description: The Gniva dialect of Resian
|
||||
Description: The Njiva dialect of Resian
|
||||
@ -46798,6 +46994,13 @@ Added: 2006-12-11
|
||||
Prefix: el
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: provenc
|
||||
Description: Provençal
|
||||
Added: 2018-04-22
|
||||
Prefix: oc
|
||||
Comments: Occitan variant spoken in Provence
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: puter
|
||||
Description: Puter idiom of Romansh
|
||||
Added: 2010-06-29
|
||||
@ -46959,6 +47162,13 @@ Comments: Vallader is one of the five traditional written standards or
|
||||
"idioms" of the Romansh language.
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: vivaraup
|
||||
Description: Vivaro-Alpine
|
||||
Added: 2018-04-22
|
||||
Prefix: oc
|
||||
Comments: Occitan variant spoken in northeastern Occitania
|
||||
%%
|
||||
Type: variant
|
||||
Subtag: wadegile
|
||||
Description: Wade-Giles romanization
|
||||
Added: 2008-10-03
|
||||
|
||||
@ -103,7 +103,7 @@ ADD_EXPORTS := \
|
||||
$(GENSRC_DIR)/_gensrc_proc_done: $(PROC_SRCS) $(PROCESSOR_JARS)
|
||||
$(call MakeDir, $(@D))
|
||||
$(eval $(call ListPathsSafely,PROC_SRCS,$(@D)/_gensrc_proc_files))
|
||||
$(JAVA_SMALL) $(NEW_JAVAC) \
|
||||
$(JAVA) $(NEW_JAVAC) \
|
||||
-XDignore.symbol.file \
|
||||
--upgrade-module-path $(JDK_OUTPUTDIR)/modules --system none \
|
||||
$(ADD_EXPORTS) \
|
||||
|
||||
@ -3792,69 +3792,7 @@ bool Matcher::clone_address_expressions(AddPNode* m, Matcher::MStack& mstack, Ve
|
||||
return false;
|
||||
}
|
||||
|
||||
// Transform:
|
||||
// (AddP base (AddP base address (LShiftL index con)) offset)
|
||||
// into:
|
||||
// (AddP base (AddP base offset) (LShiftL index con))
|
||||
// to take full advantage of ARM's addressing modes
|
||||
void Compile::reshape_address(AddPNode* addp) {
|
||||
Node *addr = addp->in(AddPNode::Address);
|
||||
if (addr->is_AddP() && addr->in(AddPNode::Base) == addp->in(AddPNode::Base)) {
|
||||
const AddPNode *addp2 = addr->as_AddP();
|
||||
if ((addp2->in(AddPNode::Offset)->Opcode() == Op_LShiftL &&
|
||||
addp2->in(AddPNode::Offset)->in(2)->is_Con() &&
|
||||
size_fits_all_mem_uses(addp, addp2->in(AddPNode::Offset)->in(2)->get_int())) ||
|
||||
addp2->in(AddPNode::Offset)->Opcode() == Op_ConvI2L) {
|
||||
|
||||
// Any use that can't embed the address computation?
|
||||
for (DUIterator_Fast imax, i = addp->fast_outs(imax); i < imax; i++) {
|
||||
Node* u = addp->fast_out(i);
|
||||
if (!u->is_Mem()) {
|
||||
return;
|
||||
}
|
||||
if (u->is_LoadVector() || u->is_StoreVector() || u->Opcode() == Op_StoreCM) {
|
||||
return;
|
||||
}
|
||||
if (addp2->in(AddPNode::Offset)->Opcode() != Op_ConvI2L) {
|
||||
int scale = 1 << addp2->in(AddPNode::Offset)->in(2)->get_int();
|
||||
if (VM_Version::expensive_load(u->as_Mem()->memory_size(), scale)) {
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Node* off = addp->in(AddPNode::Offset);
|
||||
Node* addr2 = addp2->in(AddPNode::Address);
|
||||
Node* base = addp->in(AddPNode::Base);
|
||||
|
||||
Node* new_addr = NULL;
|
||||
// Check whether the graph already has the new AddP we need
|
||||
// before we create one (no GVN available here).
|
||||
for (DUIterator_Fast imax, i = addr2->fast_outs(imax); i < imax; i++) {
|
||||
Node* u = addr2->fast_out(i);
|
||||
if (u->is_AddP() &&
|
||||
u->in(AddPNode::Base) == base &&
|
||||
u->in(AddPNode::Address) == addr2 &&
|
||||
u->in(AddPNode::Offset) == off) {
|
||||
new_addr = u;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (new_addr == NULL) {
|
||||
new_addr = new AddPNode(base, addr2, off);
|
||||
}
|
||||
Node* new_off = addp2->in(AddPNode::Offset);
|
||||
addp->set_req(AddPNode::Address, new_addr);
|
||||
if (addr->outcnt() == 0) {
|
||||
addr->disconnect_inputs(NULL, this);
|
||||
}
|
||||
addp->set_req(AddPNode::Offset, new_off);
|
||||
if (off->outcnt() == 0) {
|
||||
off->disconnect_inputs(NULL, this);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// helper for encoding java_to_runtime calls on sim
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_CodeStubs.hpp"
|
||||
#include "c1/c1_FrameMap.hpp"
|
||||
#include "c1/c1_LIRAssembler.hpp"
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "asm/assembler.hpp"
|
||||
#include "c1/c1_CodeStubs.hpp"
|
||||
#include "c1/c1_Compilation.hpp"
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_Compilation.hpp"
|
||||
#include "c1/c1_FrameMap.hpp"
|
||||
#include "c1/c1_Instruction.hpp"
|
||||
|
||||
@ -29,6 +29,7 @@
|
||||
#include "gc/g1/c1/g1BarrierSetC1.hpp"
|
||||
#include "gc/g1/g1BarrierSet.hpp"
|
||||
#include "gc/g1/g1BarrierSetAssembler.hpp"
|
||||
#include "gc/g1/g1BarrierSetRuntime.hpp"
|
||||
#include "gc/g1/g1CardTable.hpp"
|
||||
#include "gc/g1/g1ThreadLocalData.hpp"
|
||||
#include "gc/g1/heapRegion.hpp"
|
||||
@ -60,9 +61,9 @@ void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm
|
||||
__ mov(c_rarg1, count);
|
||||
}
|
||||
if (UseCompressedOops) {
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_pre_narrow_oop_entry), 2);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), 2);
|
||||
} else {
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_pre_oop_entry), 2);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2);
|
||||
}
|
||||
__ pop(saved_regs, sp);
|
||||
}
|
||||
@ -78,7 +79,7 @@ void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* mas
|
||||
__ lsr(scratch, scratch, LogBytesPerHeapOop); // convert to element count
|
||||
__ mov(c_rarg0, start);
|
||||
__ mov(c_rarg1, scratch);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_post_entry), 2);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry), 2);
|
||||
__ pop(saved_regs, sp);
|
||||
}
|
||||
|
||||
@ -161,9 +162,9 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
|
||||
|
||||
if (expand_call) {
|
||||
assert(pre_val != c_rarg1, "smashed arg");
|
||||
__ super_call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), pre_val, thread);
|
||||
__ super_call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
|
||||
} else {
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), pre_val, thread);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
|
||||
}
|
||||
|
||||
__ pop(saved, sp);
|
||||
@ -245,7 +246,7 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
|
||||
// save the live input values
|
||||
RegSet saved = RegSet::of(store_addr, new_val);
|
||||
__ push(saved, sp);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread);
|
||||
__ pop(saved, sp);
|
||||
|
||||
__ bind(done);
|
||||
@ -398,7 +399,7 @@ void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler*
|
||||
__ bind(runtime);
|
||||
__ push_call_clobbered_registers();
|
||||
__ load_parameter(0, pre_val);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), pre_val, thread);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
|
||||
__ pop_call_clobbered_registers();
|
||||
__ bind(done);
|
||||
|
||||
@ -468,7 +469,7 @@ void G1BarrierSetAssembler::generate_c1_post_barrier_runtime_stub(StubAssembler*
|
||||
|
||||
__ bind(runtime);
|
||||
__ push_call_clobbered_registers();
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread);
|
||||
__ pop_call_clobbered_registers();
|
||||
__ bind(done);
|
||||
__ epilogue();
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "gc/shared/barrierSet.hpp"
|
||||
#include "gc/shared/barrierSetAssembler.hpp"
|
||||
#include "interp_masm_aarch64.hpp"
|
||||
|
||||
@ -27,7 +27,6 @@
|
||||
#define CPU_AARCH64_VM_INTERP_MASM_AARCH64_64_HPP
|
||||
|
||||
#include "asm/macroAssembler.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "interpreter/invocationCounter.hpp"
|
||||
#include "runtime/frame.hpp"
|
||||
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "interpreter/interp_masm.hpp"
|
||||
#include "interpreter/interpreter.hpp"
|
||||
#include "interpreter/interpreterRuntime.hpp"
|
||||
|
||||
@ -1020,7 +1020,7 @@ public:
|
||||
address trampoline_call(Address entry, CodeBuffer *cbuf = NULL);
|
||||
|
||||
static bool far_branches() {
|
||||
return ReservedCodeCacheSize > branch_range;
|
||||
return ReservedCodeCacheSize > branch_range || UseAOT;
|
||||
}
|
||||
|
||||
// Jumps that can reach anywhere in the code cache.
|
||||
|
||||
@ -234,8 +234,12 @@ class NativeCall: public NativeInstruction {
|
||||
}
|
||||
|
||||
#if INCLUDE_AOT
|
||||
// Return true iff a call from instr to target is out of range.
|
||||
// Used for calls from JIT- to AOT-compiled code.
|
||||
static bool is_far_call(address instr, address target) {
|
||||
return !Assembler::reachable_from_branch_at(instr, target);
|
||||
// On AArch64 we use trampolines which can reach anywhere in the
|
||||
// address space, so calls are never out of range.
|
||||
return false;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2002, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
@ -25,6 +25,7 @@
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/assembler.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "asm/register.hpp"
|
||||
#include "register_aarch64.hpp"
|
||||
# include "interp_masm_aarch64.hpp"
|
||||
|
||||
@ -24,7 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "gc/shared/barrierSetAssembler.hpp"
|
||||
#include "interpreter/bytecodeHistogram.hpp"
|
||||
#include "interpreter/interpreter.hpp"
|
||||
|
||||
@ -24,7 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "gc/shared/barrierSetAssembler.hpp"
|
||||
#include "interpreter/interpreter.hpp"
|
||||
#include "interpreter/interpreterRuntime.hpp"
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2016, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
@ -24,7 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "assembler_aarch64.inline.hpp"
|
||||
#include "code/vtableStubs.hpp"
|
||||
#include "interp_masm_aarch64.hpp"
|
||||
|
||||
@ -23,7 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_CodeStubs.hpp"
|
||||
#include "c1/c1_FrameMap.hpp"
|
||||
#include "c1/c1_LIRAssembler.hpp"
|
||||
|
||||
@ -23,6 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_Compilation.hpp"
|
||||
#include "c1/c1_LIRAssembler.hpp"
|
||||
#include "c1/c1_MacroAssembler.hpp"
|
||||
|
||||
@ -23,6 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_Compilation.hpp"
|
||||
#include "c1/c1_FrameMap.hpp"
|
||||
#include "c1/c1_Instruction.hpp"
|
||||
|
||||
@ -23,7 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_Defs.hpp"
|
||||
#include "c1/c1_LIRAssembler.hpp"
|
||||
#include "c1/c1_MacroAssembler.hpp"
|
||||
|
||||
@ -26,6 +26,7 @@
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "gc/g1/g1BarrierSet.hpp"
|
||||
#include "gc/g1/g1BarrierSetAssembler.hpp"
|
||||
#include "gc/g1/g1BarrierSetRuntime.hpp"
|
||||
#include "gc/g1/g1ThreadLocalData.hpp"
|
||||
#include "gc/g1/g1CardTable.hpp"
|
||||
#include "gc/g1/g1ThreadLocalData.hpp"
|
||||
@ -74,7 +75,7 @@ void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm
|
||||
__ mov(R0, addr);
|
||||
}
|
||||
#ifdef AARCH64
|
||||
__ zero_extend(R1, count, 32); // G1BarrierSet::write_ref_array_pre_*_entry takes size_t
|
||||
__ zero_extend(R1, count, 32); // G1BarrierSetRuntime::write_ref_array_pre_*_entry takes size_t
|
||||
#else
|
||||
if (count != R1) {
|
||||
__ mov(R1, count);
|
||||
@ -82,9 +83,9 @@ void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm
|
||||
#endif // AARCH64
|
||||
|
||||
if (UseCompressedOops) {
|
||||
__ call(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_pre_narrow_oop_entry));
|
||||
__ call(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry));
|
||||
} else {
|
||||
__ call(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_pre_oop_entry));
|
||||
__ call(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry));
|
||||
}
|
||||
|
||||
#ifdef AARCH64
|
||||
@ -106,7 +107,7 @@ void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* mas
|
||||
__ mov(R0, addr);
|
||||
}
|
||||
#ifdef AARCH64
|
||||
__ zero_extend(R1, count, 32); // G1BarrierSet::write_ref_array_post_entry takes size_t
|
||||
__ zero_extend(R1, count, 32); // G1BarrierSetRuntime::write_ref_array_post_entry takes size_t
|
||||
#else
|
||||
if (count != R1) {
|
||||
__ mov(R1, count);
|
||||
@ -120,7 +121,7 @@ void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* mas
|
||||
__ push(R9);
|
||||
#endif // !R9_IS_SCRATCHED
|
||||
#endif // !AARCH64
|
||||
__ call(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_post_entry));
|
||||
__ call(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry));
|
||||
#ifndef AARCH64
|
||||
#if R9_IS_SCRATCHED
|
||||
__ pop(R9);
|
||||
@ -205,7 +206,7 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
|
||||
}
|
||||
__ mov(R1, Rthread);
|
||||
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), R0, R1);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), R0, R1);
|
||||
|
||||
#ifdef AARCH64
|
||||
if (store_addr != noreg) {
|
||||
@ -296,7 +297,7 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
|
||||
__ mov(R0, card_addr);
|
||||
}
|
||||
__ mov(R1, Rthread);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), R0, R1);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), R0, R1);
|
||||
|
||||
__ bind(done);
|
||||
}
|
||||
@ -467,7 +468,7 @@ void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler*
|
||||
|
||||
assert(r_pre_val_0 == c_rarg0, "pre_val should be in R0");
|
||||
__ mov(c_rarg1, Rthread);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), c_rarg0, c_rarg1);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), c_rarg0, c_rarg1);
|
||||
|
||||
__ restore_live_registers_without_return();
|
||||
|
||||
@ -574,7 +575,7 @@ void G1BarrierSetAssembler::generate_c1_post_barrier_runtime_stub(StubAssembler*
|
||||
|
||||
assert(r_card_addr_0 == c_rarg0, "card_addr should be in R0");
|
||||
__ mov(c_rarg1, Rthread);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), c_rarg0, c_rarg1);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), c_rarg0, c_rarg1);
|
||||
|
||||
__ restore_live_registers_without_return();
|
||||
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "jvm.h"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "gc/shared/barrierSet.hpp"
|
||||
#include "gc/shared/cardTable.hpp"
|
||||
#include "gc/shared/cardTableBarrierSet.inline.hpp"
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2008, 2017, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -26,7 +26,6 @@
|
||||
#define CPU_ARM_VM_INTERP_MASM_ARM_HPP
|
||||
|
||||
#include "asm/macroAssembler.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "interpreter/invocationCounter.hpp"
|
||||
#include "runtime/frame.hpp"
|
||||
#include "prims/jvmtiExport.hpp"
|
||||
|
||||
@ -23,6 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "interpreter/interp_masm.hpp"
|
||||
#include "interpreter/interpreter.hpp"
|
||||
#include "interpreter/interpreterRuntime.hpp"
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2008, 2016, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -29,7 +29,7 @@
|
||||
#include "nativeInst_arm.hpp"
|
||||
#include "oops/compressedOops.inline.hpp"
|
||||
#include "oops/oop.hpp"
|
||||
#include "runtime/orderAccess.inline.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/safepoint.hpp"
|
||||
|
||||
void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) {
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/assembler.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "interpreter/bytecodeHistogram.hpp"
|
||||
#include "interpreter/interp_masm.hpp"
|
||||
#include "interpreter/interpreter.hpp"
|
||||
|
||||
@ -23,7 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "gc/shared/barrierSetAssembler.hpp"
|
||||
#include "interpreter/interp_masm.hpp"
|
||||
#include "interpreter/interpreter.hpp"
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2008, 2016, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -24,6 +24,7 @@
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/assembler.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "assembler_arm.inline.hpp"
|
||||
#include "code/vtableStubs.hpp"
|
||||
#include "interp_masm_arm.hpp"
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_CodeStubs.hpp"
|
||||
#include "c1/c1_FrameMap.hpp"
|
||||
#include "c1/c1_LIRAssembler.hpp"
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_Compilation.hpp"
|
||||
#include "c1/c1_LIRAssembler.hpp"
|
||||
#include "c1/c1_MacroAssembler.hpp"
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_Compilation.hpp"
|
||||
#include "c1/c1_FrameMap.hpp"
|
||||
#include "c1/c1_Instruction.hpp"
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_MacroAssembler.hpp"
|
||||
#include "c1/c1_Runtime1.hpp"
|
||||
#include "classfile/systemDictionary.hpp"
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_Defs.hpp"
|
||||
#include "c1/c1_MacroAssembler.hpp"
|
||||
#include "c1/c1_Runtime1.hpp"
|
||||
|
||||
@ -27,6 +27,7 @@
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "gc/g1/g1BarrierSet.hpp"
|
||||
#include "gc/g1/g1BarrierSetAssembler.hpp"
|
||||
#include "gc/g1/g1BarrierSetRuntime.hpp"
|
||||
#include "gc/g1/g1CardTable.hpp"
|
||||
#include "gc/g1/g1ThreadLocalData.hpp"
|
||||
#include "gc/g1/heapRegion.hpp"
|
||||
@ -72,9 +73,9 @@ void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm
|
||||
if (preserve2 != noreg) { __ std(preserve2, frame_size - (++slot_nr) * wordSize, R1_SP); }
|
||||
|
||||
if (UseCompressedOops) {
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_pre_narrow_oop_entry), to, count);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), to, count);
|
||||
} else {
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_pre_oop_entry), to, count);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), to, count);
|
||||
}
|
||||
|
||||
slot_nr = 0;
|
||||
@ -98,7 +99,7 @@ void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* mas
|
||||
__ save_LR_CR(R0);
|
||||
__ push_frame(frame_size, R0);
|
||||
if (preserve != noreg) { __ std(preserve, frame_size - 1 * wordSize, R1_SP); }
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_post_entry), addr, count);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry), addr, count);
|
||||
if (preserve != noreg) { __ ld(preserve, frame_size - 1 * wordSize, R1_SP); }
|
||||
__ addi(R1_SP, R1_SP, frame_size); // pop_frame();
|
||||
__ restore_LR_CR(R0);
|
||||
@ -191,7 +192,7 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm, Decorator
|
||||
}
|
||||
|
||||
if (pre_val->is_volatile() && preloaded) { __ mr(nv_save, pre_val); } // Save pre_val across C call if it was preloaded.
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), pre_val, R16_thread);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, R16_thread);
|
||||
if (pre_val->is_volatile() && preloaded) { __ mr(pre_val, nv_save); } // restore
|
||||
|
||||
if (needs_frame) {
|
||||
@ -272,7 +273,7 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm, Decorato
|
||||
__ bind(runtime);
|
||||
|
||||
// Save the live input values.
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), Rcard_addr, R16_thread);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), Rcard_addr, R16_thread);
|
||||
|
||||
__ bind(filtered);
|
||||
}
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2012, 2015 SAP SE. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
@ -30,7 +30,7 @@
|
||||
#include "oops/compressedOops.inline.hpp"
|
||||
#include "oops/oop.hpp"
|
||||
#include "runtime/handles.hpp"
|
||||
#include "runtime/orderAccess.inline.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/sharedRuntime.hpp"
|
||||
#include "runtime/stubRoutines.hpp"
|
||||
#include "utilities/ostream.hpp"
|
||||
|
||||
@ -2967,6 +2967,7 @@ class Assembler : public AbstractAssembler {
|
||||
|
||||
// branch never (nop)
|
||||
inline void z_nop();
|
||||
inline void nop(); // Used by shared code.
|
||||
|
||||
// ===============================================================================================
|
||||
|
||||
|
||||
@ -1311,6 +1311,7 @@ inline void Assembler::z_clgij(Register r1, int64_t i2, branch_condition m3, Lab
|
||||
|
||||
// branch never (nop), branch always
|
||||
inline void Assembler::z_nop() { z_bcr(bcondNop, Z_R0); }
|
||||
inline void Assembler::nop() { z_nop(); }
|
||||
inline void Assembler::z_br(Register r2) { assert(r2 != Z_R0, "nop if target is Z_R0, use z_nop() instead"); z_bcr(bcondAlways, r2 ); }
|
||||
|
||||
inline void Assembler::z_exrl(Register r1, Label& L) { z_exrl(r1, target(L)); } // z10
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_CodeStubs.hpp"
|
||||
#include "c1/c1_FrameMap.hpp"
|
||||
#include "c1/c1_LIRAssembler.hpp"
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_Compilation.hpp"
|
||||
#include "c1/c1_LIRAssembler.hpp"
|
||||
#include "c1/c1_MacroAssembler.hpp"
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_MacroAssembler.hpp"
|
||||
#include "c1/c1_Runtime1.hpp"
|
||||
#include "classfile/systemDictionary.hpp"
|
||||
|
||||
@ -95,8 +95,6 @@
|
||||
void invalidate_registers(Register preserve1 = noreg, Register preserve2 = noreg,
|
||||
Register preserve3 = noreg) PRODUCT_RETURN;
|
||||
|
||||
void nop() { z_nop(); }
|
||||
|
||||
// This platform only uses signal-based null checks. The Label is not needed.
|
||||
void null_check(Register r, Label *Lnull = NULL) { MacroAssembler::null_check(r); }
|
||||
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_Defs.hpp"
|
||||
#include "c1/c1_MacroAssembler.hpp"
|
||||
#include "c1/c1_Runtime1.hpp"
|
||||
|
||||
@ -29,6 +29,7 @@
|
||||
#include "gc/g1/g1CardTable.hpp"
|
||||
#include "gc/g1/g1BarrierSet.hpp"
|
||||
#include "gc/g1/g1BarrierSetAssembler.hpp"
|
||||
#include "gc/g1/g1BarrierSetRuntime.hpp"
|
||||
#include "gc/g1/g1ThreadLocalData.hpp"
|
||||
#include "gc/g1/heapRegion.hpp"
|
||||
#include "interpreter/interp_masm.hpp"
|
||||
@ -66,9 +67,9 @@ void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm
|
||||
RegisterSaver::save_live_registers(masm, RegisterSaver::arg_registers); // Creates frame.
|
||||
|
||||
if (UseCompressedOops) {
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_pre_narrow_oop_entry), addr, count);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), addr, count);
|
||||
} else {
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_pre_oop_entry), addr, count);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), addr, count);
|
||||
}
|
||||
|
||||
RegisterSaver::restore_live_registers(masm, RegisterSaver::arg_registers);
|
||||
@ -79,7 +80,7 @@ void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm
|
||||
|
||||
void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
|
||||
Register addr, Register count, bool do_return) {
|
||||
address entry_point = CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_post_entry);
|
||||
address entry_point = CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry);
|
||||
if (!do_return) {
|
||||
assert_different_registers(addr, Z_R0_scratch); // would be destroyed by push_frame()
|
||||
assert_different_registers(count, Z_R0_scratch); // would be destroyed by push_frame()
|
||||
@ -234,7 +235,7 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm, Decorator
|
||||
__ push_frame_abi160(0); // Will use Z_R0 as tmp.
|
||||
|
||||
// Rpre_val may be destroyed by push_frame().
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), Rpre_save, Z_thread);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), Rpre_save, Z_thread);
|
||||
|
||||
__ pop_frame();
|
||||
__ restore_return_pc();
|
||||
@ -359,7 +360,7 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm, Decorato
|
||||
}
|
||||
|
||||
// Save the live input values.
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), Rcard_addr, Z_thread);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), Rcard_addr, Z_thread);
|
||||
|
||||
if (needs_frame) {
|
||||
__ pop_frame();
|
||||
|
||||
@ -23,6 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_CodeStubs.hpp"
|
||||
#include "c1/c1_FrameMap.hpp"
|
||||
#include "c1/c1_LIRAssembler.hpp"
|
||||
|
||||
@ -23,6 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_Compilation.hpp"
|
||||
#include "c1/c1_LIRAssembler.hpp"
|
||||
#include "c1/c1_MacroAssembler.hpp"
|
||||
|
||||
@ -23,6 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_Compilation.hpp"
|
||||
#include "c1/c1_FrameMap.hpp"
|
||||
#include "c1/c1_Instruction.hpp"
|
||||
|
||||
@ -23,6 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_MacroAssembler.hpp"
|
||||
#include "c1/c1_Runtime1.hpp"
|
||||
#include "classfile/systemDictionary.hpp"
|
||||
|
||||
@ -23,6 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "c1/c1_Defs.hpp"
|
||||
#include "c1/c1_MacroAssembler.hpp"
|
||||
#include "c1/c1_Runtime1.hpp"
|
||||
|
||||
@ -26,6 +26,7 @@
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "gc/g1/g1BarrierSet.hpp"
|
||||
#include "gc/g1/g1BarrierSetAssembler.hpp"
|
||||
#include "gc/g1/g1BarrierSetRuntime.hpp"
|
||||
#include "gc/g1/g1CardTable.hpp"
|
||||
#include "gc/g1/g1ThreadLocalData.hpp"
|
||||
#include "gc/g1/heapRegion.hpp"
|
||||
@ -68,8 +69,8 @@ void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm
|
||||
}
|
||||
__ mov(addr->after_save(), O0);
|
||||
// Get the count into O1
|
||||
address slowpath = UseCompressedOops ? CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_pre_narrow_oop_entry)
|
||||
: CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_pre_oop_entry);
|
||||
address slowpath = UseCompressedOops ? CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry)
|
||||
: CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry);
|
||||
__ call(slowpath);
|
||||
__ delayed()->mov(count->after_save(), O1);
|
||||
if (addr->is_global()) {
|
||||
@ -90,7 +91,7 @@ void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* mas
|
||||
// Get some new fresh output registers.
|
||||
__ save_frame(0);
|
||||
__ mov(addr->after_save(), O0);
|
||||
__ call(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_post_entry));
|
||||
__ call(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry));
|
||||
__ delayed()->mov(count->after_save(), O1);
|
||||
__ restore();
|
||||
}
|
||||
|
||||
@ -23,6 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "gc/shared/barrierSetAssembler.hpp"
|
||||
#include "interpreter/interp_masm.hpp"
|
||||
#include "runtime/jniHandles.hpp"
|
||||
|
||||
@ -23,6 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "interp_masm_sparc.hpp"
|
||||
#include "interpreter/interpreter.hpp"
|
||||
#include "interpreter/interpreterRuntime.hpp"
|
||||
|
||||
@ -25,7 +25,7 @@
|
||||
#ifndef CPU_SPARC_VM_INTERP_MASM_SPARC_HPP
|
||||
#define CPU_SPARC_VM_INTERP_MASM_SPARC_HPP
|
||||
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "asm/macroAssembler.hpp"
|
||||
#include "interpreter/invocationCounter.hpp"
|
||||
|
||||
// This file specializes the assember with interpreter-specific macros
|
||||
|
||||
@ -3338,6 +3338,12 @@ SkipIfEqual::~SkipIfEqual() {
|
||||
_masm->bind(_label);
|
||||
}
|
||||
|
||||
void MacroAssembler::bang_stack_with_offset(int offset) {
|
||||
// stack grows down, caller passes positive offset
|
||||
assert(offset > 0, "must bang with negative offset");
|
||||
set((-offset)+STACK_BIAS, G3_scratch);
|
||||
st(G0, SP, G3_scratch);
|
||||
}
|
||||
|
||||
// Writes to stack successive pages until offset reached to check for
|
||||
// stack overflow + shadow pages. This clobbers tsp and scratch.
|
||||
|
||||
@ -1303,7 +1303,7 @@ public:
|
||||
// Stack overflow checking
|
||||
|
||||
// Note: this clobbers G3_scratch
|
||||
inline void bang_stack_with_offset(int offset);
|
||||
void bang_stack_with_offset(int offset);
|
||||
|
||||
// Writes to stack successive pages until offset reached to check for
|
||||
// stack overflow + shadow pages. Clobbers tsp and scratch registers.
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -724,12 +724,4 @@ inline void MacroAssembler::swap(const Address& a, Register d, int offset) {
|
||||
if (a.has_index()) { assert(offset == 0, ""); swap(a.base(), a.index(), d ); }
|
||||
else { swap(a.base(), a.disp() + offset, d); }
|
||||
}
|
||||
|
||||
inline void MacroAssembler::bang_stack_with_offset(int offset) {
|
||||
// stack grows down, caller passes positive offset
|
||||
assert(offset > 0, "must bang with negative offset");
|
||||
set((-offset)+STACK_BIAS, G3_scratch);
|
||||
st(G0, SP, G3_scratch);
|
||||
}
|
||||
|
||||
#endif // CPU_SPARC_VM_MACROASSEMBLER_SPARC_INLINE_HPP
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2015, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2015, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -24,6 +24,7 @@
|
||||
|
||||
#include "precompiled.hpp"
|
||||
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "gc/shared/memset_with_concurrent_readers.hpp"
|
||||
#include "runtime/prefetch.inline.hpp"
|
||||
#include "utilities/align.hpp"
|
||||
|
||||
@ -24,7 +24,7 @@
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "jvm.h"
|
||||
#include "asm/macroAssembler.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "classfile/javaClasses.inline.hpp"
|
||||
#include "interpreter/interpreter.hpp"
|
||||
#include "interpreter/interp_masm.hpp"
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1998, 2017, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1998, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -23,7 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/assembler.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "code/relocInfo.hpp"
|
||||
#include "nativeInst_sparc.hpp"
|
||||
#include "oops/compressedOops.inline.hpp"
|
||||
|
||||
@ -23,7 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "gc/shared/barrierSetAssembler.hpp"
|
||||
#include "interpreter/bytecodeHistogram.hpp"
|
||||
#include "interpreter/interpreter.hpp"
|
||||
|
||||
@ -23,6 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "gc/shared/barrierSetAssembler.hpp"
|
||||
#include "interpreter/interpreter.hpp"
|
||||
#include "interpreter/interpreterRuntime.hpp"
|
||||
|
||||
@ -26,6 +26,7 @@
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "gc/g1/g1BarrierSet.hpp"
|
||||
#include "gc/g1/g1BarrierSetAssembler.hpp"
|
||||
#include "gc/g1/g1BarrierSetRuntime.hpp"
|
||||
#include "gc/g1/g1CardTable.hpp"
|
||||
#include "gc/g1/g1ThreadLocalData.hpp"
|
||||
#include "gc/g1/heapRegion.hpp"
|
||||
@ -80,12 +81,12 @@ void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm
|
||||
__ movptr(c_rarg1, count);
|
||||
}
|
||||
if (UseCompressedOops) {
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_pre_narrow_oop_entry), 2);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), 2);
|
||||
} else {
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_pre_oop_entry), 2);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2);
|
||||
}
|
||||
#else
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_pre_oop_entry),
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry),
|
||||
addr, count);
|
||||
#endif
|
||||
__ popa();
|
||||
@ -107,9 +108,9 @@ void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* mas
|
||||
__ mov(c_rarg0, addr);
|
||||
__ mov(c_rarg1, count);
|
||||
}
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_post_entry), 2);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry), 2);
|
||||
#else
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSet::write_ref_array_post_entry),
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry),
|
||||
addr, count);
|
||||
#endif
|
||||
__ popa();
|
||||
@ -238,9 +239,9 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
|
||||
__ push(thread);
|
||||
__ push(pre_val);
|
||||
#endif
|
||||
__ MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), 2);
|
||||
__ MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), 2);
|
||||
} else {
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), pre_val, thread);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
|
||||
}
|
||||
|
||||
NOT_LP64( __ pop(thread); )
|
||||
@ -333,10 +334,10 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
|
||||
__ push(store_addr);
|
||||
__ push(new_val);
|
||||
#ifdef _LP64
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, r15_thread);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, r15_thread);
|
||||
#else
|
||||
__ push(thread);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread);
|
||||
__ pop(thread);
|
||||
#endif
|
||||
__ pop(new_val);
|
||||
@ -500,7 +501,7 @@ void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler*
|
||||
|
||||
// load the pre-value
|
||||
__ load_parameter(0, rcx);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), rcx, thread);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), rcx, thread);
|
||||
|
||||
__ restore_live_registers(true);
|
||||
|
||||
@ -577,7 +578,7 @@ void G1BarrierSetAssembler::generate_c1_post_barrier_runtime_stub(StubAssembler*
|
||||
|
||||
__ save_live_registers_no_oop_map(true);
|
||||
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread);
|
||||
__ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread);
|
||||
|
||||
__ restore_live_registers(true);
|
||||
|
||||
|
||||
@ -34,6 +34,7 @@ void BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators,
|
||||
bool on_heap = (decorators & IN_HEAP) != 0;
|
||||
bool on_root = (decorators & IN_ROOT) != 0;
|
||||
bool oop_not_null = (decorators & OOP_NOT_NULL) != 0;
|
||||
bool atomic = (decorators & MO_RELAXED) != 0;
|
||||
|
||||
switch (type) {
|
||||
case T_OBJECT:
|
||||
@ -58,6 +59,37 @@ void BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators,
|
||||
}
|
||||
break;
|
||||
}
|
||||
case T_BOOLEAN: __ load_unsigned_byte(dst, src); break;
|
||||
case T_BYTE: __ load_signed_byte(dst, src); break;
|
||||
case T_CHAR: __ load_unsigned_short(dst, src); break;
|
||||
case T_SHORT: __ load_signed_short(dst, src); break;
|
||||
case T_INT: __ movl (dst, src); break;
|
||||
case T_ADDRESS: __ movptr(dst, src); break;
|
||||
case T_FLOAT:
|
||||
assert(dst == noreg, "only to ftos");
|
||||
__ load_float(src);
|
||||
break;
|
||||
case T_DOUBLE:
|
||||
assert(dst == noreg, "only to dtos");
|
||||
__ load_double(src);
|
||||
break;
|
||||
case T_LONG:
|
||||
assert(dst == noreg, "only to ltos");
|
||||
#ifdef _LP64
|
||||
__ movq(rax, src);
|
||||
#else
|
||||
if (atomic) {
|
||||
__ fild_d(src); // Must load atomically
|
||||
__ subptr(rsp,2*wordSize); // Make space for store
|
||||
__ fistp_d(Address(rsp,0));
|
||||
__ pop(rax);
|
||||
__ pop(rdx);
|
||||
} else {
|
||||
__ movl(rax, src);
|
||||
__ movl(rdx, src.plus_disp(wordSize));
|
||||
}
|
||||
#endif
|
||||
break;
|
||||
default: Unimplemented();
|
||||
}
|
||||
}
|
||||
@ -67,6 +99,7 @@ void BarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators
|
||||
bool on_heap = (decorators & IN_HEAP) != 0;
|
||||
bool on_root = (decorators & IN_ROOT) != 0;
|
||||
bool oop_not_null = (decorators & OOP_NOT_NULL) != 0;
|
||||
bool atomic = (decorators & MO_RELAXED) != 0;
|
||||
|
||||
switch (type) {
|
||||
case T_OBJECT:
|
||||
@ -106,6 +139,50 @@ void BarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators
|
||||
}
|
||||
break;
|
||||
}
|
||||
case T_BOOLEAN:
|
||||
__ andl(val, 0x1); // boolean is true if LSB is 1
|
||||
__ movb(dst, val);
|
||||
break;
|
||||
case T_BYTE:
|
||||
__ movb(dst, val);
|
||||
break;
|
||||
case T_SHORT:
|
||||
__ movw(dst, val);
|
||||
break;
|
||||
case T_CHAR:
|
||||
__ movw(dst, val);
|
||||
break;
|
||||
case T_INT:
|
||||
__ movl(dst, val);
|
||||
break;
|
||||
case T_LONG:
|
||||
assert(val == noreg, "only tos");
|
||||
#ifdef _LP64
|
||||
__ movq(dst, rax);
|
||||
#else
|
||||
if (atomic) {
|
||||
__ push(rdx);
|
||||
__ push(rax); // Must update atomically with FIST
|
||||
__ fild_d(Address(rsp,0)); // So load into FPU register
|
||||
__ fistp_d(dst); // and put into memory atomically
|
||||
__ addptr(rsp, 2*wordSize);
|
||||
} else {
|
||||
__ movptr(dst, rax);
|
||||
__ movptr(dst.plus_disp(wordSize), rdx);
|
||||
}
|
||||
#endif
|
||||
break;
|
||||
case T_FLOAT:
|
||||
assert(val == noreg, "only tos");
|
||||
__ store_float(dst);
|
||||
break;
|
||||
case T_DOUBLE:
|
||||
assert(val == noreg, "only tos");
|
||||
__ store_double(dst);
|
||||
break;
|
||||
case T_ADDRESS:
|
||||
__ movptr(dst, val);
|
||||
break;
|
||||
default: Unimplemented();
|
||||
}
|
||||
}
|
||||
|
||||
@ -26,7 +26,6 @@
|
||||
#define CPU_X86_VM_INTERP_MASM_X86_HPP
|
||||
|
||||
#include "asm/macroAssembler.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "interpreter/invocationCounter.hpp"
|
||||
#include "runtime/frame.hpp"
|
||||
|
||||
|
||||
@ -175,7 +175,9 @@ void MethodHandles::jump_to_lambda_form(MacroAssembler* _masm,
|
||||
__ verify_oop(method_temp);
|
||||
__ load_heap_oop(method_temp, Address(method_temp, NONZERO(java_lang_invoke_MemberName::method_offset_in_bytes())), temp2);
|
||||
__ verify_oop(method_temp);
|
||||
__ movptr(method_temp, Address(method_temp, NONZERO(java_lang_invoke_ResolvedMethodName::vmtarget_offset_in_bytes())));
|
||||
__ access_load_at(T_ADDRESS, IN_HEAP, method_temp,
|
||||
Address(method_temp, NONZERO(java_lang_invoke_ResolvedMethodName::vmtarget_offset_in_bytes())),
|
||||
noreg, noreg);
|
||||
|
||||
if (VerifyMethodHandles && !for_compiler_entry) {
|
||||
// make sure recv is already on stack
|
||||
@ -390,7 +392,7 @@ void MethodHandles::generate_method_handle_dispatch(MacroAssembler* _masm,
|
||||
verify_ref_kind(_masm, JVM_REF_invokeSpecial, member_reg, temp3);
|
||||
}
|
||||
__ load_heap_oop(rbx_method, member_vmtarget);
|
||||
__ movptr(rbx_method, vmtarget_method);
|
||||
__ access_load_at(T_ADDRESS, IN_HEAP, rbx_method, vmtarget_method, noreg, noreg);
|
||||
break;
|
||||
|
||||
case vmIntrinsics::_linkToStatic:
|
||||
@ -398,7 +400,7 @@ void MethodHandles::generate_method_handle_dispatch(MacroAssembler* _masm,
|
||||
verify_ref_kind(_masm, JVM_REF_invokeStatic, member_reg, temp3);
|
||||
}
|
||||
__ load_heap_oop(rbx_method, member_vmtarget);
|
||||
__ movptr(rbx_method, vmtarget_method);
|
||||
__ access_load_at(T_ADDRESS, IN_HEAP, rbx_method, vmtarget_method, noreg, noreg);
|
||||
break;
|
||||
|
||||
case vmIntrinsics::_linkToVirtual:
|
||||
@ -412,7 +414,7 @@ void MethodHandles::generate_method_handle_dispatch(MacroAssembler* _masm,
|
||||
|
||||
// pick out the vtable index from the MemberName, and then we can discard it:
|
||||
Register temp2_index = temp2;
|
||||
__ movptr(temp2_index, member_vmindex);
|
||||
__ access_load_at(T_ADDRESS, IN_HEAP, temp2_index, member_vmindex, noreg, noreg);
|
||||
|
||||
if (VerifyMethodHandles) {
|
||||
Label L_index_ok;
|
||||
@ -446,7 +448,7 @@ void MethodHandles::generate_method_handle_dispatch(MacroAssembler* _masm,
|
||||
__ verify_klass_ptr(temp3_intf);
|
||||
|
||||
Register rbx_index = rbx_method;
|
||||
__ movptr(rbx_index, member_vmindex);
|
||||
__ access_load_at(T_ADDRESS, IN_HEAP, rbx_index, member_vmindex, noreg, noreg);
|
||||
if (VerifyMethodHandles) {
|
||||
Label L;
|
||||
__ cmpl(rbx_index, 0);
|
||||
|
||||
@ -770,9 +770,10 @@ void TemplateTable::iaload() {
|
||||
// rax: index
|
||||
// rdx: array
|
||||
index_check(rdx, rax); // kills rbx
|
||||
__ movl(rax, Address(rdx, rax,
|
||||
Address::times_4,
|
||||
arrayOopDesc::base_offset_in_bytes(T_INT)));
|
||||
__ access_load_at(T_INT, IN_HEAP | IN_HEAP_ARRAY, rax,
|
||||
Address(rdx, rax, Address::times_4,
|
||||
arrayOopDesc::base_offset_in_bytes(T_INT)),
|
||||
noreg, noreg);
|
||||
}
|
||||
|
||||
void TemplateTable::laload() {
|
||||
@ -782,8 +783,10 @@ void TemplateTable::laload() {
|
||||
index_check(rdx, rax); // kills rbx
|
||||
NOT_LP64(__ mov(rbx, rax));
|
||||
// rbx,: index
|
||||
__ movptr(rax, Address(rdx, rbx, Address::times_8, arrayOopDesc::base_offset_in_bytes(T_LONG) + 0 * wordSize));
|
||||
NOT_LP64(__ movl(rdx, Address(rdx, rbx, Address::times_8, arrayOopDesc::base_offset_in_bytes(T_LONG) + 1 * wordSize)));
|
||||
__ access_load_at(T_LONG, IN_HEAP | IN_HEAP_ARRAY, noreg /* ltos */,
|
||||
Address(rdx, rbx, Address::times_8,
|
||||
arrayOopDesc::base_offset_in_bytes(T_LONG)),
|
||||
noreg, noreg);
|
||||
}
|
||||
|
||||
|
||||
@ -793,9 +796,11 @@ void TemplateTable::faload() {
|
||||
// rax: index
|
||||
// rdx: array
|
||||
index_check(rdx, rax); // kills rbx
|
||||
__ load_float(Address(rdx, rax,
|
||||
Address::times_4,
|
||||
arrayOopDesc::base_offset_in_bytes(T_FLOAT)));
|
||||
__ access_load_at(T_FLOAT, IN_HEAP | IN_HEAP_ARRAY, noreg /* ftos */,
|
||||
Address(rdx, rax,
|
||||
Address::times_4,
|
||||
arrayOopDesc::base_offset_in_bytes(T_FLOAT)),
|
||||
noreg, noreg);
|
||||
}
|
||||
|
||||
void TemplateTable::daload() {
|
||||
@ -803,9 +808,11 @@ void TemplateTable::daload() {
|
||||
// rax: index
|
||||
// rdx: array
|
||||
index_check(rdx, rax); // kills rbx
|
||||
__ load_double(Address(rdx, rax,
|
||||
Address::times_8,
|
||||
arrayOopDesc::base_offset_in_bytes(T_DOUBLE)));
|
||||
__ access_load_at(T_DOUBLE, IN_HEAP | IN_HEAP_ARRAY, noreg /* dtos */,
|
||||
Address(rdx, rax,
|
||||
Address::times_8,
|
||||
arrayOopDesc::base_offset_in_bytes(T_DOUBLE)),
|
||||
noreg, noreg);
|
||||
}
|
||||
|
||||
void TemplateTable::aaload() {
|
||||
@ -826,7 +833,9 @@ void TemplateTable::baload() {
|
||||
// rax: index
|
||||
// rdx: array
|
||||
index_check(rdx, rax); // kills rbx
|
||||
__ load_signed_byte(rax, Address(rdx, rax, Address::times_1, arrayOopDesc::base_offset_in_bytes(T_BYTE)));
|
||||
__ access_load_at(T_BYTE, IN_HEAP | IN_HEAP_ARRAY, rax,
|
||||
Address(rdx, rax, Address::times_1, arrayOopDesc::base_offset_in_bytes(T_BYTE)),
|
||||
noreg, noreg);
|
||||
}
|
||||
|
||||
void TemplateTable::caload() {
|
||||
@ -834,7 +843,9 @@ void TemplateTable::caload() {
|
||||
// rax: index
|
||||
// rdx: array
|
||||
index_check(rdx, rax); // kills rbx
|
||||
__ load_unsigned_short(rax, Address(rdx, rax, Address::times_2, arrayOopDesc::base_offset_in_bytes(T_CHAR)));
|
||||
__ access_load_at(T_CHAR, IN_HEAP | IN_HEAP_ARRAY, rax,
|
||||
Address(rdx, rax, Address::times_2, arrayOopDesc::base_offset_in_bytes(T_CHAR)),
|
||||
noreg, noreg);
|
||||
}
|
||||
|
||||
// iload followed by caload frequent pair
|
||||
@ -847,10 +858,9 @@ void TemplateTable::fast_icaload() {
|
||||
// rax: index
|
||||
// rdx: array
|
||||
index_check(rdx, rax); // kills rbx
|
||||
__ load_unsigned_short(rax,
|
||||
Address(rdx, rax,
|
||||
Address::times_2,
|
||||
arrayOopDesc::base_offset_in_bytes(T_CHAR)));
|
||||
__ access_load_at(T_CHAR, IN_HEAP | IN_HEAP_ARRAY, rax,
|
||||
Address(rdx, rax, Address::times_2, arrayOopDesc::base_offset_in_bytes(T_CHAR)),
|
||||
noreg, noreg);
|
||||
}
|
||||
|
||||
|
||||
@ -859,7 +869,9 @@ void TemplateTable::saload() {
|
||||
// rax: index
|
||||
// rdx: array
|
||||
index_check(rdx, rax); // kills rbx
|
||||
__ load_signed_short(rax, Address(rdx, rax, Address::times_2, arrayOopDesc::base_offset_in_bytes(T_SHORT)));
|
||||
__ access_load_at(T_SHORT, IN_HEAP | IN_HEAP_ARRAY, rax,
|
||||
Address(rdx, rax, Address::times_2, arrayOopDesc::base_offset_in_bytes(T_SHORT)),
|
||||
noreg, noreg);
|
||||
}
|
||||
|
||||
void TemplateTable::iload(int n) {
|
||||
@ -1051,10 +1063,10 @@ void TemplateTable::iastore() {
|
||||
// rbx: index
|
||||
// rdx: array
|
||||
index_check(rdx, rbx); // prefer index in rbx
|
||||
__ movl(Address(rdx, rbx,
|
||||
Address::times_4,
|
||||
arrayOopDesc::base_offset_in_bytes(T_INT)),
|
||||
rax);
|
||||
__ access_store_at(T_INT, IN_HEAP | IN_HEAP_ARRAY,
|
||||
Address(rdx, rbx, Address::times_4,
|
||||
arrayOopDesc::base_offset_in_bytes(T_INT)),
|
||||
rax, noreg, noreg);
|
||||
}
|
||||
|
||||
void TemplateTable::lastore() {
|
||||
@ -1065,8 +1077,10 @@ void TemplateTable::lastore() {
|
||||
// rdx: high(value)
|
||||
index_check(rcx, rbx); // prefer index in rbx,
|
||||
// rbx,: index
|
||||
__ movptr(Address(rcx, rbx, Address::times_8, arrayOopDesc::base_offset_in_bytes(T_LONG) + 0 * wordSize), rax);
|
||||
NOT_LP64(__ movl(Address(rcx, rbx, Address::times_8, arrayOopDesc::base_offset_in_bytes(T_LONG) + 1 * wordSize), rdx));
|
||||
__ access_store_at(T_LONG, IN_HEAP | IN_HEAP_ARRAY,
|
||||
Address(rcx, rbx, Address::times_8,
|
||||
arrayOopDesc::base_offset_in_bytes(T_LONG)),
|
||||
noreg /* ltos */, noreg, noreg);
|
||||
}
|
||||
|
||||
|
||||
@ -1077,7 +1091,10 @@ void TemplateTable::fastore() {
|
||||
// rbx: index
|
||||
// rdx: array
|
||||
index_check(rdx, rbx); // prefer index in rbx
|
||||
__ store_float(Address(rdx, rbx, Address::times_4, arrayOopDesc::base_offset_in_bytes(T_FLOAT)));
|
||||
__ access_store_at(T_FLOAT, IN_HEAP | IN_HEAP_ARRAY,
|
||||
Address(rdx, rbx, Address::times_4,
|
||||
arrayOopDesc::base_offset_in_bytes(T_FLOAT)),
|
||||
noreg /* ftos */, noreg, noreg);
|
||||
}
|
||||
|
||||
void TemplateTable::dastore() {
|
||||
@ -1087,7 +1104,10 @@ void TemplateTable::dastore() {
|
||||
// rbx: index
|
||||
// rdx: array
|
||||
index_check(rdx, rbx); // prefer index in rbx
|
||||
__ store_double(Address(rdx, rbx, Address::times_8, arrayOopDesc::base_offset_in_bytes(T_DOUBLE)));
|
||||
__ access_store_at(T_DOUBLE, IN_HEAP | IN_HEAP_ARRAY,
|
||||
Address(rdx, rbx, Address::times_8,
|
||||
arrayOopDesc::base_offset_in_bytes(T_DOUBLE)),
|
||||
noreg /* dtos */, noreg, noreg);
|
||||
}
|
||||
|
||||
void TemplateTable::aastore() {
|
||||
@ -1160,10 +1180,10 @@ void TemplateTable::bastore() {
|
||||
__ jccb(Assembler::zero, L_skip);
|
||||
__ andl(rax, 1); // if it is a T_BOOLEAN array, mask the stored value to 0/1
|
||||
__ bind(L_skip);
|
||||
__ movb(Address(rdx, rbx,
|
||||
Address::times_1,
|
||||
arrayOopDesc::base_offset_in_bytes(T_BYTE)),
|
||||
rax);
|
||||
__ access_store_at(T_BYTE, IN_HEAP | IN_HEAP_ARRAY,
|
||||
Address(rdx, rbx,Address::times_1,
|
||||
arrayOopDesc::base_offset_in_bytes(T_BYTE)),
|
||||
rax, noreg, noreg);
|
||||
}
|
||||
|
||||
void TemplateTable::castore() {
|
||||
@ -1173,10 +1193,10 @@ void TemplateTable::castore() {
|
||||
// rbx: index
|
||||
// rdx: array
|
||||
index_check(rdx, rbx); // prefer index in rbx
|
||||
__ movw(Address(rdx, rbx,
|
||||
Address::times_2,
|
||||
arrayOopDesc::base_offset_in_bytes(T_CHAR)),
|
||||
rax);
|
||||
__ access_store_at(T_CHAR, IN_HEAP | IN_HEAP_ARRAY,
|
||||
Address(rdx, rbx, Address::times_2,
|
||||
arrayOopDesc::base_offset_in_bytes(T_CHAR)),
|
||||
rax, noreg, noreg);
|
||||
}
|
||||
|
||||
|
||||
@ -2852,7 +2872,6 @@ void TemplateTable::getfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
if (!is_static) pop_and_check_object(obj);
|
||||
|
||||
const Address field(obj, off, Address::times_1, 0*wordSize);
|
||||
NOT_LP64(const Address hi(obj, off, Address::times_1, 1*wordSize));
|
||||
|
||||
Label Done, notByte, notBool, notInt, notShort, notChar, notLong, notFloat, notObj, notDouble;
|
||||
|
||||
@ -2864,7 +2883,7 @@ void TemplateTable::getfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
|
||||
__ jcc(Assembler::notZero, notByte);
|
||||
// btos
|
||||
__ load_signed_byte(rax, field);
|
||||
__ access_load_at(T_BYTE, IN_HEAP, rax, field, noreg, noreg);
|
||||
__ push(btos);
|
||||
// Rewrite bytecode to be faster
|
||||
if (!is_static && rc == may_rewrite) {
|
||||
@ -2877,7 +2896,7 @@ void TemplateTable::getfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
__ jcc(Assembler::notEqual, notBool);
|
||||
|
||||
// ztos (same code as btos)
|
||||
__ load_signed_byte(rax, field);
|
||||
__ access_load_at(T_BOOLEAN, IN_HEAP, rax, field, noreg, noreg);
|
||||
__ push(ztos);
|
||||
// Rewrite bytecode to be faster
|
||||
if (!is_static && rc == may_rewrite) {
|
||||
@ -2901,7 +2920,7 @@ void TemplateTable::getfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
__ cmpl(flags, itos);
|
||||
__ jcc(Assembler::notEqual, notInt);
|
||||
// itos
|
||||
__ movl(rax, field);
|
||||
__ access_load_at(T_INT, IN_HEAP, rax, field, noreg, noreg);
|
||||
__ push(itos);
|
||||
// Rewrite bytecode to be faster
|
||||
if (!is_static && rc == may_rewrite) {
|
||||
@ -2913,7 +2932,7 @@ void TemplateTable::getfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
__ cmpl(flags, ctos);
|
||||
__ jcc(Assembler::notEqual, notChar);
|
||||
// ctos
|
||||
__ load_unsigned_short(rax, field);
|
||||
__ access_load_at(T_CHAR, IN_HEAP, rax, field, noreg, noreg);
|
||||
__ push(ctos);
|
||||
// Rewrite bytecode to be faster
|
||||
if (!is_static && rc == may_rewrite) {
|
||||
@ -2925,7 +2944,7 @@ void TemplateTable::getfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
__ cmpl(flags, stos);
|
||||
__ jcc(Assembler::notEqual, notShort);
|
||||
// stos
|
||||
__ load_signed_short(rax, field);
|
||||
__ access_load_at(T_SHORT, IN_HEAP, rax, field, noreg, noreg);
|
||||
__ push(stos);
|
||||
// Rewrite bytecode to be faster
|
||||
if (!is_static && rc == may_rewrite) {
|
||||
@ -2937,19 +2956,9 @@ void TemplateTable::getfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
__ cmpl(flags, ltos);
|
||||
__ jcc(Assembler::notEqual, notLong);
|
||||
// ltos
|
||||
|
||||
#ifndef _LP64
|
||||
// Generate code as if volatile. There just aren't enough registers to
|
||||
// save that information and this code is faster than the test.
|
||||
__ fild_d(field); // Must load atomically
|
||||
__ subptr(rsp,2*wordSize); // Make space for store
|
||||
__ fistp_d(Address(rsp,0));
|
||||
__ pop(rax);
|
||||
__ pop(rdx);
|
||||
#else
|
||||
__ movq(rax, field);
|
||||
#endif
|
||||
|
||||
// Generate code as if volatile (x86_32). There just aren't enough registers to
|
||||
// save that information and this code is faster than the test.
|
||||
__ access_load_at(T_LONG, IN_HEAP | MO_RELAXED, noreg /* ltos */, field, noreg, noreg);
|
||||
__ push(ltos);
|
||||
// Rewrite bytecode to be faster
|
||||
LP64_ONLY(if (!is_static && rc == may_rewrite) patch_bytecode(Bytecodes::_fast_lgetfield, bc, rbx));
|
||||
@ -2960,7 +2969,7 @@ void TemplateTable::getfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
__ jcc(Assembler::notEqual, notFloat);
|
||||
// ftos
|
||||
|
||||
__ load_float(field);
|
||||
__ access_load_at(T_FLOAT, IN_HEAP, noreg /* ftos */, field, noreg, noreg);
|
||||
__ push(ftos);
|
||||
// Rewrite bytecode to be faster
|
||||
if (!is_static && rc == may_rewrite) {
|
||||
@ -2974,7 +2983,7 @@ void TemplateTable::getfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
__ jcc(Assembler::notEqual, notDouble);
|
||||
#endif
|
||||
// dtos
|
||||
__ load_double(field);
|
||||
__ access_load_at(T_DOUBLE, IN_HEAP, noreg /* dtos */, field, noreg, noreg);
|
||||
__ push(dtos);
|
||||
// Rewrite bytecode to be faster
|
||||
if (!is_static && rc == may_rewrite) {
|
||||
@ -3133,7 +3142,7 @@ void TemplateTable::putfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
{
|
||||
__ pop(btos);
|
||||
if (!is_static) pop_and_check_object(obj);
|
||||
__ movb(field, rax);
|
||||
__ access_store_at(T_BYTE, IN_HEAP, field, rax, noreg, noreg);
|
||||
if (!is_static && rc == may_rewrite) {
|
||||
patch_bytecode(Bytecodes::_fast_bputfield, bc, rbx, true, byte_no);
|
||||
}
|
||||
@ -3148,8 +3157,7 @@ void TemplateTable::putfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
{
|
||||
__ pop(ztos);
|
||||
if (!is_static) pop_and_check_object(obj);
|
||||
__ andl(rax, 0x1);
|
||||
__ movb(field, rax);
|
||||
__ access_store_at(T_BOOLEAN, IN_HEAP, field, rax, noreg, noreg);
|
||||
if (!is_static && rc == may_rewrite) {
|
||||
patch_bytecode(Bytecodes::_fast_zputfield, bc, rbx, true, byte_no);
|
||||
}
|
||||
@ -3180,7 +3188,7 @@ void TemplateTable::putfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
{
|
||||
__ pop(itos);
|
||||
if (!is_static) pop_and_check_object(obj);
|
||||
__ movl(field, rax);
|
||||
__ access_store_at(T_INT, IN_HEAP, field, rax, noreg, noreg);
|
||||
if (!is_static && rc == may_rewrite) {
|
||||
patch_bytecode(Bytecodes::_fast_iputfield, bc, rbx, true, byte_no);
|
||||
}
|
||||
@ -3195,7 +3203,7 @@ void TemplateTable::putfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
{
|
||||
__ pop(ctos);
|
||||
if (!is_static) pop_and_check_object(obj);
|
||||
__ movw(field, rax);
|
||||
__ access_store_at(T_CHAR, IN_HEAP, field, rax, noreg, noreg);
|
||||
if (!is_static && rc == may_rewrite) {
|
||||
patch_bytecode(Bytecodes::_fast_cputfield, bc, rbx, true, byte_no);
|
||||
}
|
||||
@ -3210,7 +3218,7 @@ void TemplateTable::putfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
{
|
||||
__ pop(stos);
|
||||
if (!is_static) pop_and_check_object(obj);
|
||||
__ movw(field, rax);
|
||||
__ access_store_at(T_SHORT, IN_HEAP, field, rax, noreg, noreg);
|
||||
if (!is_static && rc == may_rewrite) {
|
||||
patch_bytecode(Bytecodes::_fast_sputfield, bc, rbx, true, byte_no);
|
||||
}
|
||||
@ -3226,7 +3234,7 @@ void TemplateTable::putfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
{
|
||||
__ pop(ltos);
|
||||
if (!is_static) pop_and_check_object(obj);
|
||||
__ movq(field, rax);
|
||||
__ access_store_at(T_LONG, IN_HEAP, field, noreg /* ltos*/, noreg, noreg);
|
||||
if (!is_static && rc == may_rewrite) {
|
||||
patch_bytecode(Bytecodes::_fast_lputfield, bc, rbx, true, byte_no);
|
||||
}
|
||||
@ -3242,11 +3250,7 @@ void TemplateTable::putfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
if (!is_static) pop_and_check_object(obj);
|
||||
|
||||
// Replace with real volatile test
|
||||
__ push(rdx);
|
||||
__ push(rax); // Must update atomically with FIST
|
||||
__ fild_d(Address(rsp,0)); // So load into FPU register
|
||||
__ fistp_d(field); // and put into memory atomically
|
||||
__ addptr(rsp, 2*wordSize);
|
||||
__ access_store_at(T_LONG, IN_HEAP | MO_RELAXED, field, noreg /* ltos */, noreg, noreg);
|
||||
// volatile_barrier();
|
||||
volatile_barrier(Assembler::Membar_mask_bits(Assembler::StoreLoad |
|
||||
Assembler::StoreStore));
|
||||
@ -3257,8 +3261,7 @@ void TemplateTable::putfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
|
||||
__ pop(ltos); // overwrites rdx
|
||||
if (!is_static) pop_and_check_object(obj);
|
||||
__ movptr(hi, rdx);
|
||||
__ movptr(field, rax);
|
||||
__ access_store_at(T_LONG, IN_HEAP, field, noreg /* ltos */, noreg, noreg);
|
||||
// Don't rewrite to _fast_lputfield for potential volatile case.
|
||||
__ jmp(notVolatile);
|
||||
}
|
||||
@ -3272,7 +3275,7 @@ void TemplateTable::putfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
{
|
||||
__ pop(ftos);
|
||||
if (!is_static) pop_and_check_object(obj);
|
||||
__ store_float(field);
|
||||
__ access_store_at(T_FLOAT, IN_HEAP, field, noreg /* ftos */, noreg, noreg);
|
||||
if (!is_static && rc == may_rewrite) {
|
||||
patch_bytecode(Bytecodes::_fast_fputfield, bc, rbx, true, byte_no);
|
||||
}
|
||||
@ -3289,7 +3292,7 @@ void TemplateTable::putfield_or_static(int byte_no, bool is_static, RewriteContr
|
||||
{
|
||||
__ pop(dtos);
|
||||
if (!is_static) pop_and_check_object(obj);
|
||||
__ store_double(field);
|
||||
__ access_store_at(T_DOUBLE, IN_HEAP, field, noreg /* dtos */, noreg, noreg);
|
||||
if (!is_static && rc == may_rewrite) {
|
||||
patch_bytecode(Bytecodes::_fast_dputfield, bc, rbx, true, byte_no);
|
||||
}
|
||||
@ -3422,30 +3425,31 @@ void TemplateTable::fast_storefield(TosState state) {
|
||||
break;
|
||||
case Bytecodes::_fast_lputfield:
|
||||
#ifdef _LP64
|
||||
__ movq(field, rax);
|
||||
__ access_store_at(T_LONG, IN_HEAP, field, noreg /* ltos */, noreg, noreg);
|
||||
#else
|
||||
__ stop("should not be rewritten");
|
||||
#endif
|
||||
break;
|
||||
case Bytecodes::_fast_iputfield:
|
||||
__ movl(field, rax);
|
||||
__ access_store_at(T_INT, IN_HEAP, field, rax, noreg, noreg);
|
||||
break;
|
||||
case Bytecodes::_fast_zputfield:
|
||||
__ andl(rax, 0x1); // boolean is true if LSB is 1
|
||||
// fall through to bputfield
|
||||
__ access_store_at(T_BOOLEAN, IN_HEAP, field, rax, noreg, noreg);
|
||||
break;
|
||||
case Bytecodes::_fast_bputfield:
|
||||
__ movb(field, rax);
|
||||
__ access_store_at(T_BYTE, IN_HEAP, field, rax, noreg, noreg);
|
||||
break;
|
||||
case Bytecodes::_fast_sputfield:
|
||||
// fall through
|
||||
__ access_store_at(T_SHORT, IN_HEAP, field, rax, noreg, noreg);
|
||||
break;
|
||||
case Bytecodes::_fast_cputfield:
|
||||
__ movw(field, rax);
|
||||
__ access_store_at(T_CHAR, IN_HEAP, field, rax, noreg, noreg);
|
||||
break;
|
||||
case Bytecodes::_fast_fputfield:
|
||||
__ store_float(field);
|
||||
__ access_store_at(T_FLOAT, IN_HEAP, field, noreg /* ftos*/, noreg, noreg);
|
||||
break;
|
||||
case Bytecodes::_fast_dputfield:
|
||||
__ store_double(field);
|
||||
__ access_store_at(T_DOUBLE, IN_HEAP, field, noreg /* dtos*/, noreg, noreg);
|
||||
break;
|
||||
default:
|
||||
ShouldNotReachHere();
|
||||
@ -3512,28 +3516,28 @@ void TemplateTable::fast_accessfield(TosState state) {
|
||||
break;
|
||||
case Bytecodes::_fast_lgetfield:
|
||||
#ifdef _LP64
|
||||
__ movq(rax, field);
|
||||
__ access_load_at(T_LONG, IN_HEAP, noreg /* ltos */, field, noreg, noreg);
|
||||
#else
|
||||
__ stop("should not be rewritten");
|
||||
#endif
|
||||
break;
|
||||
case Bytecodes::_fast_igetfield:
|
||||
__ movl(rax, field);
|
||||
__ access_load_at(T_INT, IN_HEAP, rax, field, noreg, noreg);
|
||||
break;
|
||||
case Bytecodes::_fast_bgetfield:
|
||||
__ movsbl(rax, field);
|
||||
__ access_load_at(T_BYTE, IN_HEAP, rax, field, noreg, noreg);
|
||||
break;
|
||||
case Bytecodes::_fast_sgetfield:
|
||||
__ load_signed_short(rax, field);
|
||||
__ access_load_at(T_SHORT, IN_HEAP, rax, field, noreg, noreg);
|
||||
break;
|
||||
case Bytecodes::_fast_cgetfield:
|
||||
__ load_unsigned_short(rax, field);
|
||||
__ access_load_at(T_CHAR, IN_HEAP, rax, field, noreg, noreg);
|
||||
break;
|
||||
case Bytecodes::_fast_fgetfield:
|
||||
__ load_float(field);
|
||||
__ access_load_at(T_FLOAT, IN_HEAP, noreg /* ftos */, field, noreg, noreg);
|
||||
break;
|
||||
case Bytecodes::_fast_dgetfield:
|
||||
__ load_double(field);
|
||||
__ access_load_at(T_DOUBLE, IN_HEAP, noreg /* dtos */, field, noreg, noreg);
|
||||
break;
|
||||
default:
|
||||
ShouldNotReachHere();
|
||||
@ -3566,14 +3570,14 @@ void TemplateTable::fast_xaccess(TosState state) {
|
||||
const Address field = Address(rax, rbx, Address::times_1, 0*wordSize);
|
||||
switch (state) {
|
||||
case itos:
|
||||
__ movl(rax, field);
|
||||
__ access_load_at(T_INT, IN_HEAP, rax, field, noreg, noreg);
|
||||
break;
|
||||
case atos:
|
||||
do_oop_load(_masm, field, rax);
|
||||
__ verify_oop(rax);
|
||||
break;
|
||||
case ftos:
|
||||
__ load_float(field);
|
||||
__ access_load_at(T_FLOAT, IN_HEAP, noreg /* ftos */, field, noreg, noreg);
|
||||
break;
|
||||
default:
|
||||
ShouldNotReachHere();
|
||||
|
||||
@ -43,7 +43,7 @@
|
||||
#include "runtime/frame.inline.hpp"
|
||||
#include "runtime/interfaceSupport.inline.hpp"
|
||||
#include "runtime/jniHandles.inline.hpp"
|
||||
#include "runtime/orderAccess.inline.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/sharedRuntime.hpp"
|
||||
#include "runtime/stubRoutines.hpp"
|
||||
#include "runtime/synchronizer.hpp"
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright 2007 Red Hat, Inc.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
@ -26,7 +26,8 @@
|
||||
#ifndef CPU_ZERO_VM_INTERP_MASM_ZERO_HPP
|
||||
#define CPU_ZERO_VM_INTERP_MASM_ZERO_HPP
|
||||
|
||||
#include "assembler_zero.inline.hpp"
|
||||
#include "asm/codeBuffer.hpp"
|
||||
#include "asm/macroAssembler.hpp"
|
||||
#include "interpreter/invocationCounter.hpp"
|
||||
|
||||
// This file specializes the assember with interpreter-specific macros
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright 2007, 2009, 2010, 2011 Red Hat, Inc.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
@ -24,8 +24,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/assembler.inline.hpp"
|
||||
#include "assembler_zero.inline.hpp"
|
||||
#include "asm/codeBuffer.hpp"
|
||||
#include "code/relocInfo.hpp"
|
||||
#include "nativeInst_zero.hpp"
|
||||
#include "oops/oop.inline.hpp"
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright 2007 Red Hat, Inc.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
@ -24,18 +24,8 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/assembler.hpp"
|
||||
#include "assembler_zero.inline.hpp"
|
||||
#include "code/vtableStubs.hpp"
|
||||
#include "interp_masm_zero.hpp"
|
||||
#include "memory/resourceArea.hpp"
|
||||
#include "oops/instanceKlass.hpp"
|
||||
#include "oops/klassVtable.hpp"
|
||||
#include "runtime/sharedRuntime.hpp"
|
||||
#include "vmreg_zero.inline.hpp"
|
||||
#ifdef COMPILER2
|
||||
#include "opto/runtime.hpp"
|
||||
#endif
|
||||
#include "utilities/debug.hpp"
|
||||
|
||||
VtableStub* VtableStubs::create_vtable_stub(int vtable_index) {
|
||||
ShouldNotCallThis();
|
||||
|
||||
@ -59,7 +59,7 @@
|
||||
#include "runtime/javaCalls.hpp"
|
||||
#include "runtime/mutexLocker.hpp"
|
||||
#include "runtime/objectMonitor.hpp"
|
||||
#include "runtime/orderAccess.inline.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "runtime/osThread.hpp"
|
||||
#include "runtime/perfMemory.hpp"
|
||||
|
||||
@ -49,7 +49,7 @@
|
||||
#include "runtime/javaCalls.hpp"
|
||||
#include "runtime/mutexLocker.hpp"
|
||||
#include "runtime/objectMonitor.hpp"
|
||||
#include "runtime/orderAccess.inline.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/osThread.hpp"
|
||||
#include "runtime/perfMemory.hpp"
|
||||
#include "runtime/semaphore.hpp"
|
||||
|
||||
@ -51,7 +51,7 @@
|
||||
#include "runtime/javaCalls.hpp"
|
||||
#include "runtime/mutexLocker.hpp"
|
||||
#include "runtime/objectMonitor.hpp"
|
||||
#include "runtime/orderAccess.inline.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/osThread.hpp"
|
||||
#include "runtime/perfMemory.hpp"
|
||||
#include "runtime/sharedRuntime.hpp"
|
||||
|
||||
@ -49,7 +49,7 @@
|
||||
#include "runtime/javaCalls.hpp"
|
||||
#include "runtime/mutexLocker.hpp"
|
||||
#include "runtime/objectMonitor.hpp"
|
||||
#include "runtime/orderAccess.inline.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/osThread.hpp"
|
||||
#include "runtime/perfMemory.hpp"
|
||||
#include "runtime/sharedRuntime.hpp"
|
||||
|
||||
@ -52,7 +52,7 @@
|
||||
#include "runtime/javaCalls.hpp"
|
||||
#include "runtime/mutexLocker.hpp"
|
||||
#include "runtime/objectMonitor.hpp"
|
||||
#include "runtime/orderAccess.inline.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/osThread.hpp"
|
||||
#include "runtime/perfMemory.hpp"
|
||||
#include "runtime/sharedRuntime.hpp"
|
||||
|
||||
@ -23,10 +23,10 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef OS_CPU_AIX_OJDKPPC_VM_ORDERACCESS_AIX_PPC_INLINE_HPP
|
||||
#define OS_CPU_AIX_OJDKPPC_VM_ORDERACCESS_AIX_PPC_INLINE_HPP
|
||||
#ifndef OS_CPU_AIX_OJDKPPC_VM_ORDERACCESS_AIX_PPC_HPP
|
||||
#define OS_CPU_AIX_OJDKPPC_VM_ORDERACCESS_AIX_PPC_HPP
|
||||
|
||||
#include "runtime/orderAccess.hpp"
|
||||
// Included in orderAccess.hpp header file.
|
||||
|
||||
// Compiler version last used for testing: xlc 12
|
||||
// Please update this information when this file changes
|
||||
@ -90,4 +90,4 @@ struct OrderAccess::PlatformOrderedLoad<byte_size, X_ACQUIRE>
|
||||
#undef inlasm_eieio
|
||||
#undef inlasm_isync
|
||||
|
||||
#endif // OS_CPU_AIX_OJDKPPC_VM_ORDERACCESS_AIX_PPC_INLINE_HPP
|
||||
#endif // OS_CPU_AIX_OJDKPPC_VM_ORDERACCESS_AIX_PPC_HPP
|
||||
@ -22,12 +22,10 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef OS_CPU_BSD_X86_VM_ORDERACCESS_BSD_X86_INLINE_HPP
|
||||
#define OS_CPU_BSD_X86_VM_ORDERACCESS_BSD_X86_INLINE_HPP
|
||||
#ifndef OS_CPU_BSD_X86_VM_ORDERACCESS_BSD_X86_HPP
|
||||
#define OS_CPU_BSD_X86_VM_ORDERACCESS_BSD_X86_HPP
|
||||
|
||||
#include "runtime/atomic.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
// Included in orderAccess.hpp header file.
|
||||
|
||||
// Compiler version last used for testing: clang 5.1
|
||||
// Please update this information when this file changes
|
||||
@ -52,14 +50,12 @@ inline void OrderAccess::acquire() { compiler_barrier(); }
|
||||
inline void OrderAccess::release() { compiler_barrier(); }
|
||||
|
||||
inline void OrderAccess::fence() {
|
||||
if (os::is_MP()) {
|
||||
// always use locked addl since mfence is sometimes expensive
|
||||
// always use locked addl since mfence is sometimes expensive
|
||||
#ifdef AMD64
|
||||
__asm__ volatile ("lock; addl $0,0(%%rsp)" : : : "cc", "memory");
|
||||
__asm__ volatile ("lock; addl $0,0(%%rsp)" : : : "cc", "memory");
|
||||
#else
|
||||
__asm__ volatile ("lock; addl $0,0(%%esp)" : : : "cc", "memory");
|
||||
__asm__ volatile ("lock; addl $0,0(%%esp)" : : : "cc", "memory");
|
||||
#endif
|
||||
}
|
||||
compiler_barrier();
|
||||
}
|
||||
|
||||
@ -113,4 +109,4 @@ struct OrderAccess::PlatformOrderedStore<8, RELEASE_X_FENCE>
|
||||
};
|
||||
#endif // AMD64
|
||||
|
||||
#endif // OS_CPU_BSD_X86_VM_ORDERACCESS_BSD_X86_INLINE_HPP
|
||||
#endif // OS_CPU_BSD_X86_VM_ORDERACCESS_BSD_X86_HPP
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright 2007, 2008, 2009 Red Hat, Inc.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
@ -23,10 +23,10 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef OS_CPU_BSD_ZERO_VM_ORDERACCESS_BSD_ZERO_INLINE_HPP
|
||||
#define OS_CPU_BSD_ZERO_VM_ORDERACCESS_BSD_ZERO_INLINE_HPP
|
||||
#ifndef OS_CPU_BSD_ZERO_VM_ORDERACCESS_BSD_ZERO_HPP
|
||||
#define OS_CPU_BSD_ZERO_VM_ORDERACCESS_BSD_ZERO_HPP
|
||||
|
||||
#include "runtime/orderAccess.hpp"
|
||||
// Included in orderAccess.hpp header file.
|
||||
|
||||
#ifdef ARM
|
||||
|
||||
@ -74,4 +74,4 @@ inline void OrderAccess::acquire() { LIGHT_MEM_BARRIER; }
|
||||
inline void OrderAccess::release() { LIGHT_MEM_BARRIER; }
|
||||
inline void OrderAccess::fence() { FULL_MEM_BARRIER; }
|
||||
|
||||
#endif // OS_CPU_BSD_ZERO_VM_ORDERACCESS_BSD_ZERO_INLINE_HPP
|
||||
#endif // OS_CPU_BSD_ZERO_VM_ORDERACCESS_BSD_ZERO_HPP
|
||||
@ -23,12 +23,11 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef OS_CPU_LINUX_AARCH64_VM_ORDERACCESS_LINUX_AARCH64_INLINE_HPP
|
||||
#define OS_CPU_LINUX_AARCH64_VM_ORDERACCESS_LINUX_AARCH64_INLINE_HPP
|
||||
#ifndef OS_CPU_LINUX_AARCH64_VM_ORDERACCESS_LINUX_AARCH64_HPP
|
||||
#define OS_CPU_LINUX_AARCH64_VM_ORDERACCESS_LINUX_AARCH64_HPP
|
||||
|
||||
// Included in orderAccess.hpp header file.
|
||||
|
||||
#include "runtime/atomic.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "vm_version_aarch64.hpp"
|
||||
|
||||
// Implementation of class OrderAccess.
|
||||
@ -71,4 +70,4 @@ struct OrderAccess::PlatformOrderedStore<byte_size, RELEASE_X_FENCE>
|
||||
void operator()(T v, volatile T* p) const { release_store(p, v); fence(); }
|
||||
};
|
||||
|
||||
#endif // OS_CPU_LINUX_AARCH64_VM_ORDERACCESS_LINUX_AARCH64_INLINE_HPP
|
||||
#endif // OS_CPU_LINUX_AARCH64_VM_ORDERACCESS_LINUX_AARCH64_HPP
|
||||
@ -22,16 +22,17 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef OS_CPU_LINUX_ARM_VM_ORDERACCESS_LINUX_ARM_INLINE_HPP
|
||||
#define OS_CPU_LINUX_ARM_VM_ORDERACCESS_LINUX_ARM_INLINE_HPP
|
||||
#ifndef OS_CPU_LINUX_ARM_VM_ORDERACCESS_LINUX_ARM_HPP
|
||||
#define OS_CPU_LINUX_ARM_VM_ORDERACCESS_LINUX_ARM_HPP
|
||||
|
||||
// Included in orderAccess.hpp header file.
|
||||
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "vm_version_arm.hpp"
|
||||
|
||||
// Implementation of class OrderAccess.
|
||||
// - we define the high level barriers below and use the general
|
||||
// implementation in orderAccess.inline.hpp, with customizations
|
||||
// implementation in orderAccess.hpp, with customizations
|
||||
// on AARCH64 via the specialized_* template functions
|
||||
|
||||
// Memory Ordering on ARM is weak.
|
||||
@ -53,7 +54,7 @@
|
||||
// __asm__ volatile (
|
||||
// "mcr p15, 0, %0, c7, c10, 4"
|
||||
// : : "r" (dummy) : "memory");
|
||||
// }
|
||||
// }
|
||||
// }
|
||||
|
||||
inline static void dmb_sy() {
|
||||
@ -244,4 +245,4 @@ struct OrderAccess::PlatformOrderedStore<8, RELEASE_X_FENCE>
|
||||
|
||||
#endif // AARCH64
|
||||
|
||||
#endif // OS_CPU_LINUX_ARM_VM_ORDERACCESS_LINUX_ARM_INLINE_HPP
|
||||
#endif // OS_CPU_LINUX_ARM_VM_ORDERACCESS_LINUX_ARM_HPP
|
||||
@ -23,10 +23,10 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef OS_CPU_LINUX_PPC_VM_ORDERACCESS_LINUX_PPC_INLINE_HPP
|
||||
#define OS_CPU_LINUX_PPC_VM_ORDERACCESS_LINUX_PPC_INLINE_HPP
|
||||
#ifndef OS_CPU_LINUX_PPC_VM_ORDERACCESS_LINUX_PPC_HPP
|
||||
#define OS_CPU_LINUX_PPC_VM_ORDERACCESS_LINUX_PPC_HPP
|
||||
|
||||
#include "runtime/orderAccess.hpp"
|
||||
// Included in orderAccess.hpp header file.
|
||||
|
||||
#ifndef PPC64
|
||||
#error "OrderAccess currently only implemented for PPC64"
|
||||
@ -94,4 +94,4 @@ struct OrderAccess::PlatformOrderedLoad<byte_size, X_ACQUIRE>
|
||||
#undef inlasm_isync
|
||||
#undef inlasm_acquire_reg
|
||||
|
||||
#endif // OS_CPU_LINUX_PPC_VM_ORDERACCESS_LINUX_PPC_INLINE_HPP
|
||||
#endif // OS_CPU_LINUX_PPC_VM_ORDERACCESS_LINUX_PPC_HPP
|
||||
@ -23,10 +23,11 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef OS_CPU_LINUX_S390_VM_ORDERACCESS_LINUX_S390_INLINE_HPP
|
||||
#define OS_CPU_LINUX_S390_VM_ORDERACCESS_LINUX_S390_INLINE_HPP
|
||||
#ifndef OS_CPU_LINUX_S390_VM_ORDERACCESS_LINUX_S390_HPP
|
||||
#define OS_CPU_LINUX_S390_VM_ORDERACCESS_LINUX_S390_HPP
|
||||
|
||||
// Included in orderAccess.hpp header file.
|
||||
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "vm_version_s390.hpp"
|
||||
|
||||
// Implementation of class OrderAccess.
|
||||
@ -87,4 +88,4 @@ struct OrderAccess::PlatformOrderedLoad<byte_size, X_ACQUIRE>
|
||||
#undef inlasm_zarch_acquire
|
||||
#undef inlasm_zarch_fence
|
||||
|
||||
#endif // OS_CPU_LINUX_S390_VM_ORDERACCESS_LINUX_S390_INLINE_HPP
|
||||
#endif // OS_CPU_LINUX_S390_VM_ORDERACCESS_LINUX_S390_HPP
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -22,10 +22,10 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef OS_CPU_LINUX_SPARC_VM_ORDERACCESS_LINUX_SPARC_INLINE_HPP
|
||||
#define OS_CPU_LINUX_SPARC_VM_ORDERACCESS_LINUX_SPARC_INLINE_HPP
|
||||
#ifndef OS_CPU_LINUX_SPARC_VM_ORDERACCESS_LINUX_SPARC_HPP
|
||||
#define OS_CPU_LINUX_SPARC_VM_ORDERACCESS_LINUX_SPARC_HPP
|
||||
|
||||
#include "runtime/orderAccess.hpp"
|
||||
// Included in orderAccess.hpp header file.
|
||||
|
||||
// Implementation of class OrderAccess.
|
||||
|
||||
@ -48,4 +48,4 @@ inline void OrderAccess::fence() {
|
||||
__asm__ volatile ("membar #StoreLoad" : : : "memory");
|
||||
}
|
||||
|
||||
#endif // OS_CPU_LINUX_SPARC_VM_ORDERACCESS_LINUX_SPARC_INLINE_HPP
|
||||
#endif // OS_CPU_LINUX_SPARC_VM_ORDERACCESS_LINUX_SPARC_HPP
|
||||
@ -22,12 +22,10 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef OS_CPU_LINUX_X86_VM_ORDERACCESS_LINUX_X86_INLINE_HPP
|
||||
#define OS_CPU_LINUX_X86_VM_ORDERACCESS_LINUX_X86_INLINE_HPP
|
||||
#ifndef OS_CPU_LINUX_X86_VM_ORDERACCESS_LINUX_X86_HPP
|
||||
#define OS_CPU_LINUX_X86_VM_ORDERACCESS_LINUX_X86_HPP
|
||||
|
||||
#include "runtime/atomic.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
// Included in orderAccess.hpp header file.
|
||||
|
||||
// Compiler version last used for testing: gcc 4.8.2
|
||||
// Please update this information when this file changes
|
||||
@ -48,14 +46,12 @@ inline void OrderAccess::acquire() { compiler_barrier(); }
|
||||
inline void OrderAccess::release() { compiler_barrier(); }
|
||||
|
||||
inline void OrderAccess::fence() {
|
||||
if (os::is_MP()) {
|
||||
// always use locked addl since mfence is sometimes expensive
|
||||
// always use locked addl since mfence is sometimes expensive
|
||||
#ifdef AMD64
|
||||
__asm__ volatile ("lock; addl $0,0(%%rsp)" : : : "cc", "memory");
|
||||
__asm__ volatile ("lock; addl $0,0(%%rsp)" : : : "cc", "memory");
|
||||
#else
|
||||
__asm__ volatile ("lock; addl $0,0(%%esp)" : : : "cc", "memory");
|
||||
__asm__ volatile ("lock; addl $0,0(%%esp)" : : : "cc", "memory");
|
||||
#endif
|
||||
}
|
||||
compiler_barrier();
|
||||
}
|
||||
|
||||
@ -109,4 +105,4 @@ struct OrderAccess::PlatformOrderedStore<8, RELEASE_X_FENCE>
|
||||
};
|
||||
#endif // AMD64
|
||||
|
||||
#endif // OS_CPU_LINUX_X86_VM_ORDERACCESS_LINUX_X86_INLINE_HPP
|
||||
#endif // OS_CPU_LINUX_X86_VM_ORDERACCESS_LINUX_X86_HPP
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright 2007, 2008, 2009 Red Hat, Inc.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
@ -23,10 +23,10 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef OS_CPU_LINUX_ZERO_VM_ORDERACCESS_LINUX_ZERO_INLINE_HPP
|
||||
#define OS_CPU_LINUX_ZERO_VM_ORDERACCESS_LINUX_ZERO_INLINE_HPP
|
||||
#ifndef OS_CPU_LINUX_ZERO_VM_ORDERACCESS_LINUX_ZERO_HPP
|
||||
#define OS_CPU_LINUX_ZERO_VM_ORDERACCESS_LINUX_ZERO_HPP
|
||||
|
||||
#include "runtime/orderAccess.hpp"
|
||||
// Included in orderAccess.hpp header file.
|
||||
|
||||
#ifdef ARM
|
||||
|
||||
@ -83,4 +83,4 @@ inline void OrderAccess::release() { LIGHT_MEM_BARRIER; }
|
||||
|
||||
inline void OrderAccess::fence() { FULL_MEM_BARRIER; }
|
||||
|
||||
#endif // OS_CPU_LINUX_ZERO_VM_ORDERACCESS_LINUX_ZERO_INLINE_HPP
|
||||
#endif // OS_CPU_LINUX_ZERO_VM_ORDERACCESS_LINUX_ZERO_HPP
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -22,11 +22,10 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef OS_CPU_SOLARIS_SPARC_VM_ORDERACCESS_SOLARIS_SPARC_INLINE_HPP
|
||||
#define OS_CPU_SOLARIS_SPARC_VM_ORDERACCESS_SOLARIS_SPARC_INLINE_HPP
|
||||
#ifndef OS_CPU_SOLARIS_SPARC_VM_ORDERACCESS_SOLARIS_SPARC_HPP
|
||||
#define OS_CPU_SOLARIS_SPARC_VM_ORDERACCESS_SOLARIS_SPARC_HPP
|
||||
|
||||
#include "runtime/atomic.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
// Included in orderAccess.hpp header file.
|
||||
|
||||
// Compiler version last used for testing: solaris studio 12u3
|
||||
// Please update this information when this file changes
|
||||
@ -52,4 +51,4 @@ inline void OrderAccess::fence() {
|
||||
__asm__ volatile ("membar #StoreLoad" : : : "memory");
|
||||
}
|
||||
|
||||
#endif // OS_CPU_SOLARIS_SPARC_VM_ORDERACCESS_SOLARIS_SPARC_INLINE_HPP
|
||||
#endif // OS_CPU_SOLARIS_SPARC_VM_ORDERACCESS_SOLARIS_SPARC_HPP
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2018, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -22,12 +22,10 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef OS_CPU_SOLARIS_X86_VM_ORDERACCESS_SOLARIS_X86_INLINE_HPP
|
||||
#define OS_CPU_SOLARIS_X86_VM_ORDERACCESS_SOLARIS_X86_INLINE_HPP
|
||||
#ifndef OS_CPU_SOLARIS_X86_VM_ORDERACCESS_SOLARIS_X86_HPP
|
||||
#define OS_CPU_SOLARIS_X86_VM_ORDERACCESS_SOLARIS_X86_HPP
|
||||
|
||||
#include "runtime/atomic.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
// Included in orderAccess.hpp header file.
|
||||
|
||||
// Compiler version last used for testing: solaris studio 12u3
|
||||
// Please update this information when this file changes
|
||||
@ -48,14 +46,12 @@ inline void OrderAccess::acquire() { compiler_barrier(); }
|
||||
inline void OrderAccess::release() { compiler_barrier(); }
|
||||
|
||||
inline void OrderAccess::fence() {
|
||||
if (os::is_MP()) {
|
||||
#ifdef AMD64
|
||||
__asm__ volatile ("lock; addl $0,0(%%rsp)" : : : "cc", "memory");
|
||||
__asm__ volatile ("lock; addl $0,0(%%rsp)" : : : "cc", "memory");
|
||||
#else
|
||||
__asm__ volatile ("lock; addl $0,0(%%esp)" : : : "cc", "memory");
|
||||
__asm__ volatile ("lock; addl $0,0(%%esp)" : : : "cc", "memory");
|
||||
#endif
|
||||
}
|
||||
compiler_barrier();
|
||||
}
|
||||
|
||||
#endif // OS_CPU_SOLARIS_X86_VM_ORDERACCESS_SOLARIS_X86_INLINE_HPP
|
||||
#endif // OS_CPU_SOLARIS_X86_VM_ORDERACCESS_SOLARIS_X86_HPP
|
||||
@ -22,13 +22,12 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef OS_CPU_WINDOWS_X86_VM_ORDERACCESS_WINDOWS_X86_INLINE_HPP
|
||||
#define OS_CPU_WINDOWS_X86_VM_ORDERACCESS_WINDOWS_X86_INLINE_HPP
|
||||
#ifndef OS_CPU_WINDOWS_X86_VM_ORDERACCESS_WINDOWS_X86_HPP
|
||||
#define OS_CPU_WINDOWS_X86_VM_ORDERACCESS_WINDOWS_X86_HPP
|
||||
|
||||
// Included in orderAccess.hpp header file.
|
||||
|
||||
#include <intrin.h>
|
||||
#include "runtime/atomic.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
|
||||
// Compiler version last used for testing: Microsoft Visual Studio 2010
|
||||
// Please update this information when this file changes
|
||||
@ -63,10 +62,8 @@ inline void OrderAccess::fence() {
|
||||
#ifdef AMD64
|
||||
StubRoutines_fence();
|
||||
#else
|
||||
if (os::is_MP()) {
|
||||
__asm {
|
||||
lock add dword ptr [esp], 0;
|
||||
}
|
||||
__asm {
|
||||
lock add dword ptr [esp], 0;
|
||||
}
|
||||
#endif // AMD64
|
||||
compiler_barrier();
|
||||
@ -113,4 +110,4 @@ struct OrderAccess::PlatformOrderedStore<4, RELEASE_X_FENCE>
|
||||
};
|
||||
#endif // AMD64
|
||||
|
||||
#endif // OS_CPU_WINDOWS_X86_VM_ORDERACCESS_WINDOWS_X86_INLINE_HPP
|
||||
#endif // OS_CPU_WINDOWS_X86_VM_ORDERACCESS_WINDOWS_X86_HPP
|
||||
@ -75,7 +75,7 @@ address* AOTCompiledMethod::orig_pc_addr(const frame* fr) {
|
||||
return (address*) ((address)fr->unextended_sp() + _meta->orig_pc_offset());
|
||||
}
|
||||
|
||||
bool AOTCompiledMethod::do_unloading_oops(address low_boundary, BoolObjectClosure* is_alive, bool unloading_occurred) {
|
||||
bool AOTCompiledMethod::do_unloading_oops(address low_boundary, BoolObjectClosure* is_alive) {
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -245,7 +245,7 @@ bool AOTCompiledMethod::make_entrant() {
|
||||
// more conservative than for nmethods.
|
||||
void AOTCompiledMethod::flush_evol_dependents_on(InstanceKlass* dependee) {
|
||||
if (is_java_method()) {
|
||||
cleanup_inline_caches();
|
||||
clear_inline_caches();
|
||||
mark_for_deoptimization();
|
||||
make_not_entrant();
|
||||
}
|
||||
|
||||
@ -284,8 +284,8 @@ private:
|
||||
bool is_aot_runtime_stub() const { return _method == NULL; }
|
||||
|
||||
protected:
|
||||
virtual bool do_unloading_oops(address low_boundary, BoolObjectClosure* is_alive, bool unloading_occurred);
|
||||
virtual bool do_unloading_jvmci(bool unloading_occurred) { return false; }
|
||||
virtual bool do_unloading_oops(address low_boundary, BoolObjectClosure* is_alive);
|
||||
virtual bool do_unloading_jvmci() { return false; }
|
||||
|
||||
};
|
||||
|
||||
|
||||
@ -23,6 +23,7 @@
|
||||
*/
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "asm/assembler.inline.hpp"
|
||||
#include "c1/c1_Compilation.hpp"
|
||||
#include "c1/c1_Instruction.hpp"
|
||||
#include "c1/c1_InstructionPrinter.hpp"
|
||||
|
||||
@ -26,7 +26,6 @@
|
||||
#define SHARE_VM_C1_C1_MACROASSEMBLER_HPP
|
||||
|
||||
#include "asm/macroAssembler.hpp"
|
||||
#include "asm/macroAssembler.inline.hpp"
|
||||
#include "utilities/macros.hpp"
|
||||
|
||||
class CodeEmitInfo;
|
||||
|
||||
@ -26,7 +26,7 @@
|
||||
#define SHARE_VM_CLASSFILE_CLASSLOADER_INLINE_HPP
|
||||
|
||||
#include "classfile/classLoader.hpp"
|
||||
#include "runtime/orderAccess.inline.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
|
||||
// Next entry in class path
|
||||
inline ClassPathEntry* ClassPathEntry::next() const { return OrderAccess::load_acquire(&_next); }
|
||||
|
||||
@ -35,7 +35,7 @@
|
||||
#include "memory/resourceArea.hpp"
|
||||
#include "oops/oop.inline.hpp"
|
||||
#include "runtime/atomic.hpp"
|
||||
#include "runtime/orderAccess.inline.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/safepointVerifiers.hpp"
|
||||
#include "utilities/hashtable.inline.hpp"
|
||||
|
||||
|
||||
@ -26,7 +26,7 @@
|
||||
#define SHARE_VM_CLASSFILE_DICTIONARY_INLINE_HPP
|
||||
|
||||
#include "classfile/dictionary.hpp"
|
||||
#include "runtime/orderAccess.inline.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
|
||||
inline ProtectionDomainEntry* DictionaryEntry::pd_set_acquire() const {
|
||||
return OrderAccess::load_acquire(&_pd_set);
|
||||
|
||||
@ -310,7 +310,8 @@ Handle java_lang_String::create_from_str(const char* utf8_str, TRAPS) {
|
||||
Handle h_obj = basic_create(length, is_latin1, CHECK_NH);
|
||||
if (length > 0) {
|
||||
if (!has_multibyte) {
|
||||
strncpy((char*)value(h_obj())->byte_at_addr(0), utf8_str, length);
|
||||
const jbyte* src = reinterpret_cast<const jbyte*>(utf8_str);
|
||||
ArrayAccess<>::arraycopy_from_native(src, value(h_obj()), typeArrayOopDesc::element_offset<jbyte>(0), length);
|
||||
} else if (is_latin1) {
|
||||
UTF8::convert_to_unicode(utf8_str, value(h_obj())->byte_at_addr(0), length);
|
||||
} else {
|
||||
@ -356,7 +357,8 @@ Handle java_lang_String::create_from_symbol(Symbol* symbol, TRAPS) {
|
||||
Handle h_obj = basic_create(length, is_latin1, CHECK_NH);
|
||||
if (length > 0) {
|
||||
if (!has_multibyte) {
|
||||
strncpy((char*)value(h_obj())->byte_at_addr(0), utf8_str, length);
|
||||
const jbyte* src = reinterpret_cast<const jbyte*>(utf8_str);
|
||||
ArrayAccess<>::arraycopy_from_native(src, value(h_obj()), typeArrayOopDesc::element_offset<jbyte>(0), length);
|
||||
} else if (is_latin1) {
|
||||
UTF8::convert_to_unicode(utf8_str, value(h_obj())->byte_at_addr(0), length);
|
||||
} else {
|
||||
@ -4255,7 +4257,7 @@ int java_lang_AssertionStatusDirectives::packages_offset;
|
||||
int java_lang_AssertionStatusDirectives::packageEnabled_offset;
|
||||
int java_lang_AssertionStatusDirectives::deflt_offset;
|
||||
int java_nio_Buffer::_limit_offset;
|
||||
int java_util_concurrent_locks_AbstractOwnableSynchronizer::_owner_offset = 0;
|
||||
int java_util_concurrent_locks_AbstractOwnableSynchronizer::_owner_offset;
|
||||
int reflect_ConstantPool::_oop_offset;
|
||||
int reflect_UnsafeStaticFieldAccessorImpl::_base_offset;
|
||||
|
||||
@ -4397,13 +4399,12 @@ void java_nio_Buffer::serialize(SerializeClosure* f) {
|
||||
}
|
||||
#endif
|
||||
|
||||
void java_util_concurrent_locks_AbstractOwnableSynchronizer::initialize(TRAPS) {
|
||||
if (_owner_offset != 0) return;
|
||||
#define AOS_FIELDS_DO(macro) \
|
||||
macro(_owner_offset, k, "exclusiveOwnerThread", thread_signature, false)
|
||||
|
||||
SystemDictionary::load_abstract_ownable_synchronizer_klass(CHECK);
|
||||
InstanceKlass* k = SystemDictionary::abstract_ownable_synchronizer_klass();
|
||||
compute_offset(_owner_offset, k,
|
||||
"exclusiveOwnerThread", vmSymbols::thread_signature());
|
||||
void java_util_concurrent_locks_AbstractOwnableSynchronizer::compute_offsets() {
|
||||
InstanceKlass* k = SystemDictionary::java_util_concurrent_locks_AbstractOwnableSynchronizer_klass();
|
||||
AOS_FIELDS_DO(FIELD_COMPUTE_OFFSET);
|
||||
}
|
||||
|
||||
oop java_util_concurrent_locks_AbstractOwnableSynchronizer::get_owner_threadObj(oop obj) {
|
||||
@ -4471,6 +4472,7 @@ void JavaClasses::compute_offsets() {
|
||||
java_lang_StackTraceElement::compute_offsets();
|
||||
java_lang_StackFrameInfo::compute_offsets();
|
||||
java_lang_LiveStackFrameInfo::compute_offsets();
|
||||
java_util_concurrent_locks_AbstractOwnableSynchronizer::compute_offsets();
|
||||
|
||||
// generated interpreter code wants to know about the offsets we just computed:
|
||||
AbstractAssembler::update_delayed_values();
|
||||
|
||||
@ -1483,7 +1483,7 @@ class java_util_concurrent_locks_AbstractOwnableSynchronizer : AllStatic {
|
||||
private:
|
||||
static int _owner_offset;
|
||||
public:
|
||||
static void initialize(TRAPS);
|
||||
static void compute_offsets();
|
||||
static oop get_owner_threadObj(oop obj);
|
||||
};
|
||||
|
||||
|
||||
@ -25,7 +25,7 @@
|
||||
#include "precompiled.hpp"
|
||||
#include "jni.h"
|
||||
#include "classfile/classLoaderData.inline.hpp"
|
||||
#include "classfile/javaClasses.hpp"
|
||||
#include "classfile/javaClasses.inline.hpp"
|
||||
#include "classfile/moduleEntry.hpp"
|
||||
#include "logging/log.hpp"
|
||||
#include "memory/resourceArea.hpp"
|
||||
@ -236,10 +236,17 @@ ModuleEntry* ModuleEntry::create_unnamed_module(ClassLoaderData* cld) {
|
||||
// The java.lang.Module for this loader's
|
||||
// corresponding unnamed module can be found in the java.lang.ClassLoader object.
|
||||
oop module = java_lang_ClassLoader::unnamedModule(cld->class_loader());
|
||||
|
||||
// Ensure that the unnamed module was correctly set when the class loader was constructed.
|
||||
// Guarantee will cause a recognizable crash if the user code has circumvented calling the ClassLoader constructor.
|
||||
ResourceMark rm;
|
||||
guarantee(java_lang_Module::is_instance(module),
|
||||
"The unnamed module for ClassLoader %s, is null or not an instance of java.lang.Module. The class loader has not been initialized correctly.",
|
||||
cld->loader_name());
|
||||
|
||||
ModuleEntry* unnamed_module = new_unnamed_module_entry(Handle(Thread::current(), module), cld);
|
||||
|
||||
// Store pointer to the ModuleEntry in the unnamed module's java.lang.Module
|
||||
// object.
|
||||
// Store pointer to the ModuleEntry in the unnamed module's java.lang.Module object.
|
||||
java_lang_Module::set_module_entry(module, unnamed_module);
|
||||
|
||||
return unnamed_module;
|
||||
|
||||
@ -76,7 +76,7 @@
|
||||
#include "runtime/java.hpp"
|
||||
#include "runtime/javaCalls.hpp"
|
||||
#include "runtime/mutexLocker.hpp"
|
||||
#include "runtime/orderAccess.inline.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/sharedRuntime.hpp"
|
||||
#include "runtime/signature.hpp"
|
||||
#include "services/classLoadingService.hpp"
|
||||
@ -110,9 +110,6 @@ oop SystemDictionary::_java_platform_loader = NULL;
|
||||
|
||||
bool SystemDictionary::_has_checkPackageAccess = false;
|
||||
|
||||
// lazily initialized klass variables
|
||||
InstanceKlass* volatile SystemDictionary::_abstract_ownable_synchronizer_klass = NULL;
|
||||
|
||||
// Default ProtectionDomainCacheSize value
|
||||
|
||||
const int defaultProtectionDomainCacheSize = 1009;
|
||||
@ -1896,22 +1893,6 @@ void SystemDictionary::remove_classes_in_error_state() {
|
||||
ClassLoaderDataGraph::cld_do(&rcc);
|
||||
}
|
||||
|
||||
// ----------------------------------------------------------------------------
|
||||
// Lazily load klasses
|
||||
|
||||
void SystemDictionary::load_abstract_ownable_synchronizer_klass(TRAPS) {
|
||||
// if multiple threads calling this function, only one thread will load
|
||||
// the class. The other threads will find the loaded version once the
|
||||
// class is loaded.
|
||||
Klass* aos = _abstract_ownable_synchronizer_klass;
|
||||
if (aos == NULL) {
|
||||
Klass* k = resolve_or_fail(vmSymbols::java_util_concurrent_locks_AbstractOwnableSynchronizer(), true, CHECK);
|
||||
// Force a fence to prevent any read before the write completes
|
||||
OrderAccess::fence();
|
||||
_abstract_ownable_synchronizer_klass = InstanceKlass::cast(k);
|
||||
}
|
||||
}
|
||||
|
||||
// ----------------------------------------------------------------------------
|
||||
// Initialization
|
||||
|
||||
|
||||
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Reference in New Issue
Block a user