8282049: AArch64: Use ZR for integer zero immediate volatile stores

Reviewed-by: adinn, phh
This commit is contained in:
Dmitry Chuyko 2022-02-18 16:02:46 +00:00
parent cf6984ddaa
commit 413bef6890

View File

@ -3201,16 +3201,30 @@ encode %{
rscratch1, stlrb);
%}
enc_class aarch64_enc_stlrb0(memory mem) %{
MOV_VOLATILE(zr, $mem$$base, $mem$$index, $mem$$scale, $mem$$disp,
rscratch1, stlrb);
%}
enc_class aarch64_enc_stlrh(iRegI src, memory mem) %{
MOV_VOLATILE(as_Register($src$$reg), $mem$$base, $mem$$index, $mem$$scale, $mem$$disp,
rscratch1, stlrh);
%}
enc_class aarch64_enc_stlrh0(memory mem) %{
MOV_VOLATILE(zr, $mem$$base, $mem$$index, $mem$$scale, $mem$$disp,
rscratch1, stlrh);
%}
enc_class aarch64_enc_stlrw(iRegI src, memory mem) %{
MOV_VOLATILE(as_Register($src$$reg), $mem$$base, $mem$$index, $mem$$scale, $mem$$disp,
rscratch1, stlrw);
%}
enc_class aarch64_enc_stlrw0(memory mem) %{
MOV_VOLATILE(zr, $mem$$base, $mem$$index, $mem$$scale, $mem$$disp,
rscratch1, stlrw);
%}
enc_class aarch64_enc_ldarsbw(iRegI dst, memory mem) %{
Register dst_reg = as_Register($dst$$reg);
@ -3301,6 +3315,11 @@ encode %{
rscratch1, stlr);
%}
enc_class aarch64_enc_stlr0(memory mem) %{
MOV_VOLATILE(zr, $mem$$base, $mem$$index, $mem$$scale, $mem$$disp,
rscratch1, stlr);
%}
enc_class aarch64_enc_fstlrs(vRegF src, memory mem) %{
{
C2_MacroAssembler _masm(&cbuf);
@ -8275,6 +8294,18 @@ instruct storeB_volatile(iRegIorL2I src, /* sync_memory*/indirect mem)
ins_pipe(pipe_class_memory);
%}
instruct storeimmB0_volatile(immI0 zero, /* sync_memory*/indirect mem)
%{
match(Set mem (StoreB mem zero));
ins_cost(VOLATILE_REF_COST);
format %{ "stlrb zr, $mem\t# byte" %}
ins_encode(aarch64_enc_stlrb0(mem));
ins_pipe(pipe_class_memory);
%}
// Store Char/Short
instruct storeC_volatile(iRegIorL2I src, /* sync_memory*/indirect mem)
%{
@ -8288,6 +8319,18 @@ instruct storeC_volatile(iRegIorL2I src, /* sync_memory*/indirect mem)
ins_pipe(pipe_class_memory);
%}
instruct storeimmC0_volatile(immI0 zero, /* sync_memory*/indirect mem)
%{
match(Set mem (StoreC mem zero));
ins_cost(VOLATILE_REF_COST);
format %{ "stlrh zr, $mem\t# short" %}
ins_encode(aarch64_enc_stlrh0(mem));
ins_pipe(pipe_class_memory);
%}
// Store Integer
instruct storeI_volatile(iRegIorL2I src, /* sync_memory*/indirect mem)
@ -8302,6 +8345,18 @@ instruct storeI_volatile(iRegIorL2I src, /* sync_memory*/indirect mem)
ins_pipe(pipe_class_memory);
%}
instruct storeimmI0_volatile(immI0 zero, /* sync_memory*/indirect mem)
%{
match(Set mem(StoreI mem zero));
ins_cost(VOLATILE_REF_COST);
format %{ "stlrw zr, $mem\t# int" %}
ins_encode(aarch64_enc_stlrw0(mem));
ins_pipe(pipe_class_memory);
%}
// Store Long (64 bit signed)
instruct storeL_volatile(iRegL src, /* sync_memory*/indirect mem)
%{
@ -8315,6 +8370,18 @@ instruct storeL_volatile(iRegL src, /* sync_memory*/indirect mem)
ins_pipe(pipe_class_memory);
%}
instruct storeimmL0_volatile(immL0 zero, /* sync_memory*/indirect mem)
%{
match(Set mem (StoreL mem zero));
ins_cost(VOLATILE_REF_COST);
format %{ "stlr zr, $mem\t# int" %}
ins_encode(aarch64_enc_stlr0(mem));
ins_pipe(pipe_class_memory);
%}
// Store Pointer
instruct storeP_volatile(iRegP src, /* sync_memory*/indirect mem)
%{
@ -8328,6 +8395,18 @@ instruct storeP_volatile(iRegP src, /* sync_memory*/indirect mem)
ins_pipe(pipe_class_memory);
%}
instruct storeimmP0_volatile(immP0 zero, /* sync_memory*/indirect mem)
%{
match(Set mem (StoreP mem zero));
ins_cost(VOLATILE_REF_COST);
format %{ "stlr zr, $mem\t# ptr" %}
ins_encode(aarch64_enc_stlr0(mem));
ins_pipe(pipe_class_memory);
%}
// Store Compressed Pointer
instruct storeN_volatile(iRegN src, /* sync_memory*/indirect mem)
%{
@ -8341,6 +8420,18 @@ instruct storeN_volatile(iRegN src, /* sync_memory*/indirect mem)
ins_pipe(pipe_class_memory);
%}
instruct storeimmN0_volatile(immN0 zero, /* sync_memory*/indirect mem)
%{
match(Set mem (StoreN mem zero));
ins_cost(VOLATILE_REF_COST);
format %{ "stlrw zr, $mem\t# compressed ptr" %}
ins_encode(aarch64_enc_stlrw0(mem));
ins_pipe(pipe_class_memory);
%}
// Store Float
instruct storeF_volatile(vRegF src, /* sync_memory*/indirect mem)
%{