8295948: Support for Zicbop/prefetch instructions on RISC-V

Reviewed-by: fyang, yadongwang

src/hotspot/cpu/riscv/riscv.ad

@@ -4289,6 +4289,16 @@ pipe_class ldiv_reg_reg(iRegI dst, iRegI src1, iRegI src2)
 
 //------- Load pipeline operations ------------------------
 
+// Load - prefetch
+// Eg.  PREFETCH_W  mem
+pipe_class iload_prefetch(memory mem)
+%{
+  single_instruction;
+  mem    : ID(read);
+  DECODE : ID;
+  LDST   : MEM;
+%}
+
 // Load - reg, mem
 // E.g. LA    Rd, mem
 pipe_class iload_reg_mem(iRegI dst, memory mem)
@@ -5190,6 +5200,35 @@ instruct storeNKlass(iRegN src, memory mem)
   ins_pipe(istore_reg_mem);
 %}
 
+// ============================================================================
+// Prefetch instructions
+// Must be safe to execute with invalid address (cannot fault).
+
+instruct prefetchalloc( memory mem ) %{
+  predicate(UseZicbop);
+  match(PrefetchAllocation mem);
+
+  ins_cost(ALU_COST * 1);
+  format %{ "prefetch_w $mem\t# Prefetch for write" %}
+
+  ins_encode %{
+    if (is_imm_in_range($mem$$disp, 12, 0)) {
+      if (($mem$$disp & 0x1f) == 0) {
+        __ prefetch_w(as_Register($mem$$base), $mem$$disp);
+      } else {
+        __ addi(t0, as_Register($mem$$base), $mem$$disp);
+        __ prefetch_w(t0, 0);
+      }
+    } else {
+      __ mv(t0, $mem$$disp);
+      __ add(t0, as_Register($mem$$base), t0);
+      __ prefetch_w(t0, 0);
+    }
+  %}
+
+  ins_pipe(iload_prefetch);
+%}
+
 // ============================================================================
 // Atomic operation instructions
 //

src/hotspot/cpu/riscv/vm_version_riscv.cpp

@@ -237,9 +237,43 @@ void VM_Version::c2_initialize() {
     }
   }
 
-  // disable prefetch
-  if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) {
+  if (!UseZicbop) {
+    if (!FLAG_IS_DEFAULT(AllocatePrefetchStyle)) {
+      warning("Zicbop is not available on this CPU");
+    }
     FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0);
+  } else {
+    // Limit AllocatePrefetchDistance so that it does not exceed the
+    // constraint in AllocatePrefetchDistanceConstraintFunc.
+    if (FLAG_IS_DEFAULT(AllocatePrefetchDistance)) {
+      FLAG_SET_DEFAULT(AllocatePrefetchDistance, MIN2(512, 3 * (int)CacheLineSize));
+    }
+    if (FLAG_IS_DEFAULT(AllocatePrefetchStepSize)) {
+      FLAG_SET_DEFAULT(AllocatePrefetchStepSize, (int)CacheLineSize);
+    }
+    if (FLAG_IS_DEFAULT(PrefetchScanIntervalInBytes)) {
+      FLAG_SET_DEFAULT(PrefetchScanIntervalInBytes, 3 * (int)CacheLineSize);
+    }
+    if (FLAG_IS_DEFAULT(PrefetchCopyIntervalInBytes)) {
+      FLAG_SET_DEFAULT(PrefetchCopyIntervalInBytes, 3 * (int)CacheLineSize);
+    }
+
+    if (PrefetchCopyIntervalInBytes != -1 &&
+        ((PrefetchCopyIntervalInBytes & 7) || (PrefetchCopyIntervalInBytes >= 32768))) {
+      warning("PrefetchCopyIntervalInBytes must be -1, or a multiple of 8 and < 32768");
+      PrefetchCopyIntervalInBytes &= ~7;
+      if (PrefetchCopyIntervalInBytes >= 32768) {
+        PrefetchCopyIntervalInBytes = 32760;
+      }
+    }
+    if (AllocatePrefetchDistance !=-1 && (AllocatePrefetchDistance & 7)) {
+      warning("AllocatePrefetchDistance must be multiple of 8");
+      AllocatePrefetchDistance &= ~7;
+    }
+    if (AllocatePrefetchStepSize & 7) {
+      warning("AllocatePrefetchStepSize must be multiple of 8");
+      AllocatePrefetchStepSize &= ~7;
+    }
   }
 
   if (FLAG_IS_DEFAULT(UseMulAddIntrinsic)) {

src/hotspot/os_cpu/linux_riscv/prefetch_linux_riscv.inline.hpp

@@ -28,11 +28,18 @@
 
 #include "runtime/prefetch.hpp"
 
-
 inline void Prefetch::read (const void *loc, intx interval) {
+  if (interval >= 0 && UseZicbop) {
+    // encoding for prefetch.r
+    asm("ori zero, %0, 1" : : "r"(intptr_t(loc)+interval));
+  }
 }
 
 inline void Prefetch::write(void *loc, intx interval) {
+  if (interval >= 0 && UseZicbop) {
+    // encoding for prefetch.w
+    asm("ori zero, %0, 3" : : "r"(intptr_t(loc)+interval));
+  }
 }
 
 #endif // OS_CPU_LINUX_RISCV_VM_PREFETCH_LINUX_RISCV_INLINE_HPP