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8337536: AArch64: Enable BTI branch protection for runtime part

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Co-authored-by: Hao Sun <haosun@openjdk.org>
Co-authored-by: Magnus Ihse Bursie <ihse@openjdk.org>
Reviewed-by: aph, ihse, erikj, eliu
This commit is contained in:
Fei Gao 2024-10-18 15:00:58 +00:00
parent 28252bb48d
commit 4dcc7f3f26
8 changed files with 215 additions and 29 deletions
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8
make/autoconf/flags-cflags.m4
View File

@ -936,15 +936,13 @@ AC_DEFUN_ONCE([FLAGS_SETUP_BRANCH_PROTECTION],
if test "x$OPENJDK_TARGET_CPU" = xaarch64; then
if test "x$TOOLCHAIN_TYPE" = xgcc || test "x$TOOLCHAIN_TYPE" = xclang; then
FLAGS_COMPILER_CHECK_ARGUMENTS(ARGUMENT: [${BRANCH_PROTECTION_FLAG}],
FLAGS_COMPILER_CHECK_ARGUMENTS(ARGUMENT: [$BRANCH_PROTECTION_FLAG],
IF_TRUE: [BRANCH_PROTECTION_AVAILABLE=true])
fi
fi
BRANCH_PROTECTION_CFLAGS=""
UTIL_ARG_ENABLE(NAME: branch-protection, DEFAULT: false,
RESULT: USE_BRANCH_PROTECTION, AVAILABLE: $BRANCH_PROTECTION_AVAILABLE,
RESULT: BRANCH_PROTECTION_ENABLED, AVAILABLE: $BRANCH_PROTECTION_AVAILABLE,
DESC: [enable branch protection when compiling C/C++],
IF_ENABLED: [ BRANCH_PROTECTION_CFLAGS=${BRANCH_PROTECTION_FLAG}])
AC_SUBST(BRANCH_PROTECTION_CFLAGS)
IF_ENABLED: [BRANCH_PROTECTION_CFLAGS=$BRANCH_PROTECTION_FLAG])
])

4
make/autoconf/flags-other.m4
View File

@ -150,5 +150,9 @@ AC_DEFUN([FLAGS_SETUP_ASFLAGS_CPU_DEP],
$2JVM_ASFLAGS="${$2JVM_ASFLAGS} $ARM_ARCH_TYPE_ASFLAGS $ARM_FLOAT_TYPE_ASFLAGS"
fi
if test "x$BRANCH_PROTECTION_ENABLED" = "xtrue"; then
$2JVM_ASFLAGS="${$2JVM_ASFLAGS} $BRANCH_PROTECTION_FLAG"
fi
AC_SUBST($2JVM_ASFLAGS)
])

1
make/autoconf/spec.gmk.template
View File

@ -429,7 +429,6 @@ ENABLE_LIBFFI_BUNDLING := @ENABLE_LIBFFI_BUNDLING@
LIBFFI_LIB_FILE := @LIBFFI_LIB_FILE@
FILE_MACRO_CFLAGS := @FILE_MACRO_CFLAGS@
REPRODUCIBLE_CFLAGS := @REPRODUCIBLE_CFLAGS@
BRANCH_PROTECTION_CFLAGS := @BRANCH_PROTECTION_CFLAGS@
STATIC_LIBS_CFLAGS := @STATIC_LIBS_CFLAGS@

11
src/hotspot/cpu/aarch64/copy_aarch64.hpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2003, 2024, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -64,28 +64,34 @@ static void pd_zero_to_bytes(void* to, size_t count) {
" br %[t0];\n" \
" .align 5;\n" \
"0:" \
" hint #0x24; // bti j\n" \
" b 1f;\n" \
" .align 5;\n" \
" hint #0x24; // bti j\n" \
" ldr %[t0], [%[s], #0];\n" \
" str %[t0], [%[d], #0];\n" \
" b 1f;\n" \
" .align 5;\n" \
" hint #0x24; // bti j\n" \
" ldp %[t0], %[t1], [%[s], #0];\n" \
" stp %[t0], %[t1], [%[d], #0];\n" \
" b 1f;\n" \
" .align 5;\n" \
" hint #0x24; // bti j\n" \
" ldp %[t0], %[t1], [%[s], #0];\n" \
" ldr %[t2], [%[s], #16];\n" \
" stp %[t0], %[t1], [%[d], #0];\n" \
" str %[t2], [%[d], #16];\n" \
" b 1f;\n" \
" .align 5;\n" \
" hint #0x24; // bti j\n" \
" ldp %[t0], %[t1], [%[s], #0];\n" \
" ldp %[t2], %[t3], [%[s], #16];\n" \
" stp %[t0], %[t1], [%[d], #0];\n" \
" stp %[t2], %[t3], [%[d], #16];\n" \
" b 1f;\n" \
" .align 5;\n" \
" hint #0x24; // bti j\n" \
" ldp %[t0], %[t1], [%[s], #0];\n" \
" ldp %[t2], %[t3], [%[s], #16];\n" \
" ldr %[t4], [%[s], #32];\n" \
@ -94,6 +100,7 @@ static void pd_zero_to_bytes(void* to, size_t count) {
" str %[t4], [%[d], #32];\n" \
" b 1f;\n" \
" .align 5;\n" \
" hint #0x24; // bti j\n" \
" ldp %[t0], %[t1], [%[s], #0];\n" \
" ldp %[t2], %[t3], [%[s], #16];\n" \
" ldp %[t4], %[t5], [%[s], #32];\n" \
@ -103,6 +110,7 @@ static void pd_zero_to_bytes(void* to, size_t count) {
" stp %[t4], %[t5], [%[d], #32];\n" \
" b 1f;\n" \
" .align 5;\n" \
" hint #0x24; // bti j\n" \
" ldr %[t6], [%[s], #0];\n" \
" ldp %[t0], %[t1], [%[s], #8];\n" \
" ldp %[t2], %[t3], [%[s], #24];\n" \
@ -110,6 +118,7 @@ static void pd_zero_to_bytes(void* to, size_t count) {
" str %[t6], [%[d]], #8;\n" \
" b 2b;\n" \
" .align 5;\n" \
" hint #0x24; // bti j\n" \
" ldp %[t0], %[t1], [%[s], #0];\n" \
" ldp %[t2], %[t3], [%[s], #16];\n" \
" ldp %[t4], %[t5], [%[s], #32];\n" \

52
src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.S
View File

@ -26,6 +26,7 @@
.align 5
DECLARE_FUNC(aarch64_atomic_fetch_add_8_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
ldaddal x1, x2, [x0]
#else
@ -41,6 +42,7 @@ DECLARE_FUNC(aarch64_atomic_fetch_add_8_default_impl):
.align 5
DECLARE_FUNC(aarch64_atomic_fetch_add_4_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
ldaddal w1, w2, [x0]
#else
@ -56,8 +58,9 @@ DECLARE_FUNC(aarch64_atomic_fetch_add_4_default_impl):
.align 5
DECLARE_FUNC(aarch64_atomic_fetch_add_8_relaxed_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
ldadd x1, x2, [x0]
ldadd x1, x2, [x0]
#else
prfm pstl1strm, [x0]
0: ldxr x2, [x0]
@ -70,8 +73,9 @@ DECLARE_FUNC(aarch64_atomic_fetch_add_8_relaxed_default_impl):
.align 5
DECLARE_FUNC(aarch64_atomic_fetch_add_4_relaxed_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
ldadd w1, w2, [x0]
ldadd w1, w2, [x0]
#else
prfm pstl1strm, [x0]
0: ldxr w2, [x0]
@ -84,6 +88,7 @@ DECLARE_FUNC(aarch64_atomic_fetch_add_4_relaxed_default_impl):
.align 5
DECLARE_FUNC(aarch64_atomic_xchg_4_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
swpal w1, w2, [x0]
#else
@ -98,6 +103,7 @@ DECLARE_FUNC(aarch64_atomic_xchg_4_default_impl):
.align 5
DECLARE_FUNC(aarch64_atomic_xchg_8_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
swpal x1, x2, [x0]
#else
@ -112,6 +118,7 @@ DECLARE_FUNC(aarch64_atomic_xchg_8_default_impl):
.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_1_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
casalb w3, w2, [x0]
@ -131,6 +138,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_1_default_impl):
.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_4_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
casal w3, w2, [x0]
@ -149,6 +157,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_4_default_impl):
.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_8_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
casal x3, x2, [x0]
@ -167,6 +176,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_8_default_impl):
.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_4_release_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
casl w3, w2, [x0]
@ -183,6 +193,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_4_release_default_impl):
.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_8_release_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
casl x3, x2, [x0]
@ -199,6 +210,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_8_release_default_impl):
.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_4_seq_cst_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
casal w3, w2, [x0]
@ -215,6 +227,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_4_seq_cst_default_impl):
.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_8_seq_cst_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
casal x3, x2, [x0]
@ -231,6 +244,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_8_seq_cst_default_impl):
.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_1_relaxed_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
casb w3, w2, [x0]
@ -248,6 +262,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_1_relaxed_default_impl):
.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_4_relaxed_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
cas w3, w2, [x0]
@ -264,6 +279,7 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_4_relaxed_default_impl):
.align 5
DECLARE_FUNC(aarch64_atomic_cmpxchg_8_relaxed_default_impl):
hint #0x22 // bti c
#ifdef __ARM_FEATURE_ATOMICS
mov x3, x1
cas x3, x2, [x0]
@ -277,3 +293,35 @@ DECLARE_FUNC(aarch64_atomic_cmpxchg_8_relaxed_default_impl):
#endif
1: mov x0, x3
ret
/* Emit .note.gnu.property section in case of PAC or BTI being enabled.
* For more details see "ELF for the Arm® 64-bit Architecture (AArch64)".
* https://github.com/ARM-software/abi-aa/blob/main/aaelf64/aaelf64.rst
*/
#ifdef __ARM_FEATURE_BTI_DEFAULT
#ifdef __ARM_FEATURE_PAC_DEFAULT
#define GNU_PROPERTY_AARCH64_FEATURE 3
#else
#define GNU_PROPERTY_AARCH64_FEATURE 1
#endif
#else
#ifdef __ARM_FEATURE_PAC_DEFAULT
#define GNU_PROPERTY_AARCH64_FEATURE 2
#else
#define GNU_PROPERTY_AARCH64_FEATURE 0
#endif
#endif
#if (GNU_PROPERTY_AARCH64_FEATURE != 0)
.pushsection .note.gnu.property, "a"
.align 3
.long 4 /* name length */
.long 0x10 /* data length */
.long 5 /* note type: NT_GNU_PROPERTY_TYPE_0 */
.string "GNU" /* vendor name */
.long 0xc0000000 /* GNU_PROPERTY_AARCH64_FEATURE_1_AND */
.long 4 /* pr_datasze */
.long GNU_PROPERTY_AARCH64_FEATURE
.long 0
.popsection
#endif

104
src/hotspot/os_cpu/linux_aarch64/copy_linux_aarch64.S
View File

@ -83,29 +83,41 @@ fwd_copy_drain:
br t0
.align 5
ret // -8 == 0 words
// -8 == 0 words
hint #0x24 // bti j
ret
.align 5
ldr t0, [s, #16] // -7 == 1 word
// -7 == 1 word
hint #0x24 // bti j
ldr t0, [s, #16]
str t0, [d, #16]
ret
.align 5
ldp t0, t1, [s, #16] // -6 = 2 words
// -6 == 2 words
hint #0x24 // bti j
ldp t0, t1, [s, #16]
stp t0, t1, [d, #16]
ret
.align 5
ldp t0, t1, [s, #16] // -5 = 3 words
// -5 == 3 words
hint #0x24 // bti j
ldp t0, t1, [s, #16]
ldr t2, [s, #32]
stp t0, t1, [d, #16]
str t2, [d, #32]
ret
.align 5
ldp t0, t1, [s, #16] // -4 = 4 words
// -4 == 4 words
hint #0x24 // bti j
ldp t0, t1, [s, #16]
ldp t2, t3, [s, #32]
stp t0, t1, [d, #16]
stp t2, t3, [d, #32]
ret
.align 5
ldp t0, t1, [s, #16] // -3 = 5 words
// -3 == 5 words
hint #0x24 // bti j
ldp t0, t1, [s, #16]
ldp t2, t3, [s, #32]
ldr t4, [s, #48]
stp t0, t1, [d, #16]
@ -113,7 +125,9 @@ fwd_copy_drain:
str t4, [d, #48]
ret
.align 5
ldp t0, t1, [s, #16] // -2 = 6 words
// -2 == 6 words
hint #0x24 // bti j
ldp t0, t1, [s, #16]
ldp t2, t3, [s, #32]
ldp t4, t5, [s, #48]
stp t0, t1, [d, #16]
@ -121,18 +135,20 @@ fwd_copy_drain:
stp t4, t5, [d, #48]
ret
.align 5
ldp t0, t1, [s, #16] // -1 = 7 words
// -1 == 7 words
hint #0x24 // bti j
ldp t0, t1, [s, #16]
ldp t2, t3, [s, #32]
ldp t4, t5, [s, #48]
ldr t6, [s, #64]
stp t0, t1, [d, #16]
stp t2, t3, [d, #32]
stp t4, t5, [d, #48]
str t6, [d, #64]
// Is always aligned here, code for 7 words is one instruction
// Is always aligned here, code for 7 words is two instructions
// too large so it just falls through.
.align 5
0:
str t6, [d, #64]
ret
.align 6
@ -184,29 +200,41 @@ bwd_copy_drain:
br t0
.align 5
ret // -8 == 0 words
// -8 == 0 words
hint #0x24 // bti j
ret
.align 5
ldr t0, [s, #-8] // -7 == 1 word
// -7 == 1 word
hint #0x24 // bti j
ldr t0, [s, #-8]
str t0, [d, #-8]
ret
.align 5
ldp t0, t1, [s, #-16] // -6 = 2 words
// -6 == 2 words
hint #0x24 // bti j
ldp t0, t1, [s, #-16]
stp t0, t1, [d, #-16]
ret
.align 5
ldp t0, t1, [s, #-16] // -5 = 3 words
// -5 == 3 words
hint #0x24 // bti j
ldp t0, t1, [s, #-16]
ldr t2, [s, #-24]
stp t0, t1, [d, #-16]
str t2, [d, #-24]
ret
.align 5
ldp t0, t1, [s, #-16] // -4 = 4 words
// -4 == 4 words
hint #0x24 // bti j
ldp t0, t1, [s, #-16]
ldp t2, t3, [s, #-32]
stp t0, t1, [d, #-16]
stp t2, t3, [d, #-32]
ret
.align 5
ldp t0, t1, [s, #-16] // -3 = 5 words
// -3 == 5 words
hint #0x24 // bti j
ldp t0, t1, [s, #-16]
ldp t2, t3, [s, #-32]
ldr t4, [s, #-40]
stp t0, t1, [d, #-16]
@ -214,7 +242,9 @@ bwd_copy_drain:
str t4, [d, #-40]
ret
.align 5
ldp t0, t1, [s, #-16] // -2 = 6 words
// -2 == 6 words
hint #0x24 // bti j
ldp t0, t1, [s, #-16]
ldp t2, t3, [s, #-32]
ldp t4, t5, [s, #-48]
stp t0, t1, [d, #-16]
@ -222,16 +252,50 @@ bwd_copy_drain:
stp t4, t5, [d, #-48]
ret
.align 5
ldp t0, t1, [s, #-16] // -1 = 7 words
// -1 == 7 words
hint #0x24 // bti j
ldp t0, t1, [s, #-16]
ldp t2, t3, [s, #-32]
ldp t4, t5, [s, #-48]
ldr t6, [s, #-56]
stp t0, t1, [d, #-16]
stp t2, t3, [d, #-32]
stp t4, t5, [d, #-48]
str t6, [d, #-56]
// Is always aligned here, code for 7 words is one instruction
// Is always aligned here, code for 7 words is two instructions
// too large so it just falls through.
.align 5
0:
str t6, [d, #-56]
ret
/* Emit .note.gnu.property section in case of PAC or BTI being enabled.
* For more details see "ELF for the Arm® 64-bit Architecture (AArch64)".
* https://github.com/ARM-software/abi-aa/blob/main/aaelf64/aaelf64.rst
*/
#ifdef __ARM_FEATURE_BTI_DEFAULT
#ifdef __ARM_FEATURE_PAC_DEFAULT
#define GNU_PROPERTY_AARCH64_FEATURE 3
#else
#define GNU_PROPERTY_AARCH64_FEATURE 1
#endif
#else
#ifdef __ARM_FEATURE_PAC_DEFAULT
#define GNU_PROPERTY_AARCH64_FEATURE 2
#else
#define GNU_PROPERTY_AARCH64_FEATURE 0
#endif
#endif
#if (GNU_PROPERTY_AARCH64_FEATURE != 0)
.pushsection .note.gnu.property, "a"
.align 3
.long 4 /* name length */
.long 0x10 /* data length */
.long 5 /* note type: NT_GNU_PROPERTY_TYPE_0 */
.string "GNU" /* vendor name */
.long 0xc0000000 /* GNU_PROPERTY_AARCH64_FEATURE_1_AND */
.long 4 /* pr_datasze */
.long GNU_PROPERTY_AARCH64_FEATURE
.long 0
.popsection
#endif

32
src/hotspot/os_cpu/linux_aarch64/safefetch_linux_aarch64.S
View File

@ -48,3 +48,35 @@ DECLARE_FUNC(_SafeFetchN_fault):
DECLARE_FUNC(_SafeFetchN_continuation):
mov x0, x1
ret
/* Emit .note.gnu.property section in case of PAC or BTI being enabled.
* For more details see "ELF for the Arm® 64-bit Architecture (AArch64)".
* https://github.com/ARM-software/abi-aa/blob/main/aaelf64/aaelf64.rst
*/
#ifdef __ARM_FEATURE_BTI_DEFAULT
#ifdef __ARM_FEATURE_PAC_DEFAULT
#define GNU_PROPERTY_AARCH64_FEATURE 3
#else
#define GNU_PROPERTY_AARCH64_FEATURE 1
#endif
#else
#ifdef __ARM_FEATURE_PAC_DEFAULT
#define GNU_PROPERTY_AARCH64_FEATURE 2
#else
#define GNU_PROPERTY_AARCH64_FEATURE 0
#endif
#endif
#if (GNU_PROPERTY_AARCH64_FEATURE != 0)
.pushsection .note.gnu.property, "a"
.align 3
.long 4 /* name length */
.long 0x10 /* data length */
.long 5 /* note type: NT_GNU_PROPERTY_TYPE_0 */
.string "GNU" /* vendor name */
.long 0xc0000000 /* GNU_PROPERTY_AARCH64_FEATURE_1_AND */
.long 4 /* pr_datasze */
.long GNU_PROPERTY_AARCH64_FEATURE
.long 0
.popsection
#endif

32
src/hotspot/os_cpu/linux_aarch64/threadLS_linux_aarch64.S
View File

@ -44,3 +44,35 @@ DECLARE_FUNC(_ZN10JavaThread25aarch64_get_thread_helperEv):
ret
.size _ZN10JavaThread25aarch64_get_thread_helperEv, .-_ZN10JavaThread25aarch64_get_thread_helperEv
/* Emit .note.gnu.property section in case of PAC or BTI being enabled.
* For more details see "ELF for the Arm® 64-bit Architecture (AArch64)".
* https://github.com/ARM-software/abi-aa/blob/main/aaelf64/aaelf64.rst
*/
#ifdef __ARM_FEATURE_BTI_DEFAULT
#ifdef __ARM_FEATURE_PAC_DEFAULT
#define GNU_PROPERTY_AARCH64_FEATURE 3
#else
#define GNU_PROPERTY_AARCH64_FEATURE 1
#endif
#else
#ifdef __ARM_FEATURE_PAC_DEFAULT
#define GNU_PROPERTY_AARCH64_FEATURE 2
#else
#define GNU_PROPERTY_AARCH64_FEATURE 0
#endif
#endif
#if (GNU_PROPERTY_AARCH64_FEATURE != 0)
.pushsection .note.gnu.property, "a"
.align 3
.long 4 /* name length */
.long 0x10 /* data length */
.long 5 /* note type: NT_GNU_PROPERTY_TYPE_0 */
.string "GNU" /* vendor name */
.long 0xc0000000 /* GNU_PROPERTY_AARCH64_FEATURE_1_AND */
.long 4 /* pr_datasze */
.long GNU_PROPERTY_AARCH64_FEATURE
.long 0
.popsection
#endif