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8315612: RISC-V: intrinsic for unsignedMultiplyHigh

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Reviewed-by: fyang
This commit is contained in:
Vladimir Kempik 2023-09-06 06:49:10 +00:00
parent 5cbff24608
commit 5d3fdc1750
1 changed files with 15 additions and 0 deletions
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15
src/hotspot/cpu/riscv/riscv.ad
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@ -6864,6 +6864,21 @@ instruct mulHiL_rReg(iRegLNoSp dst, iRegL src1, iRegL src2)
ins_pipe(lmul_reg_reg); ins_pipe(lmul_reg_reg);
%} %}
instruct umulHiL_rReg(iRegLNoSp dst, iRegL src1, iRegL src2)
%{
match(Set dst (UMulHiL src1 src2));
ins_cost(IMUL_COST);
format %{ "mulhu $dst, $src1, $src2\t# umulhi, #@umulHiL_rReg" %}
ins_encode %{
__ mulhu(as_Register($dst$$reg),
as_Register($src1$$reg),
as_Register($src2$$reg));
%}
ins_pipe(lmul_reg_reg);
%}
// Integer Divide // Integer Divide
instruct divI(iRegINoSp dst, iRegIorL2I src1, iRegIorL2I src2) %{ instruct divI(iRegINoSp dst, iRegIorL2I src1, iRegIorL2I src2) %{