8294187: RISC-V: Unify all relocations for the backend into AbstractAssembler::relocate()
Reviewed-by: fjiang, yadongwang, fyang
This commit is contained in:
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acd75e0f1c
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664e5b1d2e
@ -215,7 +215,7 @@ void Assembler::ret() {
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void Assembler::NAME(const Address &adr, Register temp) { \
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switch (adr.getMode()) { \
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case Address::literal: { \
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code_section()->relocate(pc(), adr.rspec()); \
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relocate(adr.rspec()); \
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NAME(adr.target(), temp); \
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break; \
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} \
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@ -488,7 +488,7 @@ public:
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result_type header { \
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guarantee(rtype == relocInfo::internal_word_type, \
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"only internal_word_type relocs make sense here"); \
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code_section()->relocate(pc(), InternalAddress(dest).rspec());
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relocate(InternalAddress(dest).rspec());
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// Load/store register (all modes)
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#define INSN(NAME, op, funct3) \
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@ -533,7 +533,7 @@ public:
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void NAME(Register Rd, const Address &adr, Register temp = t0) { \
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switch (adr.getMode()) { \
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case Address::literal: { \
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code_section()->relocate(pc(), adr.rspec()); \
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relocate(adr.rspec()); \
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NAME(Rd, adr.target()); \
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break; \
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} \
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@ -607,7 +607,7 @@ public:
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void NAME(FloatRegister Rd, const Address &adr, Register temp = t0) { \
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switch (adr.getMode()) { \
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case Address::literal: { \
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code_section()->relocate(pc(), adr.rspec()); \
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relocate(adr.rspec()); \
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NAME(Rd, adr.target(), temp); \
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break; \
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} \
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@ -750,7 +750,7 @@ public:
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switch (adr.getMode()) { \
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case Address::literal: { \
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assert_different_registers(Rs, temp); \
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code_section()->relocate(pc(), adr.rspec()); \
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relocate(adr.rspec()); \
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NAME(Rs, adr.target(), temp); \
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break; \
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} \
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@ -793,7 +793,7 @@ public:
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void NAME(FloatRegister Rs, const Address &adr, Register temp = t0) { \
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switch (adr.getMode()) { \
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case Address::literal: { \
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code_section()->relocate(pc(), adr.rspec()); \
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relocate(adr.rspec()); \
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NAME(Rs, adr.target(), temp); \
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break; \
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} \
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@ -42,7 +42,7 @@
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void C1SafepointPollStub::emit_code(LIR_Assembler* ce) {
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__ bind(_entry);
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InternalAddress safepoint_pc(__ pc() - __ offset() + safepoint_offset());
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__ code_section()->relocate(__ pc(), safepoint_pc.rspec());
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__ relocate(safepoint_pc.rspec());
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__ la(t0, safepoint_pc.target());
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__ sd(t0, Address(xthread, JavaThread::saved_exception_pc_offset()));
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@ -2144,16 +2144,6 @@ void LIR_Assembler::typecheck_lir_store(LIR_OpTypeCheck* op, bool should_profile
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__ bind(done);
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}
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void LIR_Assembler::add_debug_info_for_branch(address adr, CodeEmitInfo* info) {
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_masm->code_section()->relocate(adr, relocInfo::poll_type);
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int pc_offset = code_offset();
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flush_debug_info(pc_offset);
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info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
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if (info->exception_handlers() != NULL) {
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compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
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}
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}
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void LIR_Assembler::type_profile(Register obj, ciMethodData* md, Register klass_RInfo, Register k_RInfo,
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ciProfileData* data, Label* success, Label* failure,
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Label& profile_cast_success, Label& profile_cast_failure) {
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@ -58,8 +58,6 @@ private:
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ciMethodData *md, ciProfileData *data,
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Register recv, Label* update_done);
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void add_debug_info_for_branch(address adr, CodeEmitInfo* info);
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void casw(Register addr, Register newval, Register cmpval);
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void caswu(Register addr, Register newval, Register cmpval);
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void casl(Register addr, Register newval, Register cmpval);
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@ -39,7 +39,7 @@ void C2SafepointPollStubTable::emit_stub_impl(MacroAssembler& masm, C2SafepointP
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__ bind(entry->_stub_label);
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InternalAddress safepoint_pc(masm.pc() - masm.offset() + entry->_safepoint_offset);
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masm.code_section()->relocate(masm.pc(), safepoint_pc.rspec());
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masm.relocate(safepoint_pc.rspec());
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__ la(t0, safepoint_pc.target());
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__ sd(t0, Address(xthread, JavaThread::saved_exception_pc_offset()));
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__ far_jump(callback_addr);
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@ -730,14 +730,13 @@ void MacroAssembler::la(Register Rd, const address &dest) {
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}
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void MacroAssembler::la(Register Rd, const Address &adr) {
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code_section()->relocate(pc(), adr.rspec());
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relocInfo::relocType rtype = adr.rspec().reloc()->type();
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switch (adr.getMode()) {
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case Address::literal: {
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relocInfo::relocType rtype = adr.rspec().reloc()->type();
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if (rtype == relocInfo::none) {
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mv(Rd, (intptr_t)(adr.target()));
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} else {
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relocate(adr.rspec());
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movptr(Rd, adr.target());
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}
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break;
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@ -1349,7 +1348,7 @@ void MacroAssembler::reinit_heapbase() {
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void MacroAssembler::mv(Register Rd, Address dest) {
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assert(dest.getMode() == Address::literal, "Address mode should be Address::literal");
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code_section()->relocate(pc(), dest.rspec());
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relocate(dest.rspec());
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movptr(Rd, dest.target());
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}
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@ -2700,7 +2699,7 @@ void MacroAssembler::la_patchable(Register reg1, const Address &dest, int32_t &o
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assert(is_valid_riscv64_address(dest.target()), "bad address");
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assert(dest.getMode() == Address::literal, "la_patchable must be applied to a literal address");
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code_section()->relocate(pc(), dest.rspec());
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relocate(dest.rspec());
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// RISC-V doesn't compute a page-aligned address, in order to partially
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// compensate for the use of *signed* offsets in its base+disp12
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// addressing mode (RISC-V's PC-relative reach remains asymmetric
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@ -2764,7 +2763,7 @@ void MacroAssembler::get_polling_page(Register dest, relocInfo::relocType rtype)
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// Read the polling page. The address of the polling page must
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// already be in r.
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void MacroAssembler::read_polling_page(Register r, int32_t offset, relocInfo::relocType rtype) {
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code_section()->relocate(pc(), rtype);
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relocate(rtype);
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lwu(zr, Address(r, offset));
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}
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@ -2779,8 +2778,7 @@ void MacroAssembler::set_narrow_oop(Register dst, jobject obj) {
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}
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#endif
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int oop_index = oop_recorder()->find_index(obj);
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RelocationHolder rspec = oop_Relocation::spec(oop_index);
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code_section()->relocate(pc(), rspec);
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relocate(oop_Relocation::spec(oop_index));
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li32(dst, 0xDEADBEEF);
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zero_extend(dst, dst, 32);
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}
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@ -2791,9 +2789,8 @@ void MacroAssembler::set_narrow_klass(Register dst, Klass* k) {
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int index = oop_recorder()->find_index(k);
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assert(!Universe::heap()->is_in(k), "should not be an oop");
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RelocationHolder rspec = metadata_Relocation::spec(index);
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code_section()->relocate(pc(), rspec);
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narrowKlass nk = CompressedKlassPointers::encode(k);
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relocate(metadata_Relocation::spec(index));
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li32(dst, nk);
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zero_extend(dst, dst, 32);
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}
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