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This commit is contained in:
Prasanta Sadhukhan 2019-08-26 11:20:26 +05:30
commit 672ec6f12a
1655 changed files with 34378 additions and 39369 deletions
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13
.hgignore
View File

@ -5,12 +5,13 @@ nbproject/private/
^webrev
^.src-rev$
^.jib/
\.DS_Store
\.metadata/
\.recommenders/
(^|/)\.DS_Store
(^|/)\.metadata/
(^|/)\.recommenders/
test/nashorn/script/external
test/nashorn/lib
NashornProfile.txt
.*/JTreport/.*
.*/JTwork/.*
.*/.git/.*
(^|/)JTreport/
(^|/)JTwork/
(^|/)\.git/
^src/utils/hsdis/build/

7
.hgtags
View File

@ -575,4 +575,11 @@ e64383344f144217c36196c3c8a2df8f588a2af3 jdk-14+3
0f1e29c77e50c7da11d83df410026392c4d1a28c jdk-14+5
2e63fb0a885fa908a97bbb0da8d7c3de11536aca jdk-13+30
443f7359b34d60e7821216ffc60f88b6ffe0ccdd jdk-14+6
6a159c6c23ccd0029140ab91653442e412305ce5 jdk-13+31
28ab01c067551ef158abaef08e154e1051ca0893 jdk-14+7
929f37a9c35d530d4e866f6e832001aeb4cfb371 jdk-13+32
c0023e364b6f130cb1e93747b796d8718d544db1 jdk-14+8
9c250a7600e12bdb1e611835250af3204d4aa152 jdk-13+33
18f189e69b29f8215a3500b875127ed4fb2d977a jdk-14+9
ececb6dae777e622abda42c705fd984a42f46b5a jdk-14+10
bf4c808a4488025a415f867e54c8b088417e08a0 jdk-14+11

1
make/CompileToolsJdk.gmk
View File

@ -41,6 +41,7 @@ $(eval $(call IncludeCustomExtension, CompileTools.gmk))
BUILD_TOOLS_SRC_DIRS += \
$(TOPDIR)/make/jdk/src/classes \
$(BUILDTOOLS_OUTPUTDIR)/interim_cldrconverter_classes \
$(BUILDTOOLS_OUTPUTDIR)/interim_tzdb_classes \
#
$(eval $(call SetupJavaCompilation,BUILD_TOOLS_JDK, \

50
make/CopyInterimTZDB.gmk Normal file
View File

@ -0,0 +1,50 @@
#
# Copyright (c) 2019, Oracle and/or its affiliates. All rights reserved.
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
#
# This code is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License version 2 only, as
# published by the Free Software Foundation. Oracle designates this
# particular file as subject to the "Classpath" exception as provided
# by Oracle in the LICENSE file that accompanied this code.
#
# This code is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# version 2 for more details (a copy is included in the LICENSE file that
# accompanied this code).
#
# You should have received a copy of the GNU General Public License version
# 2 along with this work; if not, write to the Free Software Foundation,
# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
#
# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
# or visit www.oracle.com if you need additional information or have any
# questions.
#
default: all
include $(SPEC)
include MakeBase.gmk
##########################################################################################
### TZDB tool needs files from java.time.zone package
define tzdb_copyfiles
$(call MakeTargetDir)
$(RM) '$@'
$(SED) -e "s/package java.time.zone/package build.tools.tzdb/" \
< $(<) > $@
endef
$(eval $(call SetupCopyFiles,COPY_INTERIM_TZDB, \
SRC := $(TOPDIR)/src/java.base/share/classes/java/time/zone, \
DEST := $(BUILDTOOLS_OUTPUTDIR)/interim_tzdb_classes/build/tools/tzdb, \
FILES := ZoneRules.java ZoneOffsetTransition.java ZoneOffsetTransitionRule.java Ser.java, \
MACRO := tzdb_copyfiles))
##########################################################################################
all: $(COPY_INTERIM_TZDB)

8
make/Main.gmk
View File

@ -77,6 +77,10 @@ interim-rmic:
interim-cldrconverter:
+($(CD) $(TOPDIR)/make && $(MAKE) $(MAKE_ARGS) -f CopyInterimCLDRConverter.gmk)
interim-tzdb:
+($(CD) $(TOPDIR)/make && $(MAKE) $(MAKE_ARGS) -f CopyInterimTZDB.gmk)
buildtools-jdk:
+($(CD) $(TOPDIR)/make && $(MAKE) $(MAKE_ARGS) -f CompileToolsJdk.gmk)
@ -88,7 +92,7 @@ buildtools-hotspot:
+($(CD) $(TOPDIR)/make && $(MAKE) $(MAKE_ARGS) -f CompileToolsHotspot.gmk)
ALL_TARGETS += buildtools-langtools interim-langtools \
interim-rmic interim-cldrconverter buildtools-jdk buildtools-modules \
interim-rmic interim-cldrconverter interim-tzdb buildtools-jdk buildtools-modules \
buildtools-hotspot
################################################################################
@ -648,7 +652,7 @@ else
interim-langtools: $(INTERIM_LANGTOOLS_GENSRC_TARGETS)
buildtools-jdk: interim-langtools interim-cldrconverter
buildtools-jdk: interim-langtools interim-cldrconverter interim-tzdb
buildtools-hotspot: interim-langtools

3
make/RunTests.gmk
View File

@ -185,12 +185,13 @@ define SetupAotModuleBody
)
$$(call ExecuteWithLog, $$@.check, \
$$(FIXPATH) $$(JDK_UNDER_TEST)/bin/java \
$$($1_VM_OPTIONS) -XX:+UnlockDiagnosticVMOptions \
$$($1_VM_OPTIONS) -XX:+UnlockDiagnosticVMOptions -XX:+UnlockExperimentalVMOptions \
-XX:+PrintAOT -XX:+UseAOTStrictLoading \
-XX:AOTLibrary=$$@ -version \
> $$@.verify-aot \
)
$1_AOT_OPTIONS += -XX:+UnlockExperimentalVMOptions
$1_AOT_OPTIONS += -XX:AOTLibrary=$$($1_AOT_LIB)
$1_AOT_TARGETS += $$($1_AOT_LIB)
endef

3
make/common/Modules.gmk
View File

@ -1,5 +1,5 @@
#
# Copyright (c) 2014, 2018, Oracle and/or its affiliates. All rights reserved.
# Copyright (c) 2014, 2019, Oracle and/or its affiliates. All rights reserved.
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
#
# This code is free software; you can redistribute it and/or modify it
@ -64,6 +64,7 @@ BOOT_MODULES += \
jdk.management.jfr \
jdk.management.agent \
jdk.net \
jdk.nio.mapmode \
jdk.sctp \
jdk.unsupported \
#

38
make/common/ZipArchive.gmk
View File

@ -54,14 +54,17 @@ endif
SetupZipArchive = $(NamedParamsMacroTemplate)
define SetupZipArchiveBody
# Create a version $1_SRC with a guaranteed trailing slash
$1_SRC_SLASH := $$(addsuffix /, $$(patsubst %/, %, $$($1_SRC)))
# To avoid running find over too large sets of files, which causes make to crash
# on some configurations (cygwin), use INCLUDES and INCLUDE_FILES to build a set
# of directories to run find in, if available.
ifneq ($$($1_INCLUDES)$$($1_INCLUDE_FILES),)
$1_FIND_LIST := $$(wildcard $$(foreach i,$$($1_SRC), \
$$(addprefix $$i/,$$($1_INCLUDES) $$($1_INCLUDE_FILES))))
$1_FIND_LIST := $$(wildcard $$(foreach s,$$($1_SRC_SLASH), \
$$(addprefix $$s,$$($1_INCLUDES) $$($1_INCLUDE_FILES))))
else
$1_FIND_LIST := $$($1_SRC)
$1_FIND_LIST := $$($1_SRC_SLASH)
endif
# Find all files in the source tree.
@ -96,15 +99,15 @@ define SetupZipArchiveBody
endif
ifneq ($$($1_EXCLUDES),)
$1_ZIP_EXCLUDES := $$(addprefix -x$(SPACE)$(DQUOTE),$$(addsuffix /*$(DQUOTE),$$($1_EXCLUDES)))
$1_SRC_EXCLUDES := $$(foreach i,$$($1_SRC),$$(addprefix $$i/,$$(addsuffix /%,$$($1_EXCLUDES))))
$1_SRC_EXCLUDES := $$(foreach s,$$($1_SRC_SLASH),$$(addprefix $$s,$$(addsuffix /%,$$($1_EXCLUDES))))
$1_ALL_SRCS := $$(filter-out $$($1_SRC_EXCLUDES),$$($1_ALL_SRCS))
endif
ifneq ($$($1_EXCLUDE_FILES),)
$1_SRC_EXCLUDE_FILES := $$(addprefix %, $$($1_EXCLUDE_FILES)) $$($1_EXCLUDE_FILES)
$1_ALL_SRCS := $$(filter-out $$($1_SRC_EXCLUDE_FILES), $$($1_ALL_SRCS))
$$(foreach s, $$($1_SRC), \
$$(foreach s, $$($1_SRC_SLASH), \
$$(eval $1_ZIP_EXCLUDES_$$s += \
$$(addprefix -x$$(SPACE), $$(patsubst $$s/%,%, $$($1_EXCLUDE_FILES))) \
$$(addprefix -x$$(SPACE), $$(patsubst $$s%,%, $$($1_EXCLUDE_FILES))) \
) \
)
endif
@ -113,7 +116,7 @@ define SetupZipArchiveBody
$1_ZIP_EXCLUDES += $$(addprefix -x$(SPACE), $$(subst %,\*,$$($1_EXCLUDE_PATTERNS)))
endif
# Rewrite src dir specific exclude patterns to zip excludes
$$(foreach s, $$($1_SRC), \
$$(foreach s, $$($1_SRC_SLASH), \
$$(if $$($1_EXCLUDE_PATTERNS_$$s), \
$$(eval $1_ZIP_EXCLUDES_$$s += \
$$(addprefix -x$$(SPACE), $$(subst %,\*,$$($1_EXCLUDE_PATTERNS_$$s))) \
@ -134,7 +137,26 @@ define SetupZipArchiveBody
$$($1_ZIP) : $$($1_ALL_SRCS) $$($1_EXTRA_DEPS)
$$(call LogWarn, Updating $$($1_NAME))
$$(call MakeTargetDir)
$$(foreach s,$$($1_SRC), $$(call ExecuteWithLog, \
# Find duplicate file names in the SRC and generate excludes for all
# instances that should not be included. Run this rather expensive
# calculation as part of the recipe to avoid running it when nothing
# needs to be rebuilt. The drawback is that we cannot exclude these
# files from the make prerequisites list, but the number of files is
# usually small so a very rare unnecessary rebuild is worth it.
# (The inner most foreach here is used instead of eval to declare a
# local variable.)
$$(foreach root, $$($1_SRC_SLASH), \
$$(foreach file, $$(filter $$(root)%, $$($1_ALL_SRCS)), \
$$(foreach relfile, $$(patsubst $$(root)%, %, $$(file)), \
$$(if $$($1_relfiles_$$(call DoubleDollar, $$(relfile))), \
$$(eval $1_ZIP_EXCLUDES_$$(root) += -x $$(relfile)) \
, \
$$(eval $1_relfiles_$$(call DoubleDollar, $$(relfile)) := 1) \
) \
) \
) \
)
$$(foreach s,$$($1_SRC_SLASH), $$(call ExecuteWithLog, \
$$(SUPPORT_OUTPUTDIR)/zip/$$(patsubst $$(OUTPUTDIR)/%,%, $$@), \
(cd $$s && $(ZIPEXE) -qru $$($1_ZIP_OPTIONS) $$@ . \
$$($1_ZIP_INCLUDES) $$($1_ZIP_EXCLUDES) -x \*_the.\* \

2
make/data/tzdata/VERSION
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@ -21,4 +21,4 @@
# or visit www.oracle.com if you need additional information or have any
# questions.
#
tzdata2019a
tzdata2019b

274
make/data/tzdata/africa
View File

@ -112,7 +112,7 @@ Rule Algeria 1980 only - Apr 25 0:00 1:00 S
Rule Algeria 1980 only - Oct 31 2:00 0 -
# Shanks & Pottenger give 0:09:20 for Paris Mean Time; go with Howse's
# more precise 0:09:21.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Africa/Algiers 0:12:12 - LMT 1891 Mar 15 0:01
0:09:21 - PMT 1911 Mar 11 # Paris Mean Time
0:00 Algeria WE%sT 1940 Feb 25 2:00
@ -147,7 +147,7 @@ Zone Africa/Algiers 0:12:12 - LMT 1891 Mar 15 0:01
# For now, ignore that and follow the 1911-05-26 Portuguese decree
# (see Europe/Lisbon).
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Atlantic/Cape_Verde -1:34:04 - LMT 1912 Jan 01 2:00u # Praia
-2:00 - -02 1942 Sep
-2:00 1:00 -01 1945 Oct 15
@ -158,7 +158,7 @@ Zone Atlantic/Cape_Verde -1:34:04 - LMT 1912 Jan 01 2:00u # Praia
# See Africa/Lagos.
# Chad
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Africa/Ndjamena 1:00:12 - LMT 1912 # N'Djamena
1:00 - WAT 1979 Oct 14
1:00 1:00 WAST 1980 Mar 8
@ -174,7 +174,7 @@ Zone Africa/Ndjamena 1:00:12 - LMT 1912 # N'Djamena
# See Africa/Lagos.
# Côte d'Ivoire / Ivory Coast
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Africa/Abidjan -0:16:08 - LMT 1912
0:00 - GMT
Link Africa/Abidjan Africa/Bamako # Mali
@ -379,7 +379,7 @@ Rule Egypt 2014 only - Jun 26 24:00 0 -
Rule Egypt 2014 only - Jul 31 24:00 1:00 S
Rule Egypt 2014 only - Sep lastThu 24:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Africa/Cairo 2:05:09 - LMT 1900 Oct
2:00 Egypt EE%sT
@ -437,7 +437,7 @@ Zone Africa/Cairo 2:05:09 - LMT 1900 Oct
# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S
Rule Ghana 1920 1942 - Sep 1 0:00 0:20 -
Rule Ghana 1920 1942 - Dec 31 0:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Africa/Accra -0:00:52 - LMT 1918
0:00 Ghana GMT/+0020
@ -451,13 +451,13 @@ Zone Africa/Accra -0:00:52 - LMT 1918
# evidently confusing the date of the Portuguese decree
# (see Europe/Lisbon) with the date that it took effect.
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Africa/Bissau -1:02:20 - LMT 1912 Jan 1 1:00u
-1:00 - -01 1975
0:00 - GMT
# Kenya
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Africa/Nairobi 2:27:16 - LMT 1928 Jul
3:00 - EAT 1930
2:30 - +0230 1940
@ -492,7 +492,7 @@ Link Africa/Nairobi Indian/Mayotte
# Use the abbreviation "MMT" before 1972, as the more-accurate numeric
# abbreviation "-004430" would be one byte over the POSIX limit.
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Africa/Monrovia -0:43:08 - LMT 1882
-0:43:08 - MMT 1919 Mar # Monrovia Mean Time
-0:44:30 - MMT 1972 Jan 7 # approximately MMT
@ -542,7 +542,7 @@ Rule Libya 1997 only - Apr 4 0:00 1:00 S
Rule Libya 1997 only - Oct 4 0:00 0 -
Rule Libya 2013 only - Mar lastFri 1:00 1:00 S
Rule Libya 2013 only - Oct lastFri 2:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Africa/Tripoli 0:52:44 - LMT 1920
1:00 Libya CE%sT 1959
2:00 - EET 1982
@ -652,7 +652,7 @@ Rule Mauritius 1982 only - Oct 10 0:00 1:00 -
Rule Mauritius 1983 only - Mar 21 0:00 0 -
Rule Mauritius 2008 only - Oct lastSun 2:00 1:00 -
Rule Mauritius 2009 only - Mar lastSun 2:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Indian/Mauritius 3:50:00 - LMT 1907 # Port Louis
4:00 Mauritius +04/+05
# Agalega Is, Rodriguez
@ -883,18 +883,24 @@ Zone Indian/Mauritius 3:50:00 - LMT 1907 # Port Louis
# the week end after.... The government does not announce yet the decision
# about this temporary change. But it s 99% sure that it will be the case,
# as in previous years. An unofficial survey was done these days, showing
# that 64% of asked peopke are ok for moving from +1 to +0 during Ramadan.
# that 64% of asked people are ok for moving from +1 to +0 during Ramadan.
# https://leconomiste.com/article/1035870-enquete-l-economiste-sunergia-64-des-marocains-plebiscitent-le-gmt-pendant-ramadan
# From Naoufal Semlali (2019-04-16):
# Morocco will be on GMT starting from Sunday, May 5th 2019 at 3am.
# The switch to GMT+1 will occur on Sunday, June 9th 2019 at 2am....
# http://fr.le360.ma/societe/voici-la-date-du-retour-a-lheure-legale-au-maroc-188222
#
# From Paul Eggert (2018-11-01):
# For now, guess that Morocco will fall back at 03:00 the last Sunday
# before Ramadan, and spring forward at 02:00 the first Sunday after
# From Paul Eggert (2019-05-20):
# This agrees with our 2018-11-01 guess that the Moroccan government
# would continue the practice of falling back at 03:00 the last Sunday
# before Ramadan, and of springing forward at 02:00 the first Sunday after
# Ramadan, as this has been the practice since 2012. To implement this,
# transition dates for 2019 through 2037 were determined by running the
# following program under GNU Emacs 26.1.
# transition dates for 2019 through 2087 were determined by running the
# following program under GNU Emacs 26.2.
# (let ((islamic-year 1440))
# (require 'cal-islam)
# (while (< islamic-year 1460)
# (while (< islamic-year 1511)
# (let ((a (calendar-islamic-to-absolute (list 9 1 islamic-year)))
# (b (calendar-islamic-to-absolute (list 10 1 islamic-year)))
# (sunday 0))
@ -941,7 +947,7 @@ Rule Morocco 2012 only - Aug 20 2:00 1:00 -
Rule Morocco 2012 only - Sep 30 3:00 0 -
Rule Morocco 2013 only - Jul 7 3:00 0 -
Rule Morocco 2013 only - Aug 10 2:00 1:00 -
Rule Morocco 2013 2017 - Oct lastSun 3:00 0 -
Rule Morocco 2013 2018 - Oct lastSun 3:00 0 -
Rule Morocco 2014 2018 - Mar lastSun 2:00 1:00 -
Rule Morocco 2014 only - Jun 28 3:00 0 -
Rule Morocco 2014 only - Aug 2 2:00 1:00 -
@ -953,53 +959,159 @@ Rule Morocco 2017 only - May 21 3:00 0 -
Rule Morocco 2017 only - Jul 2 2:00 1:00 -
Rule Morocco 2018 only - May 13 3:00 0 -
Rule Morocco 2018 only - Jun 17 2:00 1:00 -
Rule Morocco 2019 only - May 5 3:00 0 -
Rule Morocco 2019 only - Jun 9 2:00 1:00 -
Rule Morocco 2020 only - Apr 19 3:00 0 -
Rule Morocco 2020 only - May 24 2:00 1:00 -
Rule Morocco 2021 only - Apr 11 3:00 0 -
Rule Morocco 2021 only - May 16 2:00 1:00 -
Rule Morocco 2022 only - Mar 27 3:00 0 -
Rule Morocco 2022 only - May 8 2:00 1:00 -
Rule Morocco 2023 only - Mar 19 3:00 0 -
Rule Morocco 2023 only - Apr 23 2:00 1:00 -
Rule Morocco 2024 only - Mar 10 3:00 0 -
Rule Morocco 2024 only - Apr 14 2:00 1:00 -
Rule Morocco 2025 only - Feb 23 3:00 0 -
Rule Morocco 2025 only - Apr 6 2:00 1:00 -
Rule Morocco 2026 only - Feb 15 3:00 0 -
Rule Morocco 2026 only - Mar 22 2:00 1:00 -
Rule Morocco 2027 only - Feb 7 3:00 0 -
Rule Morocco 2027 only - Mar 14 2:00 1:00 -
Rule Morocco 2028 only - Jan 23 3:00 0 -
Rule Morocco 2028 only - Feb 27 2:00 1:00 -
Rule Morocco 2029 only - Jan 14 3:00 0 -
Rule Morocco 2029 only - Feb 18 2:00 1:00 -
Rule Morocco 2029 only - Dec 30 3:00 0 -
Rule Morocco 2030 only - Feb 10 2:00 1:00 -
Rule Morocco 2030 only - Dec 22 3:00 0 -
Rule Morocco 2031 only - Jan 26 2:00 1:00 -
Rule Morocco 2031 only - Dec 14 3:00 0 -
Rule Morocco 2032 only - Jan 18 2:00 1:00 -
Rule Morocco 2032 only - Nov 28 3:00 0 -
Rule Morocco 2033 only - Jan 9 2:00 1:00 -
Rule Morocco 2033 only - Nov 20 3:00 0 -
Rule Morocco 2033 only - Dec 25 2:00 1:00 -
Rule Morocco 2034 only - Nov 5 3:00 0 -
Rule Morocco 2034 only - Dec 17 2:00 1:00 -
Rule Morocco 2035 only - Oct 28 3:00 0 -
Rule Morocco 2035 only - Dec 2 2:00 1:00 -
Rule Morocco 2036 only - Oct 19 3:00 0 -
Rule Morocco 2036 only - Nov 23 2:00 1:00 -
Rule Morocco 2037 only - Oct 4 3:00 0 -
Rule Morocco 2037 only - Nov 15 2:00 1:00 -
Rule Morocco 2019 only - May 5 3:00 -1:00 -
Rule Morocco 2019 only - Jun 9 2:00 0 -
Rule Morocco 2020 only - Apr 19 3:00 -1:00 -
Rule Morocco 2020 only - May 24 2:00 0 -
Rule Morocco 2021 only - Apr 11 3:00 -1:00 -
Rule Morocco 2021 only - May 16 2:00 0 -
Rule Morocco 2022 only - Mar 27 3:00 -1:00 -
Rule Morocco 2022 only - May 8 2:00 0 -
Rule Morocco 2023 only - Mar 19 3:00 -1:00 -
Rule Morocco 2023 only - Apr 23 2:00 0 -
Rule Morocco 2024 only - Mar 10 3:00 -1:00 -
Rule Morocco 2024 only - Apr 14 2:00 0 -
Rule Morocco 2025 only - Feb 23 3:00 -1:00 -
Rule Morocco 2025 only - Apr 6 2:00 0 -
Rule Morocco 2026 only - Feb 15 3:00 -1:00 -
Rule Morocco 2026 only - Mar 22 2:00 0 -
Rule Morocco 2027 only - Feb 7 3:00 -1:00 -
Rule Morocco 2027 only - Mar 14 2:00 0 -
Rule Morocco 2028 only - Jan 23 3:00 -1:00 -
Rule Morocco 2028 only - Feb 27 2:00 0 -
Rule Morocco 2029 only - Jan 14 3:00 -1:00 -
Rule Morocco 2029 only - Feb 18 2:00 0 -
Rule Morocco 2029 only - Dec 30 3:00 -1:00 -
Rule Morocco 2030 only - Feb 10 2:00 0 -
Rule Morocco 2030 only - Dec 22 3:00 -1:00 -
Rule Morocco 2031 only - Jan 26 2:00 0 -
Rule Morocco 2031 only - Dec 14 3:00 -1:00 -
Rule Morocco 2032 only - Jan 18 2:00 0 -
Rule Morocco 2032 only - Nov 28 3:00 -1:00 -
Rule Morocco 2033 only - Jan 9 2:00 0 -
Rule Morocco 2033 only - Nov 20 3:00 -1:00 -
Rule Morocco 2033 only - Dec 25 2:00 0 -
Rule Morocco 2034 only - Nov 5 3:00 -1:00 -
Rule Morocco 2034 only - Dec 17 2:00 0 -
Rule Morocco 2035 only - Oct 28 3:00 -1:00 -
Rule Morocco 2035 only - Dec 2 2:00 0 -
Rule Morocco 2036 only - Oct 19 3:00 -1:00 -
Rule Morocco 2036 only - Nov 23 2:00 0 -
Rule Morocco 2037 only - Oct 4 3:00 -1:00 -
Rule Morocco 2037 only - Nov 15 2:00 0 -
Rule Morocco 2038 only - Sep 26 3:00 -1:00 -
Rule Morocco 2038 only - Oct 31 2:00 0 -
Rule Morocco 2039 only - Sep 18 3:00 -1:00 -
Rule Morocco 2039 only - Oct 23 2:00 0 -
Rule Morocco 2040 only - Sep 2 3:00 -1:00 -
Rule Morocco 2040 only - Oct 14 2:00 0 -
Rule Morocco 2041 only - Aug 25 3:00 -1:00 -
Rule Morocco 2041 only - Sep 29 2:00 0 -
Rule Morocco 2042 only - Aug 10 3:00 -1:00 -
Rule Morocco 2042 only - Sep 21 2:00 0 -
Rule Morocco 2043 only - Aug 2 3:00 -1:00 -
Rule Morocco 2043 only - Sep 6 2:00 0 -
Rule Morocco 2044 only - Jul 24 3:00 -1:00 -
Rule Morocco 2044 only - Aug 28 2:00 0 -
Rule Morocco 2045 only - Jul 9 3:00 -1:00 -
Rule Morocco 2045 only - Aug 20 2:00 0 -
Rule Morocco 2046 only - Jul 1 3:00 -1:00 -
Rule Morocco 2046 only - Aug 5 2:00 0 -
Rule Morocco 2047 only - Jun 23 3:00 -1:00 -
Rule Morocco 2047 only - Jul 28 2:00 0 -
Rule Morocco 2048 only - Jun 7 3:00 -1:00 -
Rule Morocco 2048 only - Jul 19 2:00 0 -
Rule Morocco 2049 only - May 30 3:00 -1:00 -
Rule Morocco 2049 only - Jul 4 2:00 0 -
Rule Morocco 2050 only - May 15 3:00 -1:00 -
Rule Morocco 2050 only - Jun 26 2:00 0 -
Rule Morocco 2051 only - May 7 3:00 -1:00 -
Rule Morocco 2051 only - Jun 11 2:00 0 -
Rule Morocco 2052 only - Apr 28 3:00 -1:00 -
Rule Morocco 2052 only - Jun 2 2:00 0 -
Rule Morocco 2053 only - Apr 13 3:00 -1:00 -
Rule Morocco 2053 only - May 25 2:00 0 -
Rule Morocco 2054 only - Apr 5 3:00 -1:00 -
Rule Morocco 2054 only - May 10 2:00 0 -
Rule Morocco 2055 only - Mar 28 3:00 -1:00 -
Rule Morocco 2055 only - May 2 2:00 0 -
Rule Morocco 2056 only - Mar 12 3:00 -1:00 -
Rule Morocco 2056 only - Apr 23 2:00 0 -
Rule Morocco 2057 only - Mar 4 3:00 -1:00 -
Rule Morocco 2057 only - Apr 8 2:00 0 -
Rule Morocco 2058 only - Feb 17 3:00 -1:00 -
Rule Morocco 2058 only - Mar 31 2:00 0 -
Rule Morocco 2059 only - Feb 9 3:00 -1:00 -
Rule Morocco 2059 only - Mar 16 2:00 0 -
Rule Morocco 2060 only - Feb 1 3:00 -1:00 -
Rule Morocco 2060 only - Mar 7 2:00 0 -
Rule Morocco 2061 only - Jan 16 3:00 -1:00 -
Rule Morocco 2061 only - Feb 27 2:00 0 -
Rule Morocco 2062 only - Jan 8 3:00 -1:00 -
Rule Morocco 2062 only - Feb 12 2:00 0 -
Rule Morocco 2062 only - Dec 31 3:00 -1:00 -
Rule Morocco 2063 only - Feb 4 2:00 0 -
Rule Morocco 2063 only - Dec 16 3:00 -1:00 -
Rule Morocco 2064 only - Jan 20 2:00 0 -
Rule Morocco 2064 only - Dec 7 3:00 -1:00 -
Rule Morocco 2065 only - Jan 11 2:00 0 -
Rule Morocco 2065 only - Nov 22 3:00 -1:00 -
Rule Morocco 2066 only - Jan 3 2:00 0 -
Rule Morocco 2066 only - Nov 14 3:00 -1:00 -
Rule Morocco 2066 only - Dec 19 2:00 0 -
Rule Morocco 2067 only - Nov 6 3:00 -1:00 -
Rule Morocco 2067 only - Dec 11 2:00 0 -
Rule Morocco 2068 only - Oct 21 3:00 -1:00 -
Rule Morocco 2068 only - Dec 2 2:00 0 -
Rule Morocco 2069 only - Oct 13 3:00 -1:00 -
Rule Morocco 2069 only - Nov 17 2:00 0 -
Rule Morocco 2070 only - Oct 5 3:00 -1:00 -
Rule Morocco 2070 only - Nov 9 2:00 0 -
Rule Morocco 2071 only - Sep 20 3:00 -1:00 -
Rule Morocco 2071 only - Oct 25 2:00 0 -
Rule Morocco 2072 only - Sep 11 3:00 -1:00 -
Rule Morocco 2072 only - Oct 16 2:00 0 -
Rule Morocco 2073 only - Aug 27 3:00 -1:00 -
Rule Morocco 2073 only - Oct 8 2:00 0 -
Rule Morocco 2074 only - Aug 19 3:00 -1:00 -
Rule Morocco 2074 only - Sep 23 2:00 0 -
Rule Morocco 2075 only - Aug 11 3:00 -1:00 -
Rule Morocco 2075 only - Sep 15 2:00 0 -
Rule Morocco 2076 only - Jul 26 3:00 -1:00 -
Rule Morocco 2076 only - Sep 6 2:00 0 -
Rule Morocco 2077 only - Jul 18 3:00 -1:00 -
Rule Morocco 2077 only - Aug 22 2:00 0 -
Rule Morocco 2078 only - Jul 10 3:00 -1:00 -
Rule Morocco 2078 only - Aug 14 2:00 0 -
Rule Morocco 2079 only - Jun 25 3:00 -1:00 -
Rule Morocco 2079 only - Jul 30 2:00 0 -
Rule Morocco 2080 only - Jun 16 3:00 -1:00 -
Rule Morocco 2080 only - Jul 21 2:00 0 -
Rule Morocco 2081 only - Jun 1 3:00 -1:00 -
Rule Morocco 2081 only - Jul 13 2:00 0 -
Rule Morocco 2082 only - May 24 3:00 -1:00 -
Rule Morocco 2082 only - Jun 28 2:00 0 -
Rule Morocco 2083 only - May 16 3:00 -1:00 -
Rule Morocco 2083 only - Jun 20 2:00 0 -
Rule Morocco 2084 only - Apr 30 3:00 -1:00 -
Rule Morocco 2084 only - Jun 11 2:00 0 -
Rule Morocco 2085 only - Apr 22 3:00 -1:00 -
Rule Morocco 2085 only - May 27 2:00 0 -
Rule Morocco 2086 only - Apr 14 3:00 -1:00 -
Rule Morocco 2086 only - May 19 2:00 0 -
Rule Morocco 2087 only - Mar 30 3:00 -1:00 -
Rule Morocco 2087 only - May 4 2:00 0 -
# For dates after the somewhat-arbitrary cutoff of 2087, assume that
# Morocco will no longer observe DST. At some point this table will
# need to be extended, though quite possibly Morocco will change the
# rules first.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Africa/Casablanca -0:30:20 - LMT 1913 Oct 26
0:00 Morocco +00/+01 1984 Mar 16
1:00 - +01 1986
0:00 Morocco +00/+01 2018 Oct 28 3:00
0:00 Morocco +00/+01
1:00 Morocco +01/+00
# Western Sahara
#
@ -1015,7 +1127,7 @@ Zone Africa/Casablanca -0:30:20 - LMT 1913 Oct 26
Zone Africa/El_Aaiun -0:52:48 - LMT 1934 Jan # El Aaiún
-1:00 - -01 1976 Apr 14
0:00 Morocco +00/+01 2018 Oct 28 3:00
0:00 Morocco +00/+01
1:00 Morocco +01/+00
# Mozambique
#
@ -1024,7 +1136,7 @@ Zone Africa/El_Aaiun -0:52:48 - LMT 1934 Jan # El Aaiún
# https://dre.pt/pdf1sdip/1911/05/12500/23132313.pdf
# merely made it official?
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Africa/Maputo 2:10:20 - LMT 1903 Mar
2:00 - CAT
Link Africa/Maputo Africa/Blantyre # Malawi
@ -1087,37 +1199,37 @@ Link Africa/Maputo Africa/Lusaka # Zambia
# RULE NAME FROM TO TYPE IN ON AT SAVE LETTER/S
# Vanguard section, for zic and other parsers that support negative DST.
#Rule Namibia 1994 only - Mar 21 0:00 -1:00 WAT
#Rule Namibia 1994 2017 - Sep Sun>=1 2:00 0 CAT
#Rule Namibia 1995 2017 - Apr Sun>=1 2:00 -1:00 WAT
Rule Namibia 1994 only - Mar 21 0:00 -1:00 WAT
Rule Namibia 1994 2017 - Sep Sun>=1 2:00 0 CAT
Rule Namibia 1995 2017 - Apr Sun>=1 2:00 -1:00 WAT
# Rearguard section, for parsers that do not support negative DST.
Rule Namibia 1994 only - Mar 21 0:00 0 WAT
Rule Namibia 1994 2017 - Sep Sun>=1 2:00 1:00 CAT
Rule Namibia 1995 2017 - Apr Sun>=1 2:00 0 WAT
#Rule Namibia 1994 only - Mar 21 0:00 0 WAT
#Rule Namibia 1994 2017 - Sep Sun>=1 2:00 1:00 CAT
#Rule Namibia 1995 2017 - Apr Sun>=1 2:00 0 WAT
# End of rearguard section.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Africa/Windhoek 1:08:24 - LMT 1892 Feb 8
1:30 - +0130 1903 Mar
2:00 - SAST 1942 Sep 20 2:00
2:00 1:00 SAST 1943 Mar 21 2:00
2:00 - SAST 1990 Mar 21 # independence
# Vanguard section, for zic and other parsers that support negative DST.
# 2:00 Namibia %s
2:00 Namibia %s
# Rearguard section, for parsers that do not support negative DST.
2:00 - CAT 1994 Mar 21 0:00
# 2:00 - CAT 1994 Mar 21 0:00
# From Paul Eggert (2017-04-07):
# The official date of the 2017 rule change was 2017-10-24. See:
# http://www.lac.org.na/laws/annoSTAT/Namibian%20Time%20Act%209%20of%202017.pdf
1:00 Namibia %s 2017 Oct 24
2:00 - CAT
# 1:00 Namibia %s 2017 Oct 24
# 2:00 - CAT
# End of rearguard section.
# Niger
# See Africa/Lagos.
# Nigeria
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Africa/Lagos 0:13:36 - LMT 1919 Sep
1:00 - WAT
Link Africa/Lagos Africa/Bangui # Central African Republic
@ -1131,7 +1243,7 @@ Link Africa/Lagos Africa/Niamey # Niger
Link Africa/Lagos Africa/Porto-Novo # Benin
# Réunion
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Indian/Reunion 3:41:52 - LMT 1911 Jun # Saint-Denis
4:00 - +04
#
@ -1191,7 +1303,7 @@ Zone Africa/Sao_Tome 0:26:56 - LMT 1884
# See Africa/Abidjan.
# Seychelles
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Indian/Mahe 3:41:48 - LMT 1906 Jun # Victoria
4:00 - +04
# From Paul Eggert (2001-05-30):
@ -1211,7 +1323,7 @@ Zone Indian/Mahe 3:41:48 - LMT 1906 Jun # Victoria
# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S
Rule SA 1942 1943 - Sep Sun>=15 2:00 1:00 -
Rule SA 1943 1944 - Mar Sun>=15 2:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Africa/Johannesburg 1:52:00 - LMT 1892 Feb 8
1:30 - SAST 1903 Mar
2:00 SA SAST
@ -1246,14 +1358,14 @@ Rule Sudan 1970 only - May 1 0:00 1:00 S
Rule Sudan 1970 1985 - Oct 15 0:00 0 -
Rule Sudan 1971 only - Apr 30 0:00 1:00 S
Rule Sudan 1972 1985 - Apr lastSun 0:00 1:00 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Africa/Khartoum 2:10:08 - LMT 1931
2:00 Sudan CA%sT 2000 Jan 15 12:00
3:00 - EAT 2017 Nov 1
2:00 - CAT
# South Sudan
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Africa/Juba 2:06:28 - LMT 1931
2:00 Sudan CA%sT 2000 Jan 15 12:00
3:00 - EAT
@ -1359,7 +1471,7 @@ Rule Tunisia 2006 2008 - Oct lastSun 2:00s 0 -
# Shanks & Pottenger give 0:09:20 for Paris Mean Time; go with Howse's
# more precise 0:09:21.
# Shanks & Pottenger say the 1911 switch was on Mar 9; go with Howse's Mar 11.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Africa/Tunis 0:40:44 - LMT 1881 May 12
0:09:21 - PMT 1911 Mar 11 # Paris Mean Time
1:00 Tunisia CE%sT

14
make/data/tzdata/antarctica
View File

@ -36,7 +36,7 @@
# for information.
# Unless otherwise specified, we have no time zone information.
# FORMAT is '-00' and GMTOFF is 0 for locations while uninhabited.
# FORMAT is '-00' and STDOFF is 0 for locations while uninhabited.
# Argentina - year-round bases
# Belgrano II, Confin Coast, -770227-0343737, since 1972-02-05
@ -93,7 +93,7 @@
# Australian Antarctica Division informed us that Casey changed time
# zone to UTC+11 in "the morning of 22nd October 2016".
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Antarctica/Casey 0 - -00 1969
8:00 - +08 2009 Oct 18 2:00
11:00 - +11 2010 Mar 5 2:00
@ -165,7 +165,7 @@ Zone Antarctica/Mawson 0 - -00 1954 Feb 13
# St Paul Island - near Amsterdam, uninhabited
# fishing stations operated variously 1819/1931
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Indian/Kerguelen 0 - -00 1950 # Port-aux-Français
5:00 - +05
#
@ -176,7 +176,7 @@ Zone Indian/Kerguelen 0 - -00 1950 # Port-aux-Français
# Another base at Port-Martin, 50km east, began operation in 1947.
# It was destroyed by fire on 1952-01-14.
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Antarctica/DumontDUrville 0 - -00 1947
10:00 - +10 1952 Jan 14
0 - -00 1956 Nov
@ -204,7 +204,7 @@ Zone Antarctica/DumontDUrville 0 - -00 1947
# Syowa station, which is the first antarctic station of Japan,
# was established on 1957-01-29. Since Syowa station is still the main
# station of Japan, it's appropriate for the principal location.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Antarctica/Syowa 0 - -00 1957 Jan 29
3:00 - +03
# See:
@ -254,7 +254,7 @@ Rule Troll 2005 max - Mar lastSun 1:00u 2:00 +02
#Rule Troll 2004 max - Nov 7 1:00u 0:00 +00
# Remove the following line when uncommenting the above '#Rule' lines.
Rule Troll 2004 max - Oct lastSun 1:00u 0:00 +00
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Antarctica/Troll 0 - -00 2005 Feb 12
0:00 Troll %s
@ -328,7 +328,7 @@ Zone Antarctica/Vostok 0 - -00 1957 Dec 16
# From Paul Eggert (2002-10-22)
# <http://webexhibits.org/daylightsaving/g.html> says Rothera is -03 all year.
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Antarctica/Rothera 0 - -00 1976 Dec 1
-3:00 - -03

218
make/data/tzdata/asia
View File

@ -107,7 +107,7 @@ Rule RussiaAsia 1985 2010 - Mar lastSun 2:00s 1:00 -
Rule RussiaAsia 1996 2010 - Oct lastSun 2:00s 0 -
# Afghanistan
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Kabul 4:36:48 - LMT 1890
4:00 - +04 1945
4:30 - +0430
@ -140,7 +140,7 @@ Zone Asia/Kabul 4:36:48 - LMT 1890
# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S
Rule Armenia 2011 only - Mar lastSun 2:00s 1:00 -
Rule Armenia 2011 only - Oct lastSun 2:00s 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Yerevan 2:58:00 - LMT 1924 May 2
3:00 - +03 1957 Mar
4:00 RussiaAsia +04/+05 1991 Mar 31 2:00s
@ -166,7 +166,7 @@ Zone Asia/Yerevan 2:58:00 - LMT 1924 May 2
# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S
Rule Azer 1997 2015 - Mar lastSun 4:00 1:00 -
Rule Azer 1997 2015 - Oct lastSun 5:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Baku 3:19:24 - LMT 1924 May 2
3:00 - +03 1957 Mar
4:00 RussiaAsia +04/+05 1991 Mar 31 2:00s
@ -254,7 +254,7 @@ Zone Asia/Baku 3:19:24 - LMT 1924 May 2
Rule Dhaka 2009 only - Jun 19 23:00 1:00 -
Rule Dhaka 2009 only - Dec 31 24:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Dhaka 6:01:40 - LMT 1890
5:53:20 - HMT 1941 Oct # Howrah Mean Time?
6:30 - +0630 1942 May 15
@ -264,7 +264,7 @@ Zone Asia/Dhaka 6:01:40 - LMT 1890
6:00 Dhaka +06/+07
# Bhutan
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Thimphu 5:58:36 - LMT 1947 Aug 15 # or Thimbu
5:30 - +0530 1987 Oct
6:00 - +06
@ -275,13 +275,13 @@ Zone Asia/Thimphu 5:58:36 - LMT 1947 Aug 15 # or Thimbu
# We have no information as to when standard time was introduced;
# assume it occurred in 1907, the same year as Mauritius (which
# then contained the Chagos Archipelago).
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Indian/Chagos 4:49:40 - LMT 1907
5:00 - +05 1996
6:00 - +06
# Brunei
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Brunei 7:39:40 - LMT 1926 Mar # Bandar Seri Begawan
7:30 - +0730 1933
8:00 - +08
@ -296,7 +296,7 @@ Zone Asia/Brunei 7:39:40 - LMT 1926 Mar # Bandar Seri Begawan
# of Greenwich." This refers to the period before Burma's transition to +0630,
# a transition for which Shanks is the only source.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Yangon 6:24:47 - LMT 1880 # or Rangoon
6:24:47 - RMT 1920 # Rangoon local time
6:30 - +0630 1942 May
@ -584,7 +584,7 @@ Rule PRC 1987 1991 - Apr Sun>=11 2:00 1:00 D
# that the sort of users who prefer Asia/Urumqi now typically ignored the
# +08 mandate back then.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
# Beijing time, used throughout China; represented by Shanghai.
Zone Asia/Shanghai 8:05:43 - LMT 1901
8:00 Shang C%sT 1949 May 28
@ -675,11 +675,41 @@ Zone Asia/Urumqi 5:50:20 - LMT 1928
# https://i.imgur.com/05KkvtC.png
# * 1941-09-30, Hong Kong Daily Press, Winter Time Warning.
# https://i.imgur.com/dge4kFJ.png
# Also, the Liberation day of Hong Kong after WWII which British rule
# over the territory resumed was August 30, 1945, which I think should
# be the termination date for the use of JST in the territory....
# From Paul Eggert (2018-11-17):
# From P Chan (2018-12-31):
# * According to the Hong Kong Daylight-Saving Regulations, 1941, the
# 1941 spring-forward transition was at 03:00.
# http://sunzi.lib.hku.hk/hkgro/view/g1941/304271.pdf
# http://sunzi.lib.hku.hk/hkgro/view/g1941/305516.pdf
# * According to some articles from South China Morning Post, +08 was
# resumed on 1945-11-18 at 02:00.
# https://i.imgur.com/M2IsZ3c.png
# https://i.imgur.com/iOPqrVo.png
# https://i.imgur.com/fffcGDs.png
# * Some newspapers ... said the 1946 spring-forward transition was on
# 04-21 at 00:00. The Kung Sheung Evening News 1946-04-20 (Chinese)
# https://i.imgur.com/ZSzent0.png
# https://mmis.hkpl.gov.hk///c/portal/cover?c=QF757YsWv5%2FH7zGe%2FKF%2BFLYsuqGhRBfe p.4
# The Kung Sheung Daily News 1946-04-21 (Chinese)
# https://i.imgur.com/7ecmRlcm.png
# https://mmis.hkpl.gov.hk///c/portal/cover?c=QF757YsWv5%2BQBGt1%2BwUj5qG2GqtwR3Wh p.4
# * According to the Summer Time Ordinance (1946), the fallback
# transitions between 1946 and 1952 were at 03:30 Standard Time (+08)
# http://oelawhk.lib.hku.hk/archive/files/bb74b06a74d5294620a15de560ab33c6.pdf
# * Some other laws and regulations related to DST from 1953 to 1979
# Summer Time Ordinance 1953
# https://i.imgur.com/IOlJMav.jpg
# Summer Time (Amendment) Ordinance 1965
# https://i.imgur.com/8rofeLa.jpg
# Interpretation and General Clauses Ordinance (1966)
# https://i.imgur.com/joy3msj.jpg
# Emergency (Summer Time) Regulation 1973 <https://i.imgur.com/OpRWrKz.jpg>
# Interpretation and General Clauses (Amendment) Ordinance 1977
# https://i.imgur.com/RaNqnc4.jpg
# Resolution of the Legislative Council passed on 9 May 1979
# https://www.legco.gov.hk/yr78-79/english/lc_sitg/hansard/h790509.pdf#page=39
# From Paul Eggert (2019-05-31):
# Here are the dates given at
# https://www.hko.gov.hk/gts/time/Summertime.htm
# as of 2014-06-19:
@ -690,7 +720,7 @@ Zone Asia/Urumqi 5:50:20 - LMT 1928
# 1944 Whole year
# 1945 Whole year
# 1946 20 Apr to 1 Dec
# 1947 13 Apr to 30 Dec
# 1947 13 Apr to 30 Nov
# 1948 2 May to 31 Oct
# 1949 3 Apr to 30 Oct
# 1950 2 Apr to 29 Oct
@ -727,36 +757,28 @@ Zone Asia/Urumqi 5:50:20 - LMT 1928
# The page does not give times of day for transitions,
# or dates for the 1942 and 1945 transitions.
# The Japanese occupation of Hong Kong began 1941-12-25.
# The Japanese surrender of Hong Kong was signed 1945-09-16; see:
# Heaver S. The days after the Pacific war ended: unsettling times
# in Hong Kong. Post Magazine. 2016-06-13.
# https://www.scmp.com/magazines/post-magazine/article/1852990/days-after-pacific-war-ended-unsettling-times-hong-kong
# For lack of anything better, use start of those days as the
# transition times.
# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S
Rule HK 1946 only - Apr 20 3:30 1:00 S
Rule HK 1946 only - Dec 1 3:30 0 -
Rule HK 1947 only - Apr 13 3:30 1:00 S
Rule HK 1947 only - Dec 30 3:30 0 -
Rule HK 1948 only - May 2 3:30 1:00 S
Rule HK 1948 1951 - Oct lastSun 3:30 0 -
Rule HK 1952 1953 - Nov Sun>=1 3:30 0 -
Rule HK 1946 only - Apr 21 0:00 1:00 S
Rule HK 1946 only - Dec 1 3:30s 0 -
Rule HK 1947 only - Apr 13 3:30s 1:00 S
Rule HK 1947 only - Nov 30 3:30s 0 -
Rule HK 1948 only - May 2 3:30s 1:00 S
Rule HK 1948 1952 - Oct Sun>=28 3:30s 0 -
Rule HK 1949 1953 - Apr Sun>=1 3:30 1:00 S
Rule HK 1953 1964 - Oct Sun>=31 3:30 0 -
Rule HK 1954 1964 - Mar Sun>=18 3:30 1:00 S
Rule HK 1954 only - Oct 31 3:30 0 -
Rule HK 1955 1964 - Nov Sun>=1 3:30 0 -
Rule HK 1965 1976 - Apr Sun>=16 3:30 1:00 S
Rule HK 1965 1976 - Oct Sun>=16 3:30 0 -
Rule HK 1973 only - Dec 30 3:30 1:00 S
Rule HK 1979 only - May Sun>=8 3:30 1:00 S
Rule HK 1979 only - Oct Sun>=16 3:30 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
Rule HK 1979 only - May 13 3:30 1:00 S
Rule HK 1979 only - Oct 21 3:30 0 -
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Hong_Kong 7:36:42 - LMT 1904 Oct 30 0:36:42
8:00 - HKT 1941 Jun 15 3:30
8:00 - HKT 1941 Jun 15 3:00
8:00 1:00 HKST 1941 Oct 1 4:00
8:30 - HKT 1941 Dec 25
9:00 - JST 1945 Sep 16
9:00 - JST 1945 Nov 18 2:00
8:00 HK HK%sT
###############################################################################
@ -880,7 +902,7 @@ Rule Taiwan 1974 1975 - Oct 1 0:00 0 S
Rule Taiwan 1979 only - Jul 1 0:00 1:00 D
Rule Taiwan 1979 only - Oct 1 0:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
# Taipei or Taibei or T'ai-pei
Zone Asia/Taipei 8:06:00 - LMT 1896 Jan 1
8:00 - CST 1937 Oct 1
@ -1018,7 +1040,7 @@ Rule Macau 1975 1976 - Apr Sun>=16 03:30 1:00 D
Rule Macau 1979 only - May 13 03:30 1:00 D
Rule Macau 1979 only - Oct Sun>=16 03:30 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Macau 7:34:10 - LMT 1904 Oct 30
8:00 - CST 1941 Dec 21 23:00
9:00 Macau +09/+10 1945 Sep 30 24:00
@ -1057,7 +1079,7 @@ Rule Cyprus 1977 only - Sep 25 0:00 0 -
Rule Cyprus 1978 only - Oct 2 0:00 0 -
Rule Cyprus 1979 1997 - Sep lastSun 0:00 0 -
Rule Cyprus 1981 1998 - Mar lastSun 0:00 1:00 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Nicosia 2:13:28 - LMT 1921 Nov 14
2:00 Cyprus EE%sT 1998 Sep
2:00 EUAsia EE%sT
@ -1106,7 +1128,7 @@ Link Asia/Nicosia Europe/Nicosia
# Byalokoz 1919 says Georgia was 2:59:11.
# Go with Byalokoz.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Tbilisi 2:59:11 - LMT 1880
2:59:11 - TBMT 1924 May 2 # Tbilisi Mean Time
3:00 - +03 1957 Mar
@ -1143,7 +1165,7 @@ Zone Asia/Tbilisi 2:59:11 - LMT 1880
# which will be permanent, with no seasonal adjustment, will happen at
# midnight on Saturday, September 16.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Dili 8:22:20 - LMT 1912 Jan 1
8:00 - +08 1942 Feb 21 23:00
9:00 - +09 1976 May 3
@ -1209,7 +1231,7 @@ Zone Asia/Dili 8:22:20 - LMT 1912 Jan 1
# time for 1870-1941. Shanks is our only (and dubious) source for the
# 1941-1945 data.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Kolkata 5:53:28 - LMT 1854 Jun 28 # Kolkata
5:53:20 - HMT 1870 # Howrah Mean Time?
5:21:10 - MMT 1906 Jan 1 # Madras local time
@ -1261,7 +1283,7 @@ Zone Asia/Kolkata 5:53:28 - LMT 1854 Jun 28 # Kolkata
# WITA - +08 - Waktu Indonesia Tengah (Indonesia central time)
# WIT - +09 - Waktu Indonesia Timur (Indonesia eastern time)
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
# Java, Sumatra
Zone Asia/Jakarta 7:07:12 - LMT 1867 Aug 10
# Shanks & Pottenger say the next transition was at 1924 Jan 1 0:13,
@ -1337,9 +1359,9 @@ Zone Asia/Jayapura 9:22:48 - LMT 1932 Nov
# I used the following code in GNU Emacs 26.1 to generate the "Rule Iran"
# lines from 2008 through 2087. Emacs 26.1 uses Ed Reingold's
# cal-persia implementation of Birashk's approximation, which in the
# 2008-2087 range disagrees with the the astronomical Persian calendar
# for Persian years 1404 (Gregorian 2025) and 1437 (Gregorian 2058),
# so the following code special-case those years. See Table 15.1, page 264, of:
# 2008-2087 range disagrees with the astronomical Persian calendar
# for Persian years 1404 (Gregorian 2025) and 1437 (Gregorian 2058), so
# the following code special-cases those years. See Table 15.1, page 264, of:
# Edward M. Reingold and Nachum Dershowitz, Calendrical Calculations:
# The Ultimate Edition, Cambridge University Press (2018).
# https://www.cambridge.org/fr/academic/subjects/computer-science/computing-general-interest/calendrical-calculations-ultimate-edition-4th-edition
@ -1533,7 +1555,7 @@ Rule Iran 2087 only - Sep 21 24:00 0 -
Rule Iran 2088 max - Mar 20 24:00 1:00 -
Rule Iran 2088 max - Sep 20 24:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Tehran 3:25:44 - LMT 1916
3:25:44 - TMT 1946 # Tehran Mean Time
3:30 - +0330 1977 Nov
@ -1578,7 +1600,7 @@ Rule Iraq 1986 1990 - Mar lastSun 1:00s 1:00 -
#
Rule Iraq 1991 2007 - Apr 1 3:00s 1:00 -
Rule Iraq 1991 2007 - Oct 1 3:00s 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Baghdad 2:57:40 - LMT 1890
2:57:36 - BMT 1918 # Baghdad Mean Time?
3:00 - +03 1982 May
@ -1645,7 +1667,7 @@ Rule Zion 1975 only - Apr 20 0:00 1:00 D
Rule Zion 1975 only - Aug 31 0:00 0 S
# From Alois Treindl (2019-03-06):
# http://www.moin.gov.il/Documents/שעון קיץ/clock-50-years-7-2014.pdf
# http://www.moin.gov.il/Documents/שעון%20קיץ/clock-50-years-7-2014.pdf
# From Isaac Starkman (2019-03-06):
# Summer time was in that period in 1980 and 1984, see
# https://www.ynet.co.il/articles/0,7340,L-3951073,00.html
@ -1783,32 +1805,15 @@ Rule Zion 2004 only - Sep 22 1:00 0 S
#
# ftp://ftp.cs.huji.ac.il/pub/tz/announcements/2005+beyond.ps
# From Paul Eggert (2012-10-26):
# I used Ephraim Silverberg's dst-israel.el program
# <ftp://ftp.cs.huji.ac.il/pub/tz/software/dst-israel.el> (2005-02-20)
# along with Ed Reingold's cal-hebrew in GNU Emacs 21.4,
# to generate the transitions from 2005 through 2012.
# (I replaced "lastFri" with "Fri>=26" by hand.)
# The spring transitions all correspond to the following Rule:
#
# Rule Zion 2005 2012 - Mar Fri>=26 2:00 1:00 D
#
# but older zic implementations (e.g., Solaris 8) do not support
# "Fri>=26" to mean April 1 in years like 2005, so for now we list the
# springtime transitions explicitly.
# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S
Rule Zion 2005 only - Apr 1 2:00 1:00 D
Rule Zion 2005 2012 - Apr Fri<=1 2:00 1:00 D
Rule Zion 2005 only - Oct 9 2:00 0 S
Rule Zion 2006 2010 - Mar Fri>=26 2:00 1:00 D
Rule Zion 2006 only - Oct 1 2:00 0 S
Rule Zion 2007 only - Sep 16 2:00 0 S
Rule Zion 2008 only - Oct 5 2:00 0 S
Rule Zion 2009 only - Sep 27 2:00 0 S
Rule Zion 2010 only - Sep 12 2:00 0 S
Rule Zion 2011 only - Apr 1 2:00 1:00 D
Rule Zion 2011 only - Oct 2 2:00 0 S
Rule Zion 2012 only - Mar Fri>=26 2:00 1:00 D
Rule Zion 2012 only - Sep 23 2:00 0 S
# From Ephraim Silverberg (2013-06-27):
@ -1824,7 +1829,7 @@ Rule Zion 2012 only - Sep 23 2:00 0 S
Rule Zion 2013 max - Mar Fri>=23 2:00 1:00 D
Rule Zion 2013 max - Oct lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Jerusalem 2:20:54 - LMT 1880
2:20:40 - JMT 1918 # Jerusalem Mean Time?
2:00 Zion I%sT
@ -1881,7 +1886,7 @@ Zone Asia/Jerusalem 2:20:54 - LMT 1880
# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S
Rule Japan 1948 only - May Sat>=1 24:00 1:00 D
Rule Japan 1948 1951 - Sep Sun>=9 1:00 0 S
Rule Japan 1948 1951 - Sep Sat>=8 25:00 0 S
Rule Japan 1949 only - Apr Sat>=1 24:00 1:00 D
Rule Japan 1950 1951 - May Sat>=1 24:00 1:00 D
@ -1916,7 +1921,7 @@ Rule Japan 1950 1951 - May Sat>=1 24:00 1:00 D
# Central Time (UT+9). The adoption began on Oct 1, 1937.
# https://ja.wikisource.org/wiki/明治二十八年勅令第百六十七號標準時ニ關スル件中改正ノ件
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Tokyo 9:18:59 - LMT 1887 Dec 31 15:00u
9:00 Japan J%sT
# Since 1938, all Japanese possessions have been like Asia/Tokyo,
@ -2019,7 +2024,7 @@ Rule Jordan 2006 2011 - Oct lastFri 0:00s 0 -
Rule Jordan 2013 only - Dec 20 0:00 0 -
Rule Jordan 2014 max - Mar lastThu 24:00 1:00 S
Rule Jordan 2014 max - Oct lastFri 0:00s 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Amman 2:23:44 - LMT 1931
2:00 Jordan EE%sT
@ -2060,8 +2065,8 @@ Zone Asia/Amman 2:23:44 - LMT 1931
# text.
#
# According to Izvestia newspaper No. 68 (23334) from 1991-03-20
# (page 6; available at http://libinfo.org/newsr/newsr2574.djvu via
# http://libinfo.org/index.php?id=58564) on 1991-03-31 at 2:00 during
# -- page 6; available at http://libinfo.org/newsr/newsr2574.djvu via
# http://libinfo.org/index.php?id=58564 -- on 1991-03-31 at 2:00 during
# transition to "summer" time:
# Republic of Georgia, Latvian SSR, Lithuanian SSR, SSR Moldova,
# Estonian SSR; Komi ASSR; Kaliningrad oblast; Nenets autonomous okrug
@ -2077,7 +2082,7 @@ Zone Asia/Amman 2:23:44 - LMT 1931
# Apparently there were last minute changes. Apparently Kazakh act No. 170
# was one of such changes.
#
# https://ru.wikipedia.org/wiki/Декретное время
# https://ru.wikipedia.org/wiki/Декретное_время
# claims that Sovetskaya Rossiya newspaper on 1991-03-29 published that
# Nenets autonomous okrug, Komi and Kazakhstan (excluding Uralsk oblast)
# were to not move clocks and Uralsk oblast was to move clocks
@ -2216,7 +2221,7 @@ Zone Asia/Amman 2:23:44 - LMT 1931
# UTC+6 to UTC+5 effective December 21st, 2018. The legal document is
# located here: http://adilet.zan.kz/rus/docs/P1800000817 (russian language).
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
#
# Almaty (formerly Alma-Ata), representing most locations in Kazakhstan
# This includes KZ-AKM, KZ-ALA, KZ-ALM, KZ-AST, KZ-BAY, KZ-VOS, KZ-ZHA,
@ -2318,7 +2323,7 @@ Rule Kyrgyz 1992 1996 - Apr Sun>=7 0:00s 1:00 -
Rule Kyrgyz 1992 1996 - Sep lastSun 0:00 0 -
Rule Kyrgyz 1997 2005 - Mar lastSun 2:30 1:00 -
Rule Kyrgyz 1997 2004 - Oct lastSun 2:30 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Bishkek 4:58:24 - LMT 1924 May 2
5:00 - +05 1930 Jun 21
6:00 RussiaAsia +06/+07 1991 Mar 31 2:00s
@ -2433,7 +2438,7 @@ Rule ROK 1987 1988 - Oct Sun>=8 3:00 0 S
# The BBC reported that the transition was from 23:30 to 24:00 today.
# https://www.bbc.com/news/world-asia-44010705
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Seoul 8:27:52 - LMT 1908 Apr 1
8:30 - KST 1912 Jan 1
9:00 - JST 1945 Sep 8
@ -2482,7 +2487,7 @@ Rule Lebanon 1992 only - Oct 4 0:00 0 -
Rule Lebanon 1993 max - Mar lastSun 0:00 1:00 S
Rule Lebanon 1993 1998 - Sep lastSun 0:00 0 -
Rule Lebanon 1999 max - Oct lastSun 0:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Beirut 2:22:00 - LMT 1880
2:00 Lebanon EE%sT
@ -2494,7 +2499,7 @@ Rule NBorneo 1935 1941 - Dec 14 0:00 0 -
# peninsular Malaysia
# taken from Mok Ly Yng (2003-10-30)
# http://www.math.nus.edu.sg/aslaksen/teaching/timezone.html
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Kuala_Lumpur 6:46:46 - LMT 1901 Jan 1
6:55:25 - SMT 1905 Jun 1 # Singapore M.T.
7:00 - +07 1933 Jan 1
@ -2508,7 +2513,7 @@ Zone Asia/Kuala_Lumpur 6:46:46 - LMT 1901 Jan 1
# From Paul Eggert (2014-08-12):
# The data entries here are mostly from Shanks & Pottenger, but the 1942, 1945
# and 1982 transition dates are from Mok Ly Yng.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Kuching 7:21:20 - LMT 1926 Mar
7:30 - +0730 1933
8:00 NBorneo +08/+0820 1942 Feb 16
@ -2516,7 +2521,7 @@ Zone Asia/Kuching 7:21:20 - LMT 1926 Mar
8:00 - +08
# Maldives
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Indian/Maldives 4:54:00 - LMT 1880 # Malé
4:54:00 - MMT 1960 # Malé Mean Time
5:00 - +05
@ -2659,7 +2664,7 @@ Rule Mongol 2002 2006 - Mar lastSat 2:00 1:00 -
Rule Mongol 2015 2016 - Mar lastSat 2:00 1:00 -
Rule Mongol 2015 2016 - Sep lastSat 0:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
# Hovd, a.k.a. Chovd, Dund-Us, Dzhargalant, Khovd, Jirgalanta
Zone Asia/Hovd 6:06:36 - LMT 1905 Aug
6:00 - +06 1978
@ -2677,7 +2682,7 @@ Zone Asia/Choibalsan 7:38:00 - LMT 1905 Aug
8:00 Mongol +08/+09
# Nepal
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Kathmandu 5:41:16 - LMT 1920
5:30 - +0530 1986
5:45 - +0545
@ -2827,7 +2832,7 @@ Rule Pakistan 2008 only - Jun 1 0:00 1:00 S
Rule Pakistan 2008 2009 - Nov 1 0:00 0 -
Rule Pakistan 2009 only - Apr 15 0:00 1:00 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Karachi 4:28:12 - LMT 1907
5:30 - +0530 1942 Sep
5:30 1:00 +0630 1945 Oct 15
@ -3114,13 +3119,21 @@ Zone Asia/Karachi 4:28:12 - LMT 1907
# http://www.palestinecabinet.gov.ps/Website/AR/NDecrees/ViewFile.ashx?ID=e7a42ab7-ee23-435a-b9c8-a4f7e81f3817
# From Even Scharning (2019-03-23):
# DST in Palestine will start on 30 March this year, not 23 March as the time
# zone database predicted.
# https://ramallah.news/post/123610
# http://pnn.ps/news/401130
# http://palweather.ps/ar/node/50136.html
#
# From Tim Parenti (2019-03-23):
# Combining this with the rules observed since 2016, adjust our spring
# transition guess to Mar Sat>=24.
# From Sharif Mustafa (2019-03-26):
# The Palestinian cabinet announced today that the switch to DST will
# be on Fri Mar 29th 2019 by advancing the clock by 60 minutes.
# The decree signing date is Mar 12th but it was not published till today.
# The decree does not specify the exact time of switch.
# http://palestinecabinet.gov.ps/Website/AR/NDecrees/ViewFile.ashx?ID=e54e9ea1-50ee-4137-84df-0d6c78da259b
#
# From Even Scharning (2019-04-10):
# Our source in Palestine said it happened Friday 29 at 00:00 local time....
#
# From Paul Eggert (2019-04-10):
# For now, guess spring-ahead transitions are March's last Friday at 00:00.
# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S
Rule EgyptAsia 1957 only - May 10 0:00 1:00 S
@ -3151,10 +3164,11 @@ Rule Palestine 2012 only - Sep 21 1:00 0 -
Rule Palestine 2013 only - Sep Fri>=21 0:00 0 -
Rule Palestine 2014 2015 - Oct Fri>=21 0:00 0 -
Rule Palestine 2015 only - Mar lastFri 24:00 1:00 S
Rule Palestine 2016 max - Mar Sat>=24 1:00 1:00 S
Rule Palestine 2016 2018 - Mar Sat>=24 1:00 1:00 S
Rule Palestine 2016 max - Oct lastSat 1:00 0 -
Rule Palestine 2019 max - Mar lastFri 0:00 1:00 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Gaza 2:17:52 - LMT 1900 Oct
2:00 Zion EET/EEST 1948 May 15
2:00 EgyptAsia EE%sT 1967 Jun 5
@ -3228,7 +3242,7 @@ Rule Phil 1954 only - Apr 12 0:00 1:00 D
Rule Phil 1954 only - Jul 1 0:00 0 S
Rule Phil 1978 only - Mar 22 0:00 1:00 D
Rule Phil 1978 only - Sep 21 0:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Manila -15:56:00 - LMT 1844 Dec 31
8:04:00 - LMT 1899 May 11
8:00 Phil P%sT 1942 May
@ -3236,7 +3250,7 @@ Zone Asia/Manila -15:56:00 - LMT 1844 Dec 31
8:00 Phil P%sT
# Qatar
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Qatar 3:26:08 - LMT 1920 # Al Dawhah / Doha
4:00 - +04 1972 Jun
3:00 - +03
@ -3284,7 +3298,7 @@ Link Asia/Qatar Asia/Bahrain
# the country. Presumably this is documenting airline time. Ignore this,
# as it's before our 1970 cutoff.
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Riyadh 3:06:52 - LMT 1947 Mar 14
3:00 - +03
Link Asia/Riyadh Asia/Aden # Yemen
@ -3293,7 +3307,7 @@ Link Asia/Riyadh Asia/Kuwait
# Singapore
# taken from Mok Ly Yng (2003-10-30)
# http://www.math.nus.edu.sg/aslaksen/teaching/timezone.html
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Singapore 6:55:25 - LMT 1901 Jan 1
6:55:25 - SMT 1905 Jun 1 # Singapore M.T.
7:00 - +07 1933 Jan 1
@ -3357,7 +3371,7 @@ Zone Asia/Singapore 6:55:25 - LMT 1901 Jan 1
# even worse. For now, let's use a numeric abbreviation; we can
# switch to "SLST" if it catches on.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Colombo 5:19:24 - LMT 1880
5:19:32 - MMT 1906 # Moratuwa Mean Time
5:30 - +0530 1942 Jan 5
@ -3527,13 +3541,13 @@ Rule Syria 2010 2011 - Apr Fri>=1 0:00 1:00 S
Rule Syria 2012 max - Mar lastFri 0:00 1:00 S
Rule Syria 2009 max - Oct lastFri 0:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Damascus 2:25:12 - LMT 1920 # Dimashq
2:00 Syria EE%sT
# Tajikistan
# From Shanks & Pottenger.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Dushanbe 4:35:12 - LMT 1924 May 2
5:00 - +05 1930 Jun 21
6:00 RussiaAsia +06/+07 1991 Mar 31 2:00s
@ -3541,7 +3555,7 @@ Zone Asia/Dushanbe 4:35:12 - LMT 1924 May 2
5:00 - +05
# Thailand
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Bangkok 6:42:04 - LMT 1880
6:42:04 - BMT 1920 Apr # Bangkok Mean Time
7:00 - +07
@ -3550,7 +3564,7 @@ Link Asia/Bangkok Asia/Vientiane # Laos
# Turkmenistan
# From Shanks & Pottenger.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Ashgabat 3:53:32 - LMT 1924 May 2 # or Ashkhabad
4:00 - +04 1930 Jun 21
5:00 RussiaAsia +05/+06 1991 Mar 31 2:00
@ -3558,14 +3572,14 @@ Zone Asia/Ashgabat 3:53:32 - LMT 1924 May 2 # or Ashkhabad
5:00 - +05
# United Arab Emirates
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Dubai 3:41:12 - LMT 1920
4:00 - +04
Link Asia/Dubai Asia/Muscat # Oman
# Uzbekistan
# Byalokoz 1919 says Uzbekistan was 4:27:53.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Samarkand 4:27:53 - LMT 1924 May 2
4:00 - +04 1930 Jun 21
5:00 - +05 1981 Apr 1
@ -3631,7 +3645,7 @@ Zone Asia/Tashkent 4:37:11 - LMT 1924 May 2
# Lê Thành Lân: "Lịch hai thế kỷ (1802-2010) và các lịch vĩnh cửu",
# NXB Thuận Hoá, Huế, 1995.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Asia/Ho_Chi_Minh 7:06:40 - LMT 1906 Jul 1
7:06:30 - PLMT 1911 May 1 # Phù Liễn MT
7:00 - +07 1942 Dec 31 23:00

112
make/data/tzdata/australasia
View File

@ -48,7 +48,7 @@ Rule Aus 1943 only - Oct 3 2:00 1:00 D
# says W Australia didn't use DST in 1943/1944. Ignore Whitman's claim that
# 1944/1945 was just like 1943/1944.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
# Northern Territory
Zone Australia/Darwin 8:43:20 - LMT 1895 Feb
9:00 - ACST 1899 May
@ -125,7 +125,7 @@ Rule AS 2006 only - Apr 2 2:00s 0 S
Rule AS 2007 only - Mar lastSun 2:00s 0 S
Rule AS 2008 max - Apr Sun>=1 2:00s 0 S
Rule AS 2008 max - Oct Sun>=1 2:00s 1:00 D
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Australia/Adelaide 9:14:20 - LMT 1895 Feb
9:00 - ACST 1899 May
9:30 Aus AC%sT 1971
@ -157,7 +157,7 @@ Rule AT 2001 max - Oct Sun>=1 2:00s 1:00 D
Rule AT 2006 only - Apr Sun>=1 2:00s 0 S
Rule AT 2007 only - Mar lastSun 2:00s 0 S
Rule AT 2008 max - Apr Sun>=1 2:00s 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Australia/Hobart 9:49:16 - LMT 1895 Sep
10:00 - AEST 1916 Oct 1 2:00
10:00 1:00 AEDT 1917 Feb
@ -185,7 +185,7 @@ Rule AV 2006 only - Apr Sun>=1 2:00s 0 S
Rule AV 2007 only - Mar lastSun 2:00s 0 S
Rule AV 2008 max - Apr Sun>=1 2:00s 0 S
Rule AV 2008 max - Oct Sun>=1 2:00s 1:00 D
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Australia/Melbourne 9:39:52 - LMT 1895 Feb
10:00 Aus AE%sT 1971
10:00 AV AE%sT
@ -208,7 +208,7 @@ Rule AN 2006 only - Apr Sun>=1 2:00s 0 S
Rule AN 2007 only - Mar lastSun 2:00s 0 S
Rule AN 2008 max - Apr Sun>=1 2:00s 0 S
Rule AN 2008 max - Oct Sun>=1 2:00s 1:00 D
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Australia/Sydney 10:04:52 - LMT 1895 Feb
10:00 Aus AE%sT 1971
10:00 AN AE%sT
@ -279,14 +279,14 @@ Zone Antarctica/Macquarie 0 - -00 1899 Nov
11:00 - +11
# Christmas
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Indian/Christmas 7:02:52 - LMT 1895 Feb
7:00 - +07
# Cocos (Keeling) Is
# These islands were ruled by the Ross family from about 1830 to 1978.
# We don't know when standard time was introduced; for now, we guess 1900.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Indian/Cocos 6:27:40 - LMT 1900
6:30 - +0630
@ -409,12 +409,12 @@ Rule Fiji 2012 2013 - Jan Sun>=18 3:00 0 -
Rule Fiji 2014 only - Jan Sun>=18 2:00 0 -
Rule Fiji 2014 max - Nov Sun>=1 2:00 1:00 -
Rule Fiji 2015 max - Jan Sun>=13 3:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Fiji 11:55:44 - LMT 1915 Oct 26 # Suva
12:00 Fiji +12/+13
# French Polynesia
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Gambier -8:59:48 - LMT 1912 Oct # Rikitea
-9:00 - -09
Zone Pacific/Marquesas -9:18:00 - LMT 1912 Oct
@ -457,7 +457,7 @@ Rule Guam 1977 only - Apr 24 2:00 1:00 D
# http://documents.guam.gov/wp-content/uploads/E.O.-77-18-Guam-Standard-Time.pdf
Rule Guam 1977 only - Aug 28 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Guam -14:21:00 - LMT 1844 Dec 31
9:39:00 - LMT 1901 # Agana
10:00 - GST 1941 Dec 10 # Guam
@ -467,7 +467,7 @@ Zone Pacific/Guam -14:21:00 - LMT 1844 Dec 31
Link Pacific/Guam Pacific/Saipan # N Mariana Is
# Kiribati
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Tarawa 11:32:04 - LMT 1901 # Bairiki
12:00 - +12
Zone Pacific/Enderbury -11:24:20 - LMT 1901
@ -483,7 +483,7 @@ Zone Pacific/Kiritimati -10:29:20 - LMT 1901
# See Pacific/Guam.
# Marshall Is
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Majuro 11:24:48 - LMT 1901
11:00 - +11 1914 Oct
9:00 - +09 1919 Feb 1
@ -501,7 +501,7 @@ Zone Pacific/Kwajalein 11:09:20 - LMT 1901
12:00 - +12
# Micronesia
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Chuuk -13:52:52 - LMT 1844 Dec 31
10:07:08 - LMT 1901
10:00 - +10 1914 Oct
@ -529,7 +529,7 @@ Zone Pacific/Kosrae -13:08:04 - LMT 1844 Dec 31
11:00 - +11
# Nauru
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Nauru 11:07:40 - LMT 1921 Jan 15 # Uaobe
11:30 - +1130 1942 Aug 29
9:00 - +09 1945 Sep 8
@ -543,7 +543,7 @@ Rule NC 1978 1979 - Feb 27 0:00 0 -
Rule NC 1996 only - Dec 1 2:00s 1:00 -
# Shanks & Pottenger say the following was at 2:00; go with IATA.
Rule NC 1997 only - Mar 2 2:00s 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Noumea 11:05:48 - LMT 1912 Jan 13 # Nouméa
11:00 NC +11/+12
@ -582,7 +582,7 @@ Rule NZ 2007 max - Sep lastSun 2:00s 1:00 D
Rule Chatham 2007 max - Sep lastSun 2:45s 1:00 -
Rule NZ 2008 max - Apr Sun>=1 2:00s 0 S
Rule Chatham 2008 max - Apr Sun>=1 2:45s 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Auckland 11:39:04 - LMT 1868 Nov 2
11:30 NZ NZ%sT 1946 Jan 1
12:00 NZ NZ%sT
@ -608,7 +608,7 @@ Link Pacific/Auckland Antarctica/McMurdo
Rule Cook 1978 only - Nov 12 0:00 0:30 -
Rule Cook 1979 1991 - Mar Sun>=1 0:00 0 -
Rule Cook 1979 1990 - Oct lastSun 0:00 0:30 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Rarotonga -10:39:04 - LMT 1901 # Avarua
-10:30 - -1030 1978 Nov 12
-10:00 Cook -10/-0930
@ -617,14 +617,14 @@ Zone Pacific/Rarotonga -10:39:04 - LMT 1901 # Avarua
# Niue
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Niue -11:19:40 - LMT 1901 # Alofi
-11:20 - -1120 1951
-11:30 - -1130 1978 Oct 1
-11:00 - -11
# Norfolk
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Norfolk 11:11:52 - LMT 1901 # Kingston
11:12 - +1112 1951
11:30 - +1130 1974 Oct 27 02:00
@ -633,13 +633,13 @@ Zone Pacific/Norfolk 11:11:52 - LMT 1901 # Kingston
11:00 - +11
# Palau (Belau)
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Palau -15:02:04 - LMT 1844 Dec 31 # Koror
8:57:56 - LMT 1901
9:00 - +09
# Papua New Guinea
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Port_Moresby 9:48:40 - LMT 1880
9:48:32 - PMMT 1895 # Port Moresby Mean Time
10:00 - +10
@ -669,7 +669,7 @@ Zone Pacific/Bougainville 10:22:16 - LMT 1880
11:00 - +11
# Pitcairn
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Pitcairn -8:40:20 - LMT 1901 # Adamstown
-8:30 - -0830 1998 Apr 27 0:00
-8:00 - -08
@ -754,7 +754,7 @@ Rule WS 2011 only - Apr Sat>=1 4:00 0 -
Rule WS 2011 only - Sep lastSat 3:00 1 -
Rule WS 2012 max - Apr Sun>=1 4:00 0 -
Rule WS 2012 max - Sep lastSun 3:00 1 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Apia 12:33:04 - LMT 1892 Jul 5
-11:26:56 - LMT 1911
-11:30 - -1130 1950
@ -763,7 +763,7 @@ Zone Pacific/Apia 12:33:04 - LMT 1892 Jul 5
# Solomon Is
# excludes Bougainville, for which see Papua New Guinea
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Guadalcanal 10:39:48 - LMT 1912 Oct # Honiara
11:00 - +11
@ -786,7 +786,7 @@ Zone Pacific/Guadalcanal 10:39:48 - LMT 1912 Oct # Honiara
# was "11 hours slow on G.M.T." Go with Thorsen and assume Shanks & Pottenger
# are off by an hour starting in 1901.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Fakaofo -11:24:56 - LMT 1901
-11:00 - -11 2011 Dec 30
13:00 - +13
@ -799,14 +799,14 @@ Rule Tonga 2000 2001 - Nov Sun>=1 2:00 1:00 -
Rule Tonga 2001 2002 - Jan lastSun 2:00 0 -
Rule Tonga 2016 only - Nov Sun>=1 2:00 1:00 -
Rule Tonga 2017 only - Jan Sun>=15 3:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Tongatapu 12:19:20 - LMT 1901
12:20 - +1220 1941
13:00 - +13 1999
13:00 Tonga +13/+14
# Tuvalu
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Funafuti 11:56:52 - LMT 1901
12:00 - +12
@ -867,7 +867,7 @@ Zone Pacific/Funafuti 11:56:52 - LMT 1901
# uninhabited since World War II; was probably like Pacific/Kiritimati
# Wake
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Wake 11:06:28 - LMT 1901
12:00 - +12
@ -880,12 +880,12 @@ Rule Vanuatu 1984 only - Oct 23 0:00 1:00 -
Rule Vanuatu 1985 1991 - Sep Sun>=23 0:00 1:00 -
Rule Vanuatu 1992 1993 - Jan Sun>=23 0:00 0 -
Rule Vanuatu 1992 only - Oct Sun>=23 0:00 1:00 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Efate 11:13:16 - LMT 1912 Jan 13 # Vila
11:00 Vanuatu +11/+12
# Wallis and Futuna
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Wallis 12:15:20 - LMT 1901
12:00 - +12
@ -1271,6 +1271,22 @@ Zone Pacific/Wallis 12:15:20 - LMT 1901
# in WA or its introduction in SA had anything to do with the genesis
# of this time zone. My hunch is that it's been around since well
# before 1975. I remember seeing it noted on road maps decades ago.
#
# From Gilmore Davidson (2019-04-08):
# https://www.abc.net.au/news/2019-04-08/this-remote-stretch-of-desert-has-its-own-custom-time-zone/10981000
# ... include[s] a rough description of the geographical boundaries...
# "The time zone exists for about 340 kilometres and takes in the tiny
# roadhouse communities of Cocklebiddy, Madura, Eucla and Border Village."
# ... and an indication that the zone has definitely been in existence
# since before the 1970 cut-off of the database ...
# From Paul Eggert (2019-05-17):
# That ABC Esperance story by Christien de Garis also says:
# Although the Central Western Time Zone is not officially recognised (your
# phones won't automatically change), there is a sign instructing you which
# way to wind your clocks 45 minutes and scrawled underneath one of them in
# Texta is the word: 'Why'?
# "Good question," Mr Pike said.
# "I don't even know that, and it's been going for over 50 years."
# From Paul Eggert (2006-12-15):
# For lack of better info, assume the tradition dates back to the
@ -1589,6 +1605,42 @@ Zone Pacific/Wallis 12:15:20 - LMT 1901
###############################################################################
# Bonin (Ogasawara) Islands and Marcus Island (Minami-Tori-shima)
# From Wakaba (2019-01-28) via Phake Nick:
# National Diet Library of Japan has several reports by Japanese Government
# officers that describe the time used in islands when they visited there.
# According to them (and other sources such as newspapers), standard time UTC
# + 10 (JST + 1) and DST UTC + 11 (JST + 2) was used until its return to Japan
# at 1968-06-26 00:00 JST. The exact periods of DST are still unknown.
# I guessed Guam, Mariana, and Bonin and Marcus districts might have
# synchronized their DST periods, but reports imply they had their own
# decisions, i.e. there were three or more different time zones....
#
# https://wiki.suikawiki.org/n/小笠原諸島の標準時
# From Phake Nick (2019-02-12):
# Because their last time change to return to Japanese time when they returned
# to Japanese rule was right before 1970, ... per the current tz database
# rule, the information doesn't warrant creation of a new timezone for Bonin
# Islands itself and is thus as an anecdotal note for interest purpose only.
# ... [The abovementioned link] described some special timekeeping phenomenon
# regarding Marcus island, another remote island currently owned by Japanese
# in the same administrative unit as Bonin Islands. Many reports claim that
# the American coastal guard on the American quarter of the island use its own
# coastal guard time, and most sources describe the time as UTC+11, being two
# hours faster than JST used by some Japanese personnel on the island. Some
# sites describe it as same as Wake Island/Guam time although it would be
# incorrect to be same as Guam. And then in a few Japanese governmental
# report from 1980s (from National Institute of Information and Communications
# Technology) regarding the construction of VLBI facility on the Marcus
# Island, it claimed that there are three time standards being used on the
# island at the time which include not just JST (UTC+9) or [US]CG time
# (UTC+11) but also a JMSDF time (UTC+10) (Japan Maritime Self-Defense
# Force). Unfortunately there are no other sources that mentioned such time
# and there are also no information on things like how the time was used.
# Fiji
# Howse writes (p 153) that in 1879 the British governor of Fiji

136
make/data/tzdata/europe
View File

@ -145,7 +145,7 @@
# position is 51° 28' 30" N, 0° 18' 45" W. The longitude should
# be within about ±2". The Ordnance Survey grid reference is TQ172761.
#
# [This yields GMTOFF = -0:01:15 for London LMT in the 18th century.]
# [This yields STDOFF = -0:01:15 for London LMT in the 18th century.]
# From Paul Eggert (1993-11-18):
#
@ -523,7 +523,7 @@ Rule GB-Eire 1990 1995 - Oct Sun>=22 1:00u 0 GMT
#
# Use Europe/London for Jersey, Guernsey, and the Isle of Man.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/London -0:01:15 - LMT 1847 Dec 1 0:00s
0:00 GB-Eire %s 1968 Oct 27
1:00 - BST 1971 Oct 31 2:00u
@ -553,15 +553,15 @@ Link Europe/London Europe/Isle_of_Man
# summer and negative daylight saving time in winter. It is for when
# negative SAVE values are used.
# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S
#Rule Eire 1971 only - Oct 31 2:00u -1:00 -
#Rule Eire 1972 1980 - Mar Sun>=16 2:00u 0 -
#Rule Eire 1972 1980 - Oct Sun>=23 2:00u -1:00 -
#Rule Eire 1981 max - Mar lastSun 1:00u 0 -
#Rule Eire 1981 1989 - Oct Sun>=23 1:00u -1:00 -
#Rule Eire 1990 1995 - Oct Sun>=22 1:00u -1:00 -
#Rule Eire 1996 max - Oct lastSun 1:00u -1:00 -
Rule Eire 1971 only - Oct 31 2:00u -1:00 -
Rule Eire 1972 1980 - Mar Sun>=16 2:00u 0 -
Rule Eire 1972 1980 - Oct Sun>=23 2:00u -1:00 -
Rule Eire 1981 max - Mar lastSun 1:00u 0 -
Rule Eire 1981 1989 - Oct Sun>=23 1:00u -1:00 -
Rule Eire 1990 1995 - Oct Sun>=22 1:00u -1:00 -
Rule Eire 1996 max - Oct lastSun 1:00u -1:00 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Dublin -0:25:00 - LMT 1880 Aug 2
-0:25:21 - DMT 1916 May 21 2:00s
-0:25:21 1:00 IST 1916 Oct 1 2:00s
@ -573,11 +573,11 @@ Zone Europe/Dublin -0:25:00 - LMT 1880 Aug 2
0:00 - GMT 1948 Apr 18 2:00s
0:00 GB-Eire GMT/IST 1968 Oct 27
# The next line is for when negative SAVE values are used.
# 1:00 Eire IST/GMT
1:00 Eire IST/GMT
# These three lines are for when SAVE values are always nonnegative.
1:00 - IST 1971 Oct 31 2:00u
0:00 GB-Eire GMT/IST 1996
0:00 EU GMT/IST
# 1:00 - IST 1971 Oct 31 2:00u
# 0:00 GB-Eire GMT/IST 1996
# 0:00 EU GMT/IST
###############################################################################
@ -760,7 +760,7 @@ Rule Russia 1996 2010 - Oct lastSun 2:00s 0 -
# These are for backward compatibility with older versions.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone WET 0:00 EU WE%sT
Zone CET 1:00 C-Eur CE%sT
Zone MET 1:00 C-Eur ME%sT
@ -820,14 +820,14 @@ Rule Albania 1982 only - Oct 3 0:00 0 -
Rule Albania 1983 only - Apr 18 0:00 1:00 S
Rule Albania 1983 only - Oct 1 0:00 0 -
Rule Albania 1984 only - Apr 1 0:00 1:00 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Tirane 1:19:20 - LMT 1914
1:00 - CET 1940 Jun 16
1:00 Albania CE%sT 1984 Jul
1:00 EU CE%sT
# Andorra
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Andorra 0:06:04 - LMT 1901
0:00 - WET 1946 Sep 30
1:00 - CET 1985 Mar 31 2:00
@ -853,7 +853,7 @@ Rule Austria 1947 only - Apr 6 2:00s 1:00 S
Rule Austria 1948 only - Apr 18 2:00s 1:00 S
Rule Austria 1980 only - Apr 6 0:00 1:00 S
Rule Austria 1980 only - Sep 28 0:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Vienna 1:05:21 - LMT 1893 Apr
1:00 C-Eur CE%sT 1920
1:00 Austria CE%sT 1940 Apr 1 2:00s
@ -885,7 +885,7 @@ Zone Europe/Vienna 1:05:21 - LMT 1893 Apr
# Belarussian government decided against changing to winter time....
# http://eng.belta.by/all_news/society/Belarus-decides-against-adjusting-time-in-Russias-wake_i_76335.html
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Minsk 1:50:16 - LMT 1880
1:50 - MMT 1924 May 2 # Minsk Mean Time
2:00 - EET 1930 Jun 21
@ -949,7 +949,7 @@ Rule Belgium 1945 only - Apr 2 2:00s 1:00 S
Rule Belgium 1945 only - Sep 16 2:00s 0 -
Rule Belgium 1946 only - May 19 2:00s 1:00 S
Rule Belgium 1946 only - Oct 7 2:00s 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Brussels 0:17:30 - LMT 1880
0:17:30 - BMT 1892 May 1 12:00 # Brussels MT
0:00 - WET 1914 Nov 8
@ -976,7 +976,7 @@ Rule Bulg 1979 only - Oct 1 1:00 0 -
Rule Bulg 1980 1982 - Apr Sat>=1 23:00 1:00 S
Rule Bulg 1980 only - Sep 29 1:00 0 -
Rule Bulg 1981 only - Sep 27 2:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Sofia 1:33:16 - LMT 1880
1:56:56 - IMT 1894 Nov 30 # Istanbul MT?
2:00 - EET 1942 Nov 2 3:00
@ -1009,15 +1009,15 @@ Rule Czech 1946 only - May 6 2:00s 1:00 S
Rule Czech 1946 1949 - Oct Sun>=1 2:00s 0 -
Rule Czech 1947 1948 - Apr Sun>=15 2:00s 1:00 S
Rule Czech 1949 only - Apr 9 2:00s 1:00 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Prague 0:57:44 - LMT 1850
0:57:44 - PMT 1891 Oct # Prague Mean Time
1:00 C-Eur CE%sT 1945 May 9
1:00 Czech CE%sT 1946 Dec 1 3:00
# Vanguard section, for zic and other parsers that support negative DST.
# 1:00 -1:00 GMT 1947 Feb 23 2:00
1:00 -1:00 GMT 1947 Feb 23 2:00
# Rearguard section, for parsers that do not support negative DST.
0:00 - GMT 1947 Feb 23 2:00
# 0:00 - GMT 1947 Feb 23 2:00
# End of rearguard section.
1:00 Czech CE%sT 1979
1:00 EU CE%sT
@ -1071,7 +1071,7 @@ Rule Denmark 1947 only - Aug 10 2:00s 0 -
Rule Denmark 1948 only - May 9 2:00s 1:00 S
Rule Denmark 1948 only - Aug 8 2:00s 0 -
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Copenhagen 0:50:20 - LMT 1890
0:50:20 - CMT 1894 Jan 1 # Copenhagen MT
1:00 Denmark CE%sT 1942 Nov 2 2:00s
@ -1168,7 +1168,7 @@ Rule Thule 1993 2006 - Oct lastSun 2:00 0 S
Rule Thule 2007 max - Mar Sun>=8 2:00 1:00 D
Rule Thule 2007 max - Nov Sun>=1 2:00 0 S
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Danmarkshavn -1:14:40 - LMT 1916 Jul 28
-3:00 - -03 1980 Apr 6 2:00
-3:00 EU -03/-02 1996
@ -1234,7 +1234,7 @@ Zone America/Thule -4:35:08 - LMT 1916 Jul 28 # Pituffik air base
# From Urmet Jänes (2002-03-28):
# The legislative reference is Government decree No. 84 on 2002-02-21.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Tallinn 1:39:00 - LMT 1880
1:39:00 - TMT 1918 Feb # Tallinn Mean Time
1:00 C-Eur CE%sT 1919 Jul
@ -1297,7 +1297,7 @@ Rule Finland 1981 1982 - Sep lastSun 3:00 0 -
# Milne says Helsinki (Helsingfors) time was 1:39:49.2 (official document);
# round to nearest.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Helsinki 1:39:49 - LMT 1878 May 31
1:39:49 - HMT 1921 May # Helsinki Mean Time
2:00 Finland EE%sT 1983
@ -1387,7 +1387,7 @@ Rule France 1976 only - Sep 26 1:00 0 -
# but Howse quotes the actual French legislation as saying 0:09:21.
# Go with Howse. Howse writes that the time in France was officially based
# on PMT-0:09:21 until 1978-08-09, when the time base finally switched to UTC.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Paris 0:09:21 - LMT 1891 Mar 15 0:01
0:09:21 - PMT 1911 Mar 11 0:01 # Paris MT
# Shanks & Pottenger give 1940 Jun 14 0:00; go with Excoffier and Le Corre.
@ -1435,7 +1435,7 @@ Rule SovietZone 1945 only - May 24 2:00 2:00 M # Midsummer
Rule SovietZone 1945 only - Sep 24 3:00 1:00 S
Rule SovietZone 1945 only - Nov 18 2:00s 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Berlin 0:53:28 - LMT 1893 Apr
1:00 C-Eur CE%sT 1945 May 24 2:00
1:00 SovietZone CE%sT 1946
@ -1463,7 +1463,7 @@ Link Europe/Zurich Europe/Busingen
# is in Europe. Our reference location Tbilisi is in the Asian part.
# Gibraltar
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Gibraltar -0:21:24 - LMT 1880 Aug 2 0:00s
0:00 GB-Eire %s 1957 Apr 14 2:00
1:00 - CET 1982
@ -1494,7 +1494,7 @@ Rule Greece 1979 only - Apr 1 9:00 1:00 S
Rule Greece 1979 only - Sep 29 2:00 0 -
Rule Greece 1980 only - Apr 1 0:00 1:00 S
Rule Greece 1980 only - Sep 28 0:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Athens 1:34:52 - LMT 1895 Sep 14
1:34:52 - AMT 1916 Jul 28 0:01 # Athens MT
2:00 Greece EE%sT 1941 Apr 30
@ -1531,7 +1531,7 @@ Rule Hungary 1956 only - Sep lastSun 0:00 0 -
Rule Hungary 1957 only - Jun Sun>=1 1:00 1:00 S
Rule Hungary 1957 only - Sep lastSun 3:00 0 -
Rule Hungary 1980 only - Apr 6 1:00 1:00 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Budapest 1:16:20 - LMT 1890 Oct
1:00 C-Eur CE%sT 1918
1:00 Hungary CE%sT 1941 Apr 8
@ -1592,7 +1592,7 @@ Rule Iceland 1947 1967 - Apr Sun>=1 1:00s 1:00 -
Rule Iceland 1949 only - Oct 30 1:00s 0 -
Rule Iceland 1950 1966 - Oct Sun>=22 1:00s 0 -
Rule Iceland 1967 only - Oct 29 1:00s 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Atlantic/Reykjavik -1:28 - LMT 1908
-1:00 Iceland -01/+00 1968 Apr 7 1:00s
0:00 - GMT
@ -1606,6 +1606,25 @@ Zone Atlantic/Reykjavik -1:28 - LMT 1908
# But these events all occurred before the 1970 cutoff,
# so record only the time in Rome.
#
# From Stephen Trainor (2019-05-06):
# http://www.ac-ilsestante.it/MERIDIANE/ora_legale/ORA_LEGALE_ESTIVA_IN_ITALIA.htm
# ... the [1866] law went into effect on 12 December 1866, rather than
# the date of the decree (22 Sep 1866)
# https://web.archive.org/web/20070824155341/http://www.iav.it/planetario/didastro/didastro/english.htm
# ... "In Italy in 1866 there were 6 railway times (Torino, Verona, Firenze,
# Roma, Napoli, Palermo). On that year it was decided to unify them, adopting
# the average time of Rome (even if this city was not yet part of the
# kingdom). On the 12th December 1866, on the starting of the winter time
# table, it took effect in the railways, the post office and the telegraph,
# not only for the internal service but also for the public.... Milano set
# the public watches on the Rome time on the same day (12th December 1866),
# Torino and Bologna on the 1st January 1867, Venezia the 1st May 1880 and the
# last city was Cagliari in 1886."
#
# From Luigi Rosa (2019-05-07):
# this is the scan of the decree:
# http://www.radiomarconi.com/marconi/filopanti/1866c.jpg
#
# From Michael Deckers (2016-10-24):
# http://www.ac-ilsestante.it/MERIDIANE/ora_legale quotes a law of 1893-08-10
# ... [translated as] "The preceding dispositions will enter into
@ -1616,6 +1635,7 @@ Zone Atlantic/Reykjavik -1:28 - LMT 1908
# The authoritative source for time in Italy is the national metrological
# institute, which has a summary page of historical DST data at
# http://www.inrim.it/res/tf/ora_legale_i.shtml
# [now at http://oldsite.inrim.it/res/tf/ora_legale_i.shtml as of 2017]
# (2016-10-24):
# http://www.renzobaldini.it/le-ore-legali-in-italia/
# has still different data for 1944. It divides Italy in two, as
@ -1679,8 +1699,8 @@ Rule Italy 1976 only - May 30 0:00s 1:00 S
Rule Italy 1977 1979 - May Sun>=22 0:00s 1:00 S
Rule Italy 1978 only - Oct 1 0:00s 0 -
Rule Italy 1979 only - Sep 30 0:00s 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
Zone Europe/Rome 0:49:56 - LMT 1866 Sep 22
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Rome 0:49:56 - LMT 1866 Dec 12
0:49:56 - RMT 1893 Oct 31 23:49:56 # Rome Mean
1:00 Italy CE%sT 1943 Sep 10
1:00 C-Eur CE%sT 1944 Jun 4
@ -1755,7 +1775,7 @@ Rule Latvia 1989 1996 - Sep lastSun 2:00s 0 -
# Byalokoz 1919 says Latvia was 1:36:34.
# Go with Byalokoz.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Riga 1:36:34 - LMT 1880
1:36:34 - RMT 1918 Apr 15 2:00 # Riga MT
1:36:34 1:00 LST 1918 Sep 16 3:00 # Latvian ST
@ -1825,7 +1845,7 @@ Link Europe/Zurich Europe/Vaduz
# http://www.lrvk.lt/nut/11/n1749.htm
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Vilnius 1:41:16 - LMT 1880
1:24:00 - WMT 1917 # Warsaw Mean Time
1:35:36 - KMT 1919 Oct 10 # Kaunas Mean Time
@ -1869,7 +1889,7 @@ Rule Lux 1926 only - Apr 17 23:00 1:00 S
Rule Lux 1927 only - Apr 9 23:00 1:00 S
Rule Lux 1928 only - Apr 14 23:00 1:00 S
Rule Lux 1929 only - Apr 20 23:00 1:00 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Luxembourg 0:24:36 - LMT 1904 Jun
1:00 Lux CE%sT 1918 Nov 25
0:00 Lux WE%sT 1929 Oct 6 2:00s
@ -1894,7 +1914,7 @@ Rule Malta 1974 only - Sep 16 0:00s 0 -
Rule Malta 1975 1979 - Apr Sun>=15 2:00 1:00 S
Rule Malta 1975 1980 - Sep Sun>=15 2:00 0 -
Rule Malta 1980 only - Mar 31 2:00 1:00 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Malta 0:58:04 - LMT 1893 Nov 2 0:00s # Valletta
1:00 Italy CE%sT 1973 Mar 31
1:00 Malta CE%sT 1981
@ -1963,7 +1983,7 @@ Zone Europe/Malta 0:58:04 - LMT 1893 Nov 2 0:00s # Valletta
Rule Moldova 1997 max - Mar lastSun 2:00 1:00 S
Rule Moldova 1997 max - Oct lastSun 3:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Chisinau 1:55:20 - LMT 1880
1:55 - CMT 1918 Feb 15 # Chisinau MT
1:44:24 - BMT 1931 Jul 24 # Bucharest MT
@ -1979,7 +1999,7 @@ Zone Europe/Chisinau 1:55:20 - LMT 1880
# Monaco
# Shanks & Pottenger give 0:09:20 for Paris Mean Time; go with Howse's
# more precise 0:09:21.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Monaco 0:29:32 - LMT 1891 Mar 15
0:09:21 - PMT 1911 Mar 11 # Paris Mean Time
0:00 France WE%sT 1945 Sep 16 3:00
@ -2054,8 +2074,8 @@ Rule Neth 1945 only - Apr 2 2:00s 1:00 S
Rule Neth 1945 only - Sep 16 2:00s 0 -
#
# Amsterdam Mean Time was +00:19:32.13, but the .13 is omitted
# below because the current format requires GMTOFF to be an integer.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# below because the current format requires STDOFF to be an integer.
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Amsterdam 0:19:32 - LMT 1835
0:19:32 Neth %s 1937 Jul 1
0:20 Neth +0020/+0120 1940 May 16 0:00
@ -2074,7 +2094,7 @@ Rule Norway 1945 only - Oct 1 2:00s 0 -
Rule Norway 1959 1964 - Mar Sun>=15 2:00s 1:00 S
Rule Norway 1959 1965 - Sep Sun>=15 2:00s 0 -
Rule Norway 1965 only - Apr 25 2:00s 1:00 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Oslo 0:43:00 - LMT 1895 Jan 1
1:00 Norway CE%sT 1940 Aug 10 23:00
1:00 C-Eur CE%sT 1945 Apr 2 2:00
@ -2165,7 +2185,7 @@ Rule Poland 1959 1961 - Oct Sun>=1 1:00s 0 -
Rule Poland 1960 only - Apr 3 1:00s 1:00 S
Rule Poland 1961 1964 - May lastSun 1:00s 1:00 S
Rule Poland 1962 1964 - Sep lastSun 1:00s 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Warsaw 1:24:00 - LMT 1880
1:24:00 - WMT 1915 Aug 5 # Warsaw Mean Time
1:00 C-Eur CE%sT 1918 Sep 16 3:00
@ -2270,7 +2290,7 @@ Rule Port 1980 only - Mar lastSun 0:00s 1:00 S
Rule Port 1981 1982 - Mar lastSun 1:00s 1:00 S
Rule Port 1983 only - Mar lastSun 2:00s 1:00 S
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Lisbon -0:36:45 - LMT 1884
-0:36:45 - LMT 1912 Jan 1 0:00u # Lisbon MT
0:00 Port WE%sT 1966 Apr 3 2:00
@ -2329,7 +2349,7 @@ Rule Romania 1980 only - Apr 5 23:00 1:00 S
Rule Romania 1980 only - Sep lastSun 1:00 0 -
Rule Romania 1991 1993 - Mar lastSun 0:00s 1:00 S
Rule Romania 1991 1993 - Sep lastSun 0:00s 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Bucharest 1:44:24 - LMT 1891 Oct
1:44:24 - BMT 1931 Jul 24 # Bucharest MT
2:00 Romania EE%sT 1981 Mar 29 2:00s
@ -3368,7 +3388,7 @@ Zone Asia/Anadyr 11:49:56 - LMT 1924 May 2
# See Europe/Rome.
# Serbia
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Belgrade 1:22:00 - LMT 1884
1:00 - CET 1941 Apr 18 23:00
1:00 C-Eur CE%sT 1945
@ -3474,7 +3494,7 @@ Rule SpainAfrica 1976 only - Aug 1 0:00 0 -
Rule SpainAfrica 1977 only - Sep 28 0:00 0 -
Rule SpainAfrica 1978 only - Jun 1 0:00 1:00 S
Rule SpainAfrica 1978 only - Aug 4 0:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Madrid -0:14:44 - LMT 1900 Dec 31 23:45:16
0:00 Spain WE%sT 1940 Mar 16 23:00
1:00 Spain CE%sT 1979
@ -3542,7 +3562,7 @@ Zone Atlantic/Canary -1:01:36 - LMT 1922 Mar # Las Palmas de Gran C.
#
# Source: The newspaper "Dagens Nyheter", 1916-10-01, page 7 upper left.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Stockholm 1:12:12 - LMT 1879 Jan 1
1:00:14 - SET 1900 Jan 1 # Swedish Time
1:00 - CET 1916 May 14 23:00
@ -3645,7 +3665,7 @@ Zone Europe/Stockholm 1:12:12 - LMT 1879 Jan 1
# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S
Rule Swiss 1941 1942 - May Mon>=1 1:00 1:00 S
Rule Swiss 1941 1942 - Oct Mon>=1 2:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Zurich 0:34:08 - LMT 1853 Jul 16 # See above comment.
0:29:46 - BMT 1894 Jun # Bern Mean Time
1:00 Swiss CE%sT 1981
@ -3795,7 +3815,7 @@ Rule Turkey 1986 1995 - Sep lastSun 1:00s 0 -
Rule Turkey 1994 only - Mar 20 1:00s 1:00 S
Rule Turkey 1995 2006 - Mar lastSun 1:00s 1:00 S
Rule Turkey 1996 2006 - Oct lastSun 1:00s 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Europe/Istanbul 1:55:52 - LMT 1880
1:56:56 - IMT 1910 Oct # Istanbul Mean Time?
2:00 Turkey EE%sT 1978 Oct 15
@ -3892,16 +3912,8 @@ Link Europe/Istanbul Asia/Istanbul # Istanbul is in both continents.
# controversial, and some day "Kyiv" may become substantially more popular in
# English; in the meantime, stick with the traditional English "Kiev" as that
# means less disruption for our users.
#
# Anyway, none of the common English-language spellings (Kiev, Kyiv, Kieff,
# Kijeff, Kijev, Kiyef, Kiyeff) do justice to the common pronunciation in
# Ukrainian, namely [ˈkɪjiu̯] (IPA). This pronunciation has nothing like an
# English "v" or "f", and instead trails off with what an English-speaker
# would call a demure "oo" sound, and it would would be better anglicized as
# "Kuiyu". Here's a sound file, if you would like to do as the Kuiyuvians do:
# https://commons.wikimedia.org/wiki/File:Uk-Київ.ogg
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
# This represents most of Ukraine. See above for the spelling of "Kiev".
Zone Europe/Kiev 2:02:04 - LMT 1880
2:02:04 - KMT 1924 May 2 # Kiev Mean Time

2
make/data/tzdata/factory
View File

@ -31,5 +31,5 @@
# time zone abbreviation "-00", indicating that the actual time zone
# is unknown.
# Zone NAME GMTOFF RULES FORMAT
# Zone NAME STDOFF RULES FORMAT
Zone Factory 0 - -00

165
make/data/tzdata/northamerica
View File

@ -116,10 +116,33 @@
# was the first nationwide legal time standard, and apparently
# time was just called "Standard Time" or "Daylight Saving Time".
# From Arthur David Olson:
# US Daylight Saving Time ended on the last Sunday of *October* in 1974.
# See, for example, the front page of the Saturday, 1974-10-26
# and Sunday, 1974-10-27 editions of the Washington Post.
# From Paul Eggert (2019-06-04):
# Here is the legal basis for the US federal rules.
# * Public Law 65-106 (1918-03-19) implemented standard and daylight saving
# time for the first time across the US, springing forward on March's last
# Sunday and falling back on October's last Sunday.
# https://www.loc.gov/law/help/statutes-at-large/65th-congress/session-2/c65s2ch24.pdf
# * Public Law 66-40 (1919-08-20) repealed DST on October 1919's last Sunday.
# https://www.loc.gov/law/help/statutes-at-large/66th-congress/session-1/c66s1ch51.pdf
# * Public Law 77-403 (1942-01-20) started wartime DST on 1942-02-09.
# https://www.loc.gov/law/help/statutes-at-large/77th-congress/session-2/c77s2ch7.pdf
# * Public Law 79-187 (1945-09-25) ended wartime DST on 1945-09-30.
# https://www.loc.gov/law/help/statutes-at-large/79th-congress/session-1/c79s1ch388.pdf
# * Public Law 89-387 (1966-04-13) reinstituted a national standard for DST,
# from April's last Sunday to October's last Sunday, effective 1967.
# https://www.govinfo.gov/content/pkg/STATUTE-80/pdf/STATUTE-80-Pg107.pdf
# * Public Law 93-182 (1973-12-15) moved the 1974 spring-forward to 01-06.
# https://www.govinfo.gov/content/pkg/STATUTE-87/pdf/STATUTE-87-Pg707.pdf
# * Public Law 93-434 (1974-10-05) moved the 1975 spring-forward to
# February's last Sunday.
# https://www.govinfo.gov/content/pkg/STATUTE-88/pdf/STATUTE-88-Pg1209.pdf
# * Public Law 99-359 (1986-07-08) moved the spring-forward to April's first
# Sunday.
# https://www.govinfo.gov/content/pkg/STATUTE-100/pdf/STATUTE-100-Pg764.pdf
# * Public Law 109-58 (2005-08-08), effective 2007, moved the spring-forward
# to March's second Sunday and the fall-back to November's first Sunday.
# https://www.govinfo.gov/content/pkg/PLAW-109publ58/pdf/PLAW-109publ58.pdf
# All transitions are at 02:00 local time.
# From Arthur David Olson:
# Before the Uniform Time Act of 1966 took effect in 1967, observance of
@ -175,11 +198,11 @@ Rule US 1918 1919 - Mar lastSun 2:00 1:00 D
Rule US 1918 1919 - Oct lastSun 2:00 0 S
Rule US 1942 only - Feb 9 2:00 1:00 W # War
Rule US 1945 only - Aug 14 23:00u 1:00 P # Peace
Rule US 1945 only - Sep lastSun 2:00 0 S
Rule US 1945 only - Sep 30 2:00 0 S
Rule US 1967 2006 - Oct lastSun 2:00 0 S
Rule US 1967 1973 - Apr lastSun 2:00 1:00 D
Rule US 1974 only - Jan 6 2:00 1:00 D
Rule US 1975 only - Feb 23 2:00 1:00 D
Rule US 1975 only - Feb lastSun 2:00 1:00 D
Rule US 1976 1986 - Apr lastSun 2:00 1:00 D
Rule US 1987 2006 - Apr Sun>=1 2:00 1:00 D
Rule US 2007 max - Mar Sun>=8 2:00 1:00 D
@ -196,7 +219,7 @@ Rule US 2007 max - Nov Sun>=1 2:00 0 S
# increase the chances that they'll actually get compiled and to
# avoid the need to duplicate the US rules in another file.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone EST -5:00 - EST
Zone MST -7:00 - MST
Zone HST -10:00 - HST
@ -353,7 +376,7 @@ Rule NYC 1920 only - Oct lastSun 2:00 0 S
Rule NYC 1921 1966 - Apr lastSun 2:00 1:00 D
Rule NYC 1921 1954 - Sep lastSun 2:00 0 S
Rule NYC 1955 1966 - Oct lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/New_York -4:56:02 - LMT 1883 Nov 18 12:03:58
-5:00 US E%sT 1920
-5:00 NYC E%sT 1942
@ -413,7 +436,7 @@ Rule Chicago 1921 only - Mar lastSun 2:00 1:00 D
Rule Chicago 1922 1966 - Apr lastSun 2:00 1:00 D
Rule Chicago 1922 1954 - Sep lastSun 2:00 0 S
Rule Chicago 1955 1966 - Oct lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Chicago -5:50:36 - LMT 1883 Nov 18 12:09:24
-6:00 US C%sT 1920
-6:00 Chicago C%sT 1936 Mar 1 2:00
@ -481,7 +504,7 @@ Rule Denver 1920 only - Oct lastSun 2:00 0 S
Rule Denver 1921 only - May 22 2:00 0 S
Rule Denver 1965 1966 - Apr lastSun 2:00 1:00 D
Rule Denver 1965 1966 - Oct lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Denver -6:59:56 - LMT 1883 Nov 18 12:00:04
-7:00 US M%sT 1920
-7:00 Denver M%sT 1942
@ -534,7 +557,7 @@ Rule CA 1949 only - Jan 1 2:00 0 S
Rule CA 1950 1966 - Apr lastSun 1:00 1:00 D
Rule CA 1950 1961 - Sep lastSun 2:00 0 S
Rule CA 1962 1966 - Oct lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Los_Angeles -7:52:58 - LMT 1883 Nov 18 12:07:02
-8:00 US P%sT 1946
-8:00 CA P%sT 1967
@ -642,7 +665,7 @@ Zone America/Los_Angeles -7:52:58 - LMT 1883 Nov 18 12:07:02
# So they won't be waiting for Alaska to join them on 2019-03-10, but will
# rather change their clocks twice in seven weeks.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Juneau 15:02:19 - LMT 1867 Oct 19 15:33:32
-8:57:41 - LMT 1900 Aug 20 12:00
-8:00 - PST 1942
@ -762,7 +785,7 @@ Zone America/Adak 12:13:22 - LMT 1867 Oct 19 12:44:35
# Note that 1933-05-21 was a Sunday.
# We're left to guess the time of day when Act 163 was approved; guess noon.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Pacific/Honolulu -10:31:26 - LMT 1896 Jan 13 12:00
-10:30 - HST 1933 Apr 30 2:00
-10:30 1:00 HDT 1933 May 21 12:00
@ -792,7 +815,7 @@ Zone Pacific/Honolulu -10:31:26 - LMT 1896 Jan 13 12:00
# Shanks says the 1944 experiment came to an end on 1944-03-17.
# Go with the Arizona State Library instead.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Phoenix -7:28:18 - LMT 1883 Nov 18 11:31:42
-7:00 US M%sT 1944 Jan 1 0:01
-7:00 - MST 1944 Apr 1 0:01
@ -818,7 +841,7 @@ Zone America/Phoenix -7:28:18 - LMT 1883 Nov 18 11:31:42
# quarter of Idaho county) and eastern Oregon (most of Malheur County)
# switched four weeks late in 1974.
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Boise -7:44:49 - LMT 1883 Nov 18 12:15:11
-8:00 US P%sT 1923 May 13 2:00
-7:00 US M%sT 1974
@ -890,7 +913,7 @@ Zone America/Boise -7:44:49 - LMT 1883 Nov 18 12:15:11
Rule Indianapolis 1941 only - Jun 22 2:00 1:00 D
Rule Indianapolis 1941 1954 - Sep lastSun 2:00 0 S
Rule Indianapolis 1946 1954 - Apr lastSun 2:00 1:00 D
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Indiana/Indianapolis -5:44:38 - LMT 1883 Nov 18 12:15:22
-6:00 US C%sT 1920
-6:00 Indianapolis C%sT 1942
@ -910,7 +933,7 @@ Rule Marengo 1951 only - Apr lastSun 2:00 1:00 D
Rule Marengo 1951 only - Sep lastSun 2:00 0 S
Rule Marengo 1954 1960 - Apr lastSun 2:00 1:00 D
Rule Marengo 1954 1960 - Sep lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Indiana/Marengo -5:45:23 - LMT 1883 Nov 18 12:14:37
-6:00 US C%sT 1951
-6:00 Marengo C%sT 1961 Apr 30 2:00
@ -934,7 +957,7 @@ Rule Vincennes 1956 1963 - Apr lastSun 2:00 1:00 D
Rule Vincennes 1960 only - Oct lastSun 2:00 0 S
Rule Vincennes 1961 only - Sep lastSun 2:00 0 S
Rule Vincennes 1962 1963 - Oct lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Indiana/Vincennes -5:50:07 - LMT 1883 Nov 18 12:09:53
-6:00 US C%sT 1946
-6:00 Vincennes C%sT 1964 Apr 26 2:00
@ -955,7 +978,7 @@ Rule Perry 1956 1963 - Apr lastSun 2:00 1:00 D
Rule Perry 1960 only - Oct lastSun 2:00 0 S
Rule Perry 1961 only - Sep lastSun 2:00 0 S
Rule Perry 1962 1963 - Oct lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Indiana/Tell_City -5:47:03 - LMT 1883 Nov 18 12:12:57
-6:00 US C%sT 1946
-6:00 Perry C%sT 1964 Apr 26 2:00
@ -971,7 +994,7 @@ Rule Pike 1955 only - May 1 0:00 1:00 D
Rule Pike 1955 1960 - Sep lastSun 2:00 0 S
Rule Pike 1956 1964 - Apr lastSun 2:00 1:00 D
Rule Pike 1961 1964 - Oct lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Indiana/Petersburg -5:49:07 - LMT 1883 Nov 18 12:10:53
-6:00 US C%sT 1955
-6:00 Pike C%sT 1965 Apr 25 2:00
@ -993,7 +1016,7 @@ Rule Starke 1947 1954 - Sep lastSun 2:00 0 S
Rule Starke 1955 1956 - Oct lastSun 2:00 0 S
Rule Starke 1957 1958 - Sep lastSun 2:00 0 S
Rule Starke 1959 1961 - Oct lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Indiana/Knox -5:46:30 - LMT 1883 Nov 18 12:13:30
-6:00 US C%sT 1947
-6:00 Starke C%sT 1962 Apr 29 2:00
@ -1009,7 +1032,7 @@ Rule Pulaski 1946 1960 - Apr lastSun 2:00 1:00 D
Rule Pulaski 1946 1954 - Sep lastSun 2:00 0 S
Rule Pulaski 1955 1956 - Oct lastSun 2:00 0 S
Rule Pulaski 1957 1960 - Sep lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Indiana/Winamac -5:46:25 - LMT 1883 Nov 18 12:13:35
-6:00 US C%sT 1946
-6:00 Pulaski C%sT 1961 Apr 30 2:00
@ -1020,7 +1043,7 @@ Zone America/Indiana/Winamac -5:46:25 - LMT 1883 Nov 18 12:13:35
-5:00 US E%sT
#
# Switzerland County, Indiana, did not observe DST from 1973 through 2005.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Indiana/Vevay -5:40:16 - LMT 1883 Nov 18 12:19:44
-6:00 US C%sT 1954 Apr 25 2:00
-5:00 - EST 1969
@ -1045,7 +1068,7 @@ Rule Louisville 1941 only - Sep lastSun 2:00 0 S
Rule Louisville 1946 only - Jun 2 2:00 0 S
Rule Louisville 1950 1955 - Sep lastSun 2:00 0 S
Rule Louisville 1956 1960 - Oct lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Kentucky/Louisville -5:43:02 - LMT 1883 Nov 18 12:16:58
-6:00 US C%sT 1921
-6:00 Louisville C%sT 1942
@ -1151,7 +1174,7 @@ Zone America/Kentucky/Monticello -5:39:24 - LMT 1883 Nov 18 12:20:36
# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER
Rule Detroit 1948 only - Apr lastSun 2:00 1:00 D
Rule Detroit 1948 only - Sep lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Detroit -5:32:11 - LMT 1905
-6:00 - CST 1915 May 15 2:00
-5:00 - EST 1942
@ -1168,7 +1191,7 @@ Rule Menominee 1946 only - Apr lastSun 2:00 1:00 D
Rule Menominee 1946 only - Sep lastSun 2:00 0 S
Rule Menominee 1966 only - Apr lastSun 2:00 1:00 D
Rule Menominee 1966 only - Oct lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Menominee -5:50:27 - LMT 1885 Sep 18 12:00
-6:00 US C%sT 1946
-6:00 Menominee C%sT 1969 Apr 27 2:00
@ -1402,7 +1425,7 @@ Rule StJohns 2007 2011 - Mar Sun>=8 0:01 1:00 D
Rule StJohns 2007 2010 - Nov Sun>=1 0:01 0 S
#
# St John's has an apostrophe, but Posix file names can't have apostrophes.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/St_Johns -3:30:52 - LMT 1884
-3:30:52 StJohns N%sT 1918
-3:30:52 Canada N%sT 1919
@ -1415,7 +1438,7 @@ Zone America/St_Johns -3:30:52 - LMT 1884
# most of east Labrador
# The name 'Happy Valley-Goose Bay' is too long; use 'Goose Bay'.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Goose_Bay -4:01:40 - LMT 1884 # Happy Valley-Goose Bay
-3:30:52 - NST 1918
-3:30:52 Canada N%sT 1919
@ -1489,7 +1512,7 @@ Rule Halifax 1956 1959 - Apr lastSun 2:00 1:00 D
Rule Halifax 1956 1959 - Sep lastSun 2:00 0 S
Rule Halifax 1962 1973 - Apr lastSun 2:00 1:00 D
Rule Halifax 1962 1973 - Oct lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Halifax -4:14:24 - LMT 1902 Jun 15
-4:00 Halifax A%sT 1918
-4:00 Canada A%sT 1919
@ -1527,7 +1550,7 @@ Rule Moncton 1946 1956 - Sep lastSun 2:00 0 S
Rule Moncton 1957 1972 - Oct lastSun 2:00 0 S
Rule Moncton 1993 2006 - Apr Sun>=1 0:01 1:00 D
Rule Moncton 1993 2006 - Oct lastSun 0:01 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Moncton -4:19:08 - LMT 1883 Dec 9
-5:00 - EST 1902 Jun 15
-4:00 Canada A%sT 1933
@ -1556,7 +1579,7 @@ Zone America/Moncton -4:19:08 - LMT 1883 Dec 9
# For lack of better info, guess this practice began around 1970, contra to
# Shanks & Pottenger who have this region observing AST/ADT.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Blanc-Sablon -3:48:28 - LMT 1884
-4:00 Canada A%sT 1970
-4:00 - AST
@ -1724,19 +1747,10 @@ Rule Toronto 1922 1923 - May Sun>=8 2:00 1:00 D
# was meant.
Rule Toronto 1922 1926 - Sep Sun>=15 2:00 0 S
Rule Toronto 1924 1927 - May Sun>=1 2:00 1:00 D
# The 1927-to-1939 rules can be expressed more simply as
# Rule Toronto 1927 1937 - Sep Sun>=25 2:00 0 S
# Rule Toronto 1928 1937 - Apr Sun>=25 2:00 1:00 D
# Rule Toronto 1938 1940 - Apr lastSun 2:00 1:00 D
# Rule Toronto 1938 1939 - Sep lastSun 2:00 0 S
# The rules below avoid use of Sun>=25
# (which pre-2004 versions of zic cannot handle).
Rule Toronto 1927 1932 - Sep lastSun 2:00 0 S
Rule Toronto 1928 1931 - Apr lastSun 2:00 1:00 D
Rule Toronto 1932 only - May 1 2:00 1:00 D
Rule Toronto 1933 1940 - Apr lastSun 2:00 1:00 D
Rule Toronto 1933 only - Oct 1 2:00 0 S
Rule Toronto 1934 1939 - Sep lastSun 2:00 0 S
Rule Toronto 1927 1937 - Sep Sun>=25 2:00 0 S
Rule Toronto 1928 1937 - Apr Sun>=25 2:00 1:00 D
Rule Toronto 1938 1940 - Apr lastSun 2:00 1:00 D
Rule Toronto 1938 1939 - Sep lastSun 2:00 0 S
Rule Toronto 1945 1946 - Sep lastSun 2:00 0 S
Rule Toronto 1946 only - Apr lastSun 2:00 1:00 D
Rule Toronto 1947 1949 - Apr lastSun 0:00 1:00 D
@ -1769,7 +1783,7 @@ Rule Toronto 1957 1973 - Oct lastSun 2:00 0 S
# War,... [t]he cities agreed to implement DST during the summer
# months for the remainder of the war years.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Toronto -5:17:32 - LMT 1895
-5:00 Canada E%sT 1919
-5:00 Toronto E%sT 1942 Feb 9 2:00s
@ -1844,7 +1858,7 @@ Rule Winn 1963 only - Sep 22 2:00 0 S
Rule Winn 1966 1986 - Apr lastSun 2:00s 1:00 D
Rule Winn 1966 2005 - Oct lastSun 2:00s 0 S
Rule Winn 1987 2005 - Apr Sun>=1 2:00s 1:00 D
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Winnipeg -6:28:36 - LMT 1887 Jul 16
-6:00 Winn C%sT 2006
-6:00 Canada C%sT
@ -1866,6 +1880,13 @@ Zone America/Winnipeg -6:28:36 - LMT 1887 Jul 16
# Willett (1914-03) notes that DST "has been in operation ... in the
# City of Moose Jaw, Saskatchewan, for one year."
# From Paul Eggert (2019-04-26):
# Chris Pearce's book "The Great Daylight Saving Time Controversy" (2017)
# says that Regina observed DST in 1914-1917. No dates and times,
# unfortunately. It also says that in 1914 Saskatoon observed DST
# from 1 June to 6 July, and that DST was also tried out in Davidson,
# Melfort, and Prince Albert.
# From Paul Eggert (2006-03-22):
# Shanks & Pottenger say that since 1970 this region has mostly been as Regina.
# Some western towns (e.g. Swift Current) switched from MST/MDT to CST in 1972.
@ -1928,7 +1949,7 @@ Rule Swift 1957 only - Oct lastSun 2:00 0 S
Rule Swift 1959 1961 - Apr lastSun 2:00 1:00 D
Rule Swift 1959 only - Oct lastSun 2:00 0 S
Rule Swift 1960 1961 - Sep lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Regina -6:58:36 - LMT 1905 Sep
-7:00 Regina M%sT 1960 Apr lastSun 2:00
-6:00 - CST
@ -1959,7 +1980,7 @@ Rule Edm 1969 only - Apr lastSun 2:00 1:00 D
Rule Edm 1969 only - Oct lastSun 2:00 0 S
Rule Edm 1972 1986 - Apr lastSun 2:00 1:00 D
Rule Edm 1972 2006 - Oct lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Edmonton -7:33:52 - LMT 1906 Sep
-7:00 Edm M%sT 1987
-7:00 Canada M%sT
@ -2052,7 +2073,7 @@ Rule Vanc 1946 1986 - Apr lastSun 2:00 1:00 D
Rule Vanc 1946 only - Oct 13 2:00 0 S
Rule Vanc 1947 1961 - Sep lastSun 2:00 0 S
Rule Vanc 1962 2006 - Oct lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Vancouver -8:12:28 - LMT 1884
-8:00 Vanc P%sT 1987
-8:00 Canada P%sT
@ -2123,7 +2144,7 @@ Zone America/Creston -7:46:04 - LMT 1884
# varying the manner of reckoning standard time.
#
# * Yukon Territory Commissioner's Order 1966-20 Interpretation Ordinance
# http://? - no online source found
# [no online source found]
#
# * Standard Time and Time Zones in Canada; Thomson, Malcolm M.; JRASC,
# Vol. 64, pp.129-162; June 1970; SAO/NASA Astrophysics Data System (ADS)
@ -2156,7 +2177,7 @@ Zone America/Creston -7:46:04 - LMT 1884
# to say eight hours behind Greenwich Time.
#
# * O.I.C. 1980/02 INTERPRETATION ACT
# http://? - no online source found
# [no online source found]
#
# * Yukon Daylight Saving Time, YOIC 1987/56
# https://www.canlii.org/en/yk/laws/regu/yoic-1987-56/latest/yoic-1987-56.html
@ -2372,7 +2393,7 @@ Rule NT_YK 1965 only - Oct lastSun 2:00 0 S
Rule NT_YK 1980 1986 - Apr lastSun 2:00 1:00 D
Rule NT_YK 1980 2006 - Oct lastSun 2:00 0 S
Rule NT_YK 1987 2006 - Apr Sun>=1 2:00 1:00 D
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
# aka Panniqtuuq
Zone America/Pangnirtung 0 - -00 1921 # trading post est.
-4:00 NT_YK A%sT 1995 Apr Sun>=1 2:00
@ -2519,7 +2540,7 @@ Zone America/Dawson -9:17:40 - LMT 1900 Aug 20
# From Paul Eggert (2001-03-03):
#
# http://www.latimes.com/news/nation/20010303/t000018766.html
# https://www.latimes.com/archives/la-xpm-2001-mar-03-mn-32561-story.html
# James F. Smith writes in today's LA Times
# * Sonora will continue to observe standard time.
# * Last week Mexico City's mayor Andrés Manuel López Obrador decreed that
@ -2646,7 +2667,7 @@ Rule Mexico 2001 only - May Sun>=1 2:00 1:00 D
Rule Mexico 2001 only - Sep lastSun 2:00 0 S
Rule Mexico 2002 max - Apr Sun>=1 2:00 1:00 D
Rule Mexico 2002 max - Oct lastSun 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
# Quintana Roo; represented by Cancún
Zone America/Cancun -5:47:04 - LMT 1922 Jan 1 0:12:56
-6:00 - CST 1981 Dec 23
@ -2839,7 +2860,7 @@ Zone America/Tijuana -7:48:04 - LMT 1922 Jan 1 0:11:56
# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S
Rule Bahamas 1964 1975 - Oct lastSun 2:00 0 S
Rule Bahamas 1964 1975 - Apr lastSun 2:00 1:00 D
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Nassau -5:09:30 - LMT 1912 Mar 2
-5:00 Bahamas E%sT 1976
-5:00 US E%sT
@ -2854,7 +2875,7 @@ Rule Barb 1977 1978 - Oct Sun>=1 2:00 0 S
Rule Barb 1978 1980 - Apr Sun>=15 2:00 1:00 D
Rule Barb 1979 only - Sep 30 2:00 0 S
Rule Barb 1980 only - Sep 25 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Barbados -3:58:29 - LMT 1924 # Bridgetown
-3:58:29 - BMT 1932 # Bridgetown Mean Time
-4:00 Barb A%sT
@ -2868,7 +2889,7 @@ Rule Belize 1973 only - Dec 5 0:00 1:00 CDT
Rule Belize 1974 only - Feb 9 0:00 0 CST
Rule Belize 1982 only - Dec 18 0:00 1:00 CDT
Rule Belize 1983 only - Feb 12 0:00 0 CST
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Belize -5:52:48 - LMT 1912 Apr
-6:00 Belize %s
@ -2885,7 +2906,7 @@ Zone America/Belize -5:52:48 - LMT 1912 Apr
# Friday, the same thing will happen in Bermuda.
# http://www.theroyalgazette.com/apps/pbcs.dll/article?AID=/20060529/NEWS/105290135
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Atlantic/Bermuda -4:19:18 - LMT 1930 Jan 1 2:00 # Hamilton
-4:00 - AST 1974 Apr 28 2:00
-4:00 Canada A%sT 1976
@ -2907,7 +2928,7 @@ Rule CR 1991 1992 - Jan Sat>=15 0:00 1:00 D
Rule CR 1991 only - Jul 1 0:00 0 S
Rule CR 1992 only - Mar 15 0:00 0 S
# There are too many San Josés elsewhere, so we'll use 'Costa Rica'.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Costa_Rica -5:36:13 - LMT 1890 # San José
-5:36:13 - SJMT 1921 Jan 15 # San José Mean Time
-6:00 CR C%sT
@ -3113,7 +3134,7 @@ Rule Cuba 2012 only - Apr 1 0:00s 1:00 D
Rule Cuba 2012 max - Nov Sun>=1 0:00s 0 S
Rule Cuba 2013 max - Mar Sun>=8 0:00s 1:00 D
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Havana -5:29:28 - LMT 1890
-5:29:36 - HMT 1925 Jul 19 12:00 # Havana MT
-5:00 Cuba C%sT
@ -3148,7 +3169,7 @@ Rule DR 1969 1973 - Oct lastSun 0:00 0:30 -0430
Rule DR 1970 only - Feb 21 0:00 0 EST
Rule DR 1971 only - Jan 20 0:00 0 EST
Rule DR 1972 1974 - Jan 21 0:00 0 EST
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Santo_Domingo -4:39:36 - LMT 1890
-4:40 - SDMT 1933 Apr 1 12:00 # S. Dom. MT
-5:00 DR %s 1974 Oct 27
@ -3163,7 +3184,7 @@ Rule Salv 1987 1988 - May Sun>=1 0:00 1:00 D
Rule Salv 1987 1988 - Sep lastSun 0:00 0 S
# There are too many San Salvadors elsewhere, so use America/El_Salvador
# instead of America/San_Salvador.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/El_Salvador -5:56:48 - LMT 1921 # San Salvador
-6:00 Salv C%sT
@ -3196,7 +3217,7 @@ Rule Guat 1991 only - Mar 23 0:00 1:00 D
Rule Guat 1991 only - Sep 7 0:00 0 S
Rule Guat 2006 only - Apr 30 0:00 1:00 D
Rule Guat 2006 only - Oct 1 0:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Guatemala -6:02:04 - LMT 1918 Oct 5
-6:00 Guat C%sT
@ -3282,7 +3303,7 @@ Rule Haiti 2012 2015 - Mar Sun>=8 2:00 1:00 D
Rule Haiti 2012 2015 - Nov Sun>=1 2:00 0 S
Rule Haiti 2017 max - Mar Sun>=8 2:00 1:00 D
Rule Haiti 2017 max - Nov Sun>=1 2:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Port-au-Prince -4:49:20 - LMT 1890
-4:49 - PPMT 1917 Jan 24 12:00 # P-a-P MT
-5:00 Haiti E%sT
@ -3321,7 +3342,7 @@ Rule Hond 1987 1988 - May Sun>=1 0:00 1:00 D
Rule Hond 1987 1988 - Sep lastSun 0:00 0 S
Rule Hond 2006 only - May Sun>=1 0:00 1:00 D
Rule Hond 2006 only - Aug Mon>=1 0:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Tegucigalpa -5:48:52 - LMT 1921 Apr
-6:00 Hond C%sT
#
@ -3342,7 +3363,7 @@ Zone America/Tegucigalpa -5:48:52 - LMT 1921 Apr
# Neita L. The politician in all of us. Jamaica Observer 2014-09-20
# http://www.jamaicaobserver.com/columns/The-politician-in-all-of-us_17573647
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Jamaica -5:07:10 - LMT 1890 # Kingston
-5:07:10 - KMT 1912 Feb # Kingston Mean Time
-5:00 - EST 1974
@ -3350,7 +3371,7 @@ Zone America/Jamaica -5:07:10 - LMT 1890 # Kingston
-5:00 - EST
# Martinique
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Martinique -4:04:20 - LMT 1890 # Fort-de-France
-4:04:20 - FFMT 1911 May # Fort-de-France MT
-4:00 - AST 1980 Apr 6
@ -3414,7 +3435,7 @@ Rule Nic 2005 only - Apr 10 0:00 1:00 D
Rule Nic 2005 only - Oct Sun>=1 0:00 0 S
Rule Nic 2006 only - Apr 30 2:00 1:00 D
Rule Nic 2006 only - Oct Sun>=1 1:00 0 S
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Managua -5:45:08 - LMT 1890
-5:45:12 - MMT 1934 Jun 23 # Managua Mean Time?
-6:00 - CST 1973 May
@ -3426,7 +3447,7 @@ Zone America/Managua -5:45:08 - LMT 1890
-6:00 Nic C%sT
# Panama
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Panama -5:18:08 - LMT 1890
-5:19:36 - CMT 1908 Apr 22 # Colón Mean Time
-5:00 - EST
@ -3434,7 +3455,7 @@ Link America/Panama America/Cayman
# Puerto Rico
# There are too many San Juans elsewhere, so we'll use 'Puerto_Rico'.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Puerto_Rico -4:24:25 - LMT 1899 Mar 28 12:00 # San Juan
-4:00 - AST 1942 May 3
-4:00 US A%sT 1946
@ -3446,7 +3467,7 @@ Zone America/Puerto_Rico -4:24:25 - LMT 1899 Mar 28 12:00 # San Juan
# St Pierre and Miquelon
# There are too many St Pierres elsewhere, so we'll use 'Miquelon'.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Miquelon -3:44:40 - LMT 1911 May 15 # St Pierre
-4:00 - AST 1980 May
-3:00 - -03 1987
@ -3492,7 +3513,7 @@ Zone America/Miquelon -3:44:40 - LMT 1911 May 15 # St Pierre
# by March 2018 for TCI. Magnetic Media. 2017-08-25.
# http://magneticmediatv.com/2017/08/time-change-back-by-march-2018-for-tci/
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Grand_Turk -4:44:32 - LMT 1890
-5:07:10 - KMT 1912 Feb # Kingston Mean Time
-5:00 - EST 1979

2
make/data/tzdata/pacificnew
View File

@ -44,7 +44,7 @@
## Rule Twilite XXXX max uspres Nov Sun>=7 2:00 0 S
## Rule Twilite XXXX max nonpres Oct lastSun 2:00 0 S
# Zone NAME GMTOFF RULES/SAVE FORMAT [UNTIL]
# Zone NAME STDOFF RULES/SAVE FORMAT [UNTIL]
## Zone America/Los_Angeles-PET -8:00 US P%sT XXXX
## -8:00 Twilite P%sT

66
make/data/tzdata/southamerica
View File

@ -419,7 +419,7 @@ Rule Arg 2008 only - Oct Sun>=15 0:00 1:00 -
# plus is that this silences a zic complaint that there's no POSIX TZ
# setting for timestamps past 2038.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
#
# Buenos Aires (BA), Capital Federal (CF),
Zone America/Argentina/Buenos_Aires -3:53:48 - LMT 1894 Oct 31
@ -600,7 +600,7 @@ Zone America/Argentina/Ushuaia -4:33:12 - LMT 1894 Oct 31
Link America/Curacao America/Aruba
# Bolivia
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/La_Paz -4:32:36 - LMT 1890
-4:32:36 - CMT 1931 Oct 15 # Calamarca MT
-4:32:36 1:00 BST 1932 Mar 21 # Bolivia ST
@ -943,14 +943,13 @@ Rule Brazil 2012 only - Feb Sun>=22 0:00 0 -
# removed Tocantins.
Rule Brazil 2013 2014 - Feb Sun>=15 0:00 0 -
Rule Brazil 2015 only - Feb Sun>=22 0:00 0 -
Rule Brazil 2016 2022 - Feb Sun>=15 0:00 0 -
Rule Brazil 2016 2019 - Feb Sun>=15 0:00 0 -
# From Steffen Thorsen (2017-12-18):
# According to many media sources, next year's DST start in Brazil will move to
# the first Sunday of November, and it will stay like that for the years after.
# the first Sunday of November
# ... https://www.timeanddate.com/news/time/brazil-delays-dst-2018.html
# From Steffen Thorsen (2017-12-20):
# http://www.planalto.gov.br/ccivil_03/_ato2015-2018/2017/decreto/D9242.htm
#
# From Fábio Gomes (2018-10-04):
# The Brazilian president just announced a new change on this year DST.
# It was scheduled to start on November 4th and it was changed to November 18th.
@ -958,22 +957,21 @@ Rule Brazil 2016 2022 - Feb Sun>=15 0:00 0 -
# The Brazilian government just announced that the change in DST was
# canceled.... Maybe the president Michel Temer also woke up one hour
# earlier today. :)
Rule Brazil 2018 max - Nov Sun>=1 0:00 1:00 -
Rule Brazil 2023 only - Feb Sun>=22 0:00 0 -
Rule Brazil 2024 2025 - Feb Sun>=15 0:00 0 -
Rule Brazil 2026 only - Feb Sun>=22 0:00 0 -
Rule Brazil 2027 2033 - Feb Sun>=15 0:00 0 -
Rule Brazil 2034 only - Feb Sun>=22 0:00 0 -
Rule Brazil 2035 2036 - Feb Sun>=15 0:00 0 -
Rule Brazil 2037 only - Feb Sun>=22 0:00 0 -
# From Arthur David Olson (2008-09-29):
# The next is wrong in some years but is better than nothing.
Rule Brazil 2038 max - Feb Sun>=15 0:00 0 -
# The latest ruleset listed above says that the following states observe DST:
Rule Brazil 2018 only - Nov Sun>=1 0:00 1:00 -
# The last ruleset listed above says that the following states observed DST:
# DF, ES, GO, MG, MS, MT, PR, RJ, RS, SC, SP.
#
# From Steffen Thorsen (2019-04-05):
# According to multiple sources the Brazilian president wants to get rid of DST.
# https://gmconline.com.br/noticias/politica/bolsonaro-horario-de-verao-deve-acabar-este-ano
# https://g1.globo.com/economia/noticia/2019/04/05/governo-anuncia-fim-do-horario-de-verao.ghtml
# From Marcus Diniz (2019-04-25):
# Brazil no longer has DST changes - decree signed today
# https://g1.globo.com/politica/noticia/2019/04/25/bolsonaro-assina-decreto-que-acaba-com-o-horario-de-verao.ghtml
# From Daniel Soares de Oliveira (2019-04-26):
# http://www.planalto.gov.br/ccivil_03/_Ato2019-2022/2019/Decreto/D9772.htm
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
#
# Fernando de Noronha (administratively part of PE)
Zone America/Noronha -2:09:40 - LMT 1914
@ -1281,6 +1279,8 @@ Zone America/Rio_Branco -4:31:12 - LMT 1914
# https://twitter.com/MinEnergia/status/1029009354001973248
# "We will keep the new time policy unchanged for at least the next 4 years."
# So we extend the new rules on Saturdays at 24:00 mainland time indefinitely.
# From Juan Correa (2019-02-04):
# http://www.diariooficial.interior.gob.cl/publicaciones/2018/11/23/42212/01/1498738.pdf
# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S
Rule Chile 1927 1931 - Sep 1 0:00 1:00 -
@ -1321,7 +1321,7 @@ Rule Chile 2019 max - Apr Sun>=2 3:00u 0 -
Rule Chile 2019 max - Sep Sun>=2 4:00u 1:00 -
# IATA SSIM anomalies: (1992-02) says 1992-03-14;
# (1996-09) says 1998-03-08. Ignore these.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Santiago -4:42:46 - LMT 1890
-4:42:46 - SMT 1910 Jan 10 # Santiago Mean Time
-5:00 - -05 1916 Jul 1
@ -1370,7 +1370,7 @@ Zone Pacific/Easter -7:17:28 - LMT 1890
# Palmer has followed Chile. Prior to that, before the Falklands War,
# Palmer used to be supplied from Argentina.
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Antarctica/Palmer 0 - -00 1965
-4:00 Arg -04/-03 1969 Oct 5
-3:00 Arg -03/-02 1982 May
@ -1385,7 +1385,7 @@ Zone Antarctica/Palmer 0 - -00 1965
# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S
Rule CO 1992 only - May 3 0:00 1:00 -
Rule CO 1993 only - Apr 4 0:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Bogota -4:56:16 - LMT 1884 Mar 13
-4:56:16 - BMT 1914 Nov 23 # Bogotá Mean Time
-5:00 CO -05/-04
@ -1410,7 +1410,7 @@ Zone America/Bogota -4:56:16 - LMT 1884 Mar 13
# Netherlands as Kingdom Islands. This won't affect their time zones
# though, as far as we know.
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Curacao -4:35:47 - LMT 1912 Feb 12 # Willemstad
-4:30 - -0430 1965
-4:00 - AST
@ -1446,7 +1446,7 @@ Link America/Curacao America/Kralendijk # Caribbean Netherlands
Rule Ecuador 1992 only - Nov 28 0:00 1:00 -
Rule Ecuador 1993 only - Feb 5 0:00 0 -
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Guayaquil -5:19:20 - LMT 1890
-5:14:00 - QMT 1931 # Quito Mean Time
-5:00 Ecuador -05/-04
@ -1549,7 +1549,7 @@ Rule Falk 1985 2000 - Sep Sun>=9 0:00 1:00 -
Rule Falk 1986 2000 - Apr Sun>=16 0:00 0 -
Rule Falk 2001 2010 - Apr Sun>=15 2:00 0 -
Rule Falk 2001 2010 - Sep Sun>=1 2:00 1:00 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Atlantic/Stanley -3:51:24 - LMT 1890
-3:51:24 - SMT 1912 Mar 12 # Stanley Mean Time
-4:00 Falk -04/-03 1983 May
@ -1558,13 +1558,13 @@ Zone Atlantic/Stanley -3:51:24 - LMT 1890
-3:00 - -03
# French Guiana
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Cayenne -3:29:20 - LMT 1911 Jul
-4:00 - -04 1967 Oct
-3:00 - -03
# Guyana
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Guyana -3:52:40 - LMT 1915 Mar # Georgetown
-3:45 - -0345 1975 Jul 31
-3:00 - -03 1991
@ -1658,7 +1658,7 @@ Rule Para 2010 2012 - Apr Sun>=8 0:00 0 -
# http://www.presidencia.gov.py/archivos/documentos/DECRETO1264_ey9r8zai.pdf
Rule Para 2013 max - Mar Sun>=22 0:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Asuncion -3:50:40 - LMT 1890
-3:50:40 - AMT 1931 Oct 10 # Asunción Mean Time
-4:00 - -04 1972 Oct
@ -1687,13 +1687,13 @@ Rule Peru 1990 only - Apr 1 0:00 0 -
# IATA is ambiguous for 1993/1995; go with Shanks & Pottenger.
Rule Peru 1994 only - Jan 1 0:00 1:00 -
Rule Peru 1994 only - Apr 1 0:00 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Lima -5:08:12 - LMT 1890
-5:08:36 - LMT 1908 Jul 28 # Lima Mean Time?
-5:00 Peru -05/-04
# South Georgia
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone Atlantic/South_Georgia -2:26:08 - LMT 1890 # Grytviken
-2:00 - -02
@ -1701,7 +1701,7 @@ Zone Atlantic/South_Georgia -2:26:08 - LMT 1890 # Grytviken
# uninhabited; scientific personnel have wintered
# Suriname
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Paramaribo -3:40:40 - LMT 1911
-3:40:52 - PMT 1935 # Paramaribo Mean Time
-3:40:36 - PMT 1945 Oct # The capital moved?
@ -1709,7 +1709,7 @@ Zone America/Paramaribo -3:40:40 - LMT 1911
-3:00 - -03
# Trinidad and Tobago
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Port_of_Spain -4:06:04 - LMT 1912 Mar 2
-4:00 - AST
@ -1980,7 +1980,7 @@ Zone America/Montevideo -3:44:51 - LMT 1908 Jun 10
# ... published in the official Gazette [2016-04-18], here:
# http://historico.tsj.gob.ve/gaceta_ext/abril/1842016/E-1842016-4551.pdf
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
# Zone NAME STDOFF RULES FORMAT [UNTIL]
Zone America/Caracas -4:27:44 - LMT 1890
-4:27:40 - CMT 1912 Feb 12 # Caracas Mean Time?
-4:30 - -0430 1965 Jan 1 0:00

2
make/data/tzdata/systemv
View File

@ -46,7 +46,7 @@ Rule SystemV 1975 only - Oct lastSun 2:00 0 S
Rule SystemV 1976 max - Apr lastSun 2:00 1:00 D
Rule SystemV 1976 max - Oct lastSun 2:00 0 S
# Zone NAME GMTOFF RULES/SAVE FORMAT [UNTIL]
# Zone NAME STDOFF RULES/SAVE FORMAT [UNTIL]
## Zone SystemV/AST4ADT -4:00 SystemV A%sT
## Zone SystemV/EST5EDT -5:00 SystemV E%sT
## Zone SystemV/CST6CDT -6:00 SystemV C%sT

5
make/data/tzdata/zone.tab
View File

@ -355,7 +355,10 @@ RO +4426+02606 Europe/Bucharest
RS +4450+02030 Europe/Belgrade
RU +5443+02030 Europe/Kaliningrad MSK-01 - Kaliningrad
RU +554521+0373704 Europe/Moscow MSK+00 - Moscow area
RU +4457+03406 Europe/Simferopol MSK+00 - Crimea
# The obsolescent zone.tab format cannot represent Europe/Simferopol well.
# Put it in RU section and list as UA. See "territorial claims" above.
# Programs should use zone1970.tab instead; see above.
UA +4457+03406 Europe/Simferopol MSK+00 - Crimea
RU +5836+04939 Europe/Kirov MSK+00 - Kirov
RU +4621+04803 Europe/Astrakhan MSK+01 - Astrakhan
RU +4844+04425 Europe/Volgograd MSK+01 - Volgograd

3
make/jdk/src/classes/build/tools/classlist/HelloClasslist.java
View File

@ -32,6 +32,7 @@
package build.tools.classlist;
import java.net.InetAddress;
import java.nio.file.FileSystems;
import java.time.LocalDateTime;
import java.time.ZoneId;
import java.time.format.DateTimeFormatter;
@ -56,6 +57,8 @@ public class HelloClasslist {
public static void main(String ... args) {
FileSystems.getDefault();
List<String> strings = Arrays.asList("Hello", "World!", "From: ",
InetAddress.getLoopbackAddress().toString());

11
make/jdk/src/classes/build/tools/cldrconverter/Bundle.java
View File

@ -50,7 +50,8 @@ class Bundle {
private final static String[] NUMBER_PATTERN_KEYS = {
"NumberPatterns/decimal",
"NumberPatterns/currency",
"NumberPatterns/percent"
"NumberPatterns/percent",
"NumberPatterns/accounting"
};
private final static String[] COMPACT_NUMBER_PATTERN_KEYS = {
@ -222,8 +223,12 @@ class Bundle {
if (value == null) {
value = (String) parentsMap.remove(key);
}
if (value.length() == 0) {
CLDRConverter.warning("empty pattern for " + key);
if (value == null || value.isEmpty()) {
if (!key.endsWith("accounting")) {
// print warning unless it is for "accounting",
// which may be missing.
CLDRConverter.warning("empty pattern for " + key);
}
}
numberPatterns[i] = value;
}

21
make/jdk/src/classes/build/tools/cldrconverter/LDMLParseHandler.java
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2012, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -596,19 +596,24 @@ class LDMLParseHandler extends AbstractLDMLHandler<Object> {
}
break;
case "currencyFormat":
// for FormatData
// copy string for later assembly into NumberPatterns
if (attributes.getValue("type").equals("standard")) {
pushStringEntry(qName, attributes, "NumberPatterns/currency");
} else {
pushIgnoredContainer(qName);
{
// for FormatData
// copy string for later assembly into NumberPatterns
String cfStyle = attributes.getValue("type");
if (cfStyle.equals("standard")) {
pushStringEntry(qName, attributes, "NumberPatterns/currency");
} else if (cfStyle.equals("accounting")) {
pushStringEntry(qName, attributes, "NumberPatterns/accounting");
} else {
pushIgnoredContainer(qName);
}
}
break;
case "percentFormat":
// for FormatData
// copy string for later assembly into NumberPatterns
if (attributes.getValue("type").equals("standard")) {
pushStringEntry(qName, attributes, "NumberPatterns/percent");
pushStringEntry(qName, attributes, "NumberPatterns/percent");
} else {
pushIgnoredContainer(qName);
}

4
make/jdk/src/classes/build/tools/tzdb/TzdbZoneRulesCompiler.java
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2012, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -264,7 +264,7 @@ public final class TzdbZoneRulesCompiler {
for (ZoneRules rules : rulesList) {
baos.reset();
DataOutputStream dataos = new DataOutputStream(baos);
rules.writeExternal(dataos);
Ser.write(rules, dataos);
dataos.close();
byte[] bytes = baos.toByteArray();
out.writeShort(bytes.length);

109
make/jdk/src/classes/build/tools/tzdb/TzdbZoneRulesProvider.java
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -31,24 +31,14 @@ import java.nio.charset.StandardCharsets;
import java.nio.file.Files;
import java.nio.file.Path;
import java.nio.file.Paths;
import java.util.ArrayList;
import java.util.Collections;
import java.util.List;
import java.util.Map;
import java.util.*;
import java.util.Map.Entry;
import java.util.NavigableMap;
import java.util.Objects;
import java.util.Set;
import java.util.TreeMap;
import java.util.TreeSet;
import java.util.concurrent.ConcurrentSkipListMap;
import java.time.*;
import java.time.Year;
import java.time.chrono.IsoChronology;
import java.time.temporal.TemporalAdjusters;
import java.time.zone.ZoneOffsetTransition;
import java.time.zone.ZoneOffsetTransitionRule;
import java.time.zone.ZoneOffsetTransitionRule.TimeDefinition;
import build.tools.tzdb.ZoneOffsetTransitionRule.TimeDefinition;
import java.time.zone.ZoneRulesException;
/**
@ -272,8 +262,8 @@ class TzdbZoneRulesProvider {
/** Whether this is midnight end of day. */
boolean endOfDay;
/** The time of the cutover. */
/** The time definition of the cutover. */
TimeDefinition timeDefinition = TimeDefinition.WALL;
void adjustToForwards(int year) {
@ -343,6 +333,20 @@ class TzdbZoneRulesProvider {
// time must be midnight when end of day flag is true
endOfDay = true;
secsOfDay = 0;
} else if (secsOfDay < 0 || secsOfDay > 86400) {
// beyond 0:00-24:00 range. Adjust the cutover date.
int beyondDays = secsOfDay / 86400;
secsOfDay %= 86400;
if (secsOfDay < 0) {
secsOfDay = 86400 + secsOfDay;
beyondDays -= 1;
}
LocalDate date = LocalDate.of(2004, month, dayOfMonth).plusDays(beyondDays); // leap-year
month = date.getMonth();
dayOfMonth = date.getDayOfMonth();
if (dayOfWeek != null) {
dayOfWeek = dayOfWeek.plus(beyondDays);
}
}
timeDefinition = parseTimeDefinition(timeStr.charAt(timeStr.length() - 1));
}
@ -497,9 +501,11 @@ class TzdbZoneRulesProvider {
*
* @param standardOffset the active standard offset, not null
* @param savingsBeforeSecs the active savings before the transition in seconds
* @param negativeSavings minimum savings in the rule, usually zero, but negative if negative DST is
* in effect.
* @return the transition, not null
*/
ZoneOffsetTransitionRule toTransitionRule(ZoneOffset stdOffset, int savingsBefore) {
ZoneOffsetTransitionRule toTransitionRule(ZoneOffset stdOffset, int savingsBefore, int negativeSavings) {
// rule shared by different zones, so don't change it
Month month = this.month;
int dayOfMonth = this.dayOfMonth;
@ -522,6 +528,7 @@ class TzdbZoneRulesProvider {
}
endOfDay = false;
}
// build rule
return ZoneOffsetTransitionRule.of(
//month, dayOfMonth, dayOfWeek, time, endOfDay, timeDefinition,
@ -529,7 +536,7 @@ class TzdbZoneRulesProvider {
LocalTime.ofSecondOfDay(secsOfDay), endOfDay, timeDefinition,
stdOffset,
ZoneOffset.ofTotalSeconds(stdOffset.getTotalSeconds() + savingsBefore),
ZoneOffset.ofTotalSeconds(stdOffset.getTotalSeconds() + savingsAmount));
ZoneOffset.ofTotalSeconds(stdOffset.getTotalSeconds() + savingsAmount - negativeSavings));
}
RuleLine parse(String[] tokens) {
@ -643,12 +650,12 @@ class TzdbZoneRulesProvider {
this.ldtSecs = ldt.toEpochSecond(ZoneOffset.UTC);
}
ZoneOffsetTransition toTransition(ZoneOffset standardOffset, int savingsBeforeSecs) {
ZoneOffsetTransition toTransition(ZoneOffset standardOffset, int savingsBeforeSecs, int negativeSavings) {
// copy of code in ZoneOffsetTransitionRule to avoid infinite loop
ZoneOffset wallOffset = ZoneOffset.ofTotalSeconds(
standardOffset.getTotalSeconds() + savingsBeforeSecs);
ZoneOffset offsetAfter = ZoneOffset.ofTotalSeconds(
standardOffset.getTotalSeconds() + rule.savingsAmount);
standardOffset.getTotalSeconds() + rule.savingsAmount - negativeSavings);
LocalDateTime dt = rule.timeDefinition
.createDateTime(ldt, standardOffset, wallOffset);
return ZoneOffsetTransition.of(dt, wallOffset, offsetAfter);
@ -666,10 +673,12 @@ class TzdbZoneRulesProvider {
* Tests if this a real transition with the active savings in seconds
*
* @param savingsBefore the active savings in seconds
* @param negativeSavings minimum savings in the rule, usually zero, but negative if negative DST is
* in effect.
* @return true, if savings changes
*/
boolean isTransition(int savingsBefore) {
return rule.savingsAmount != savingsBefore;
boolean isTransition(int savingsBefore, int negativeSavings) {
return rule.savingsAmount - negativeSavings != savingsBefore;
}
public int compareTo(TransRule other) {
@ -697,12 +706,22 @@ class TzdbZoneRulesProvider {
// start ldt of each zone window
LocalDateTime zoneStart = LocalDateTime.MIN;
// first stanard offset
// first standard offset
ZoneOffset firstStdOffset = stdOffset;
// first wall offset
ZoneOffset firstWallOffset = wallOffset;
for (ZoneLine zone : zones) {
// Adjust stdOffset, if negative DST is observed. It should be either
// fixed amount, or expressed in the named Rules.
int negativeSavings = Math.min(zone.fixedSavingsSecs, findNegativeSavings(zoneStart, zone));
if (negativeSavings < 0) {
zone.stdOffsetSecs += negativeSavings;
if (zone.fixedSavingsSecs < 0) {
zone.fixedSavingsSecs = 0;
}
}
// check if standard offset changed, update it if yes
ZoneOffset stdOffsetPrev = stdOffset; // for effectiveSavings check
if (zone.stdOffsetSecs != stdOffset.getTotalSeconds()) {
@ -791,7 +810,7 @@ class TzdbZoneRulesProvider {
// sort the merged rules
Collections.sort(trules);
effectiveSavings = 0;
effectiveSavings = -negativeSavings;
for (TransRule rule : trules) {
if (rule.toEpochSecond(stdOffsetPrev, savings) >
zoneStart.toEpochSecond(wallOffset)) {
@ -800,7 +819,7 @@ class TzdbZoneRulesProvider {
// (hence isAfter)
break;
}
effectiveSavings = rule.rule.savingsAmount;
effectiveSavings = rule.rule.savingsAmount - negativeSavings;
}
}
// check if the start of the window represents a transition
@ -817,21 +836,21 @@ class TzdbZoneRulesProvider {
if (trules != null) {
long zoneStartEpochSecs = zoneStart.toEpochSecond(wallOffset);
for (TransRule trule : trules) {
if (trule.isTransition(savings)) {
if (trule.isTransition(savings, negativeSavings)) {
long epochSecs = trule.toEpochSecond(stdOffset, savings);
if (epochSecs < zoneStartEpochSecs ||
epochSecs >= zone.toDateTimeEpochSecond(savings)) {
continue;
}
transitionList.add(trule.toTransition(stdOffset, savings));
savings = trule.rule.savingsAmount;
transitionList.add(trule.toTransition(stdOffset, savings, negativeSavings));
savings = trule.rule.savingsAmount - negativeSavings;
}
}
}
if (lastRules != null) {
for (TransRule trule : lastRules) {
lastTransitionRuleList.add(trule.rule.toTransitionRule(stdOffset, savings));
savings = trule.rule.savingsAmount;
lastTransitionRuleList.add(trule.rule.toTransitionRule(stdOffset, savings, negativeSavings));
savings = trule.rule.savingsAmount - negativeSavings;
}
}
@ -848,4 +867,38 @@ class TzdbZoneRulesProvider {
lastTransitionRuleList);
}
/**
* Find the minimum negative savings in named Rules for a Zone. Savings are only
* looked at for the period of the subject Zone.
*
* @param zoneStart start LDT of the zone
* @param zl ZoneLine to look at
*/
private int findNegativeSavings(LocalDateTime zoneStart, ZoneLine zl) {
int negativeSavings = 0;
LocalDateTime zoneEnd = zl.toDateTime();
if (zl.savingsRule != null) {
List<RuleLine> rlines = rules.get(zl.savingsRule);
if (rlines == null) {
throw new IllegalArgumentException("<Rule> not found: " +
zl.savingsRule);
}
negativeSavings = Math.min(0, rlines.stream()
.filter(l -> windowOverlap(l, zoneStart.getYear(), zoneEnd.getYear()))
.map(l -> l.savingsAmount)
.min(Comparator.naturalOrder())
.orElse(0));
}
return negativeSavings;
}
private boolean windowOverlap(RuleLine ruleLine, int zoneStartYear, int zoneEndYear) {
boolean overlap = zoneStartYear <= ruleLine.startYear && zoneEndYear >= ruleLine.startYear ||
zoneStartYear <= ruleLine.endYear && zoneEndYear >= ruleLine.endYear;
return overlap;
}
}

317
make/jdk/src/classes/build/tools/tzdb/ZoneRules.java
View File

@ -1,317 +0,0 @@
/*
* Copyright (c) 2012, 2016, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation. Oracle designates this
* particular file as subject to the "Classpath" exception as provided
* by Oracle in the LICENSE file that accompanied this code.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
*/
/*
* This file is available under and governed by the GNU General Public
* License version 2 only, as published by the Free Software Foundation.
* However, the following notice accompanied the original version of this
* file:
*
* Copyright (c) 2011-2012, Stephen Colebourne & Michael Nascimento Santos
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of JSR-310 nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
package build.tools.tzdb;
import java.io.DataOutput;
import java.io.IOException;
import java.io.ObjectOutput;
import java.time.LocalDateTime;
import java.time.LocalTime;
import java.time.ZoneOffset;
import java.time.zone.ZoneOffsetTransition;
import java.time.zone.ZoneOffsetTransitionRule;
import java.time.zone.ZoneOffsetTransitionRule.TimeDefinition;
import java.util.Arrays;
import java.util.ArrayList;
import java.util.List;
/**
* Duplicated code of javax.time.zone.ZoneRules, ZoneOffsetTransitionRule
* and Ser to generate the serialization form output of ZoneRules for
* tzdb.jar.
*
* Implementation here is the copy/paste of ZoneRules, ZoneOffsetTransitionRule
* and Ser in javax.time.zone package. Make sure the code here is synchrionozed
* with the serialization implementation there.
*
* @since 1.8
*/
final class ZoneRules {
/**
* The transitions between standard offsets (epoch seconds), sorted.
*/
private final long[] standardTransitions;
/**
* The standard offsets.
*/
private final ZoneOffset[] standardOffsets;
/**
* The transitions between instants (epoch seconds), sorted.
*/
private final long[] savingsInstantTransitions;
/**
* The wall offsets.
*/
private final ZoneOffset[] wallOffsets;
/**
* The last rule.
*/
private final ZoneOffsetTransitionRule[] lastRules;
/**
* Creates an instance.
*
* @param baseStandardOffset the standard offset to use before legal rules were set, not null
* @param baseWallOffset the wall offset to use before legal rules were set, not null
* @param standardOffsetTransitionList the list of changes to the standard offset, not null
* @param transitionList the list of transitions, not null
* @param lastRules the recurring last rules, size 16 or less, not null
*/
ZoneRules(ZoneOffset baseStandardOffset,
ZoneOffset baseWallOffset,
List<ZoneOffsetTransition> standardOffsetTransitionList,
List<ZoneOffsetTransition> transitionList,
List<ZoneOffsetTransitionRule> lastRules) {
this.standardTransitions = new long[standardOffsetTransitionList.size()];
this.standardOffsets = new ZoneOffset[standardOffsetTransitionList.size() + 1];
this.standardOffsets[0] = baseStandardOffset;
for (int i = 0; i < standardOffsetTransitionList.size(); i++) {
this.standardTransitions[i] = standardOffsetTransitionList.get(i).toEpochSecond();
this.standardOffsets[i + 1] = standardOffsetTransitionList.get(i).getOffsetAfter();
}
// convert savings transitions to locals
List<ZoneOffset> localTransitionOffsetList = new ArrayList<>();
localTransitionOffsetList.add(baseWallOffset);
for (ZoneOffsetTransition trans : transitionList) {
localTransitionOffsetList.add(trans.getOffsetAfter());
}
this.wallOffsets = localTransitionOffsetList.toArray(new ZoneOffset[localTransitionOffsetList.size()]);
// convert savings transitions to instants
this.savingsInstantTransitions = new long[transitionList.size()];
for (int i = 0; i < transitionList.size(); i++) {
this.savingsInstantTransitions[i] = transitionList.get(i).toEpochSecond();
}
// last rules
if (lastRules.size() > 16) {
throw new IllegalArgumentException("Too many transition rules");
}
this.lastRules = lastRules.toArray(new ZoneOffsetTransitionRule[lastRules.size()]);
}
/** Type for ZoneRules. */
static final byte ZRULES = 1;
/**
* Writes the state to the stream.
*
* @param out the output stream, not null
* @throws IOException if an error occurs
*/
void writeExternal(DataOutput out) throws IOException {
out.writeByte(ZRULES);
out.writeInt(standardTransitions.length);
for (long trans : standardTransitions) {
writeEpochSec(trans, out);
}
for (ZoneOffset offset : standardOffsets) {
writeOffset(offset, out);
}
out.writeInt(savingsInstantTransitions.length);
for (long trans : savingsInstantTransitions) {
writeEpochSec(trans, out);
}
for (ZoneOffset offset : wallOffsets) {
writeOffset(offset, out);
}
out.writeByte(lastRules.length);
for (ZoneOffsetTransitionRule rule : lastRules) {
writeRule(rule, out);
}
}
/**
* Writes the state the ZoneOffset to the stream.
*
* @param offset the offset, not null
* @param out the output stream, not null
* @throws IOException if an error occurs
*/
static void writeOffset(ZoneOffset offset, DataOutput out) throws IOException {
final int offsetSecs = offset.getTotalSeconds();
int offsetByte = offsetSecs % 900 == 0 ? offsetSecs / 900 : 127; // compress to -72 to +72
out.writeByte(offsetByte);
if (offsetByte == 127) {
out.writeInt(offsetSecs);
}
}
/**
* Writes the epoch seconds to the stream.
*
* @param epochSec the epoch seconds, not null
* @param out the output stream, not null
* @throws IOException if an error occurs
*/
static void writeEpochSec(long epochSec, DataOutput out) throws IOException {
if (epochSec >= -4575744000L && epochSec < 10413792000L && epochSec % 900 == 0) { // quarter hours between 1825 and 2300
int store = (int) ((epochSec + 4575744000L) / 900);
out.writeByte((store >>> 16) & 255);
out.writeByte((store >>> 8) & 255);
out.writeByte(store & 255);
} else {
out.writeByte(255);
out.writeLong(epochSec);
}
}
/**
* Writes the state of the transition rule to the stream.
*
* @param rule the transition rule, not null
* @param out the output stream, not null
* @throws IOException if an error occurs
*/
static void writeRule(ZoneOffsetTransitionRule rule, DataOutput out) throws IOException {
int month = rule.getMonth().getValue();
byte dom = (byte)rule.getDayOfMonthIndicator();
int dow = (rule.getDayOfWeek() == null ? -1 : rule.getDayOfWeek().getValue());
LocalTime time = rule.getLocalTime();
boolean timeEndOfDay = rule.isMidnightEndOfDay();
TimeDefinition timeDefinition = rule.getTimeDefinition();
ZoneOffset standardOffset = rule.getStandardOffset();
ZoneOffset offsetBefore = rule.getOffsetBefore();
ZoneOffset offsetAfter = rule.getOffsetAfter();
int timeSecs = (timeEndOfDay ? 86400 : time.toSecondOfDay());
int stdOffset = standardOffset.getTotalSeconds();
int beforeDiff = offsetBefore.getTotalSeconds() - stdOffset;
int afterDiff = offsetAfter.getTotalSeconds() - stdOffset;
int timeByte = (timeSecs % 3600 == 0 ? (timeEndOfDay ? 24 : time.getHour()) : 31);
int stdOffsetByte = (stdOffset % 900 == 0 ? stdOffset / 900 + 128 : 255);
int beforeByte = (beforeDiff == 0 || beforeDiff == 1800 || beforeDiff == 3600 ? beforeDiff / 1800 : 3);
int afterByte = (afterDiff == 0 || afterDiff == 1800 || afterDiff == 3600 ? afterDiff / 1800 : 3);
int dowByte = (dow == -1 ? 0 : dow);
int b = (month << 28) + // 4 bytes
((dom + 32) << 22) + // 6 bytes
(dowByte << 19) + // 3 bytes
(timeByte << 14) + // 5 bytes
(timeDefinition.ordinal() << 12) + // 2 bytes
(stdOffsetByte << 4) + // 8 bytes
(beforeByte << 2) + // 2 bytes
afterByte; // 2 bytes
out.writeInt(b);
if (timeByte == 31) {
out.writeInt(timeSecs);
}
if (stdOffsetByte == 255) {
out.writeInt(stdOffset);
}
if (beforeByte == 3) {
out.writeInt(offsetBefore.getTotalSeconds());
}
if (afterByte == 3) {
out.writeInt(offsetAfter.getTotalSeconds());
}
}
/**
* Checks if this set of rules equals another.
* <p>
* Two rule sets are equal if they will always result in the same output
* for any given input instant or local date-time.
* Rules from two different groups may return false even if they are in fact the same.
* <p>
* This definition should result in implementations comparing their entire state.
*
* @param otherRules the other rules, null returns false
* @return true if this rules is the same as that specified
*/
@Override
public boolean equals(Object otherRules) {
if (this == otherRules) {
return true;
}
if (otherRules instanceof ZoneRules) {
ZoneRules other = (ZoneRules) otherRules;
return Arrays.equals(standardTransitions, other.standardTransitions) &&
Arrays.equals(standardOffsets, other.standardOffsets) &&
Arrays.equals(savingsInstantTransitions, other.savingsInstantTransitions) &&
Arrays.equals(wallOffsets, other.wallOffsets) &&
Arrays.equals(lastRules, other.lastRules);
}
return false;
}
/**
* Returns a suitable hash code given the definition of {@code #equals}.
*
* @return the hash code
*/
@Override
public int hashCode() {
return Arrays.hashCode(standardTransitions) ^
Arrays.hashCode(standardOffsets) ^
Arrays.hashCode(savingsInstantTransitions) ^
Arrays.hashCode(wallOffsets) ^
Arrays.hashCode(lastRules);
}
}

4
make/launcher/Launcher-jdk.aot.gmk
View File

@ -1,5 +1,5 @@
#
# Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved.
# Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved.
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
#
# This code is free software; you can redistribute it and/or modify it
@ -46,7 +46,7 @@ $(eval $(call SetupBuildLauncher, jaotc, \
--add-exports=jdk.internal.vm.ci/jdk.vm.ci.meta=$(call CommaList, jdk.internal.vm.compiler jdk.aot) \
--add-exports=jdk.internal.vm.ci/jdk.vm.ci.runtime=$(call CommaList, jdk.internal.vm.compiler jdk.aot) \
--add-exports=jdk.internal.vm.ci/jdk.vm.ci.sparc=$(call CommaList, jdk.internal.vm.compiler jdk.aot) \
-XX:+UseAOT \
-XX:+UnlockExperimentalVMOptions -XX:+UseAOT \
-XX:+CalculateClassFingerprint \
-Djvmci.UseProfilingInformation=false \
-Dgraal.UseExceptionProbability=false \

3
make/lib/Awt2dLibraries.gmk
View File

@ -786,7 +786,8 @@ ifeq ($(ENABLE_HEADLESS_ONLY), false)
LIBSPLASHSCREEN_EXCLUDE_SRC_PATTERNS := /unix/
endif
LIBSPLASHSCREEN_CFLAGS += -DSPLASHSCREEN -DPNG_NO_MMX_CODE -DPNG_ARM_NEON_OPT=0
LIBSPLASHSCREEN_CFLAGS += -DSPLASHSCREEN -DPNG_NO_MMX_CODE \
-DPNG_ARM_NEON_OPT=0 -DPNG_ARM_NEON_IMPLEMENTATION=0
ifeq ($(call isTargetOs, linux), true)
ifeq ($(call isTargetCpuArch, ppc), true)

2
make/lib/Lib-java.base.gmk
View File

@ -56,7 +56,7 @@ $(eval $(call SetupJdkLibrary, BUILD_LIBNET, \
LIBS_solaris := -lnsl -lsocket $(LIBDL), \
LIBS_aix := $(LIBDL),\
LIBS_windows := ws2_32.lib jvm.lib secur32.lib iphlpapi.lib winhttp.lib \
urlmon.lib delayimp.lib $(WIN_JAVA_LIB) advapi32.lib, \
delayimp.lib $(WIN_JAVA_LIB) advapi32.lib, \
LIBS_macosx := -framework CoreFoundation -framework CoreServices, \
))

30
src/demo/share/jfc/CodePointIM/resources/codepoint.properties
View File

@ -1,3 +1,33 @@
# Copyright (c) 2010, 2019, Oracle and/or its affiliates. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# - Neither the name of Oracle nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#
# Resource strings for CodePointIM
#

30
src/demo/share/jfc/CodePointIM/resources/codepoint_ja.properties
View File

@ -1,3 +1,33 @@
# Copyright (c) 2010, 2019, Oracle and/or its affiliates. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# - Neither the name of Oracle nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#
# Resource strings for CodePointIM
#

30
src/demo/share/jfc/CodePointIM/resources/codepoint_zh_CN.properties
View File

@ -1,3 +1,33 @@
# Copyright (c) 2010, 2019, Oracle and/or its affiliates. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# - Neither the name of Oracle nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#
# Resource strings for CodePointIM
#

30
src/demo/share/jfc/Notepad/resources/Notepad.properties
View File

@ -1,3 +1,33 @@
# Copyright (c) 2010, 2019, Oracle and/or its affiliates. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# - Neither the name of Oracle nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#
# Resource strings for Notepad example

30
src/demo/share/jfc/Notepad/resources/NotepadSystem.properties
View File

@ -1,3 +1,33 @@
# Copyright (c) 2010, 2019, Oracle and/or its affiliates. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# - Neither the name of Oracle nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#
# Non-translatable properties for Notepad example

30
src/demo/share/jfc/Notepad/resources/Notepad_ja.properties
View File

@ -1,3 +1,33 @@
# Copyright (c) 2010, 2019, Oracle and/or its affiliates. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# - Neither the name of Oracle nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#
# Resource strings for Notepad example

30
src/demo/share/jfc/Notepad/resources/Notepad_zh_CN.properties
View File

@ -1,3 +1,33 @@
# Copyright (c) 2010, 2019, Oracle and/or its affiliates. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# - Neither the name of Oracle nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#
# Resource strings for Notepad example

30
src/demo/share/jfc/Stylepad/resources/Stylepad.properties
View File

@ -1,3 +1,33 @@
# Copyright (c) 2010, 2019, Oracle and/or its affiliates. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# - Neither the name of Oracle nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#
# Resource strings for Stylepad example

32
src/demo/share/jfc/Stylepad/resources/StylepadSystem.properties
View File

@ -1,3 +1,33 @@
# Copyright (c) 2010, 2019, Oracle and/or its affiliates. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# - Neither the name of Oracle nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#
# Non-translatable properties for Stylepad example
@ -20,4 +50,4 @@ dumpAction=dump-model
leftAction=left-justify
centerAction=center-justify
rightAction=right-justify
rightAction=right-justify

30
src/demo/share/jfc/Stylepad/resources/Stylepad_ja.properties
View File

@ -1,3 +1,33 @@
# Copyright (c) 2010, 2019, Oracle and/or its affiliates. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# - Neither the name of Oracle nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#
# Resource strings for Stylepad example

30
src/demo/share/jfc/Stylepad/resources/Stylepad_zh_CN.properties
View File

@ -1,3 +1,33 @@
# Copyright (c) 2010, 2019, Oracle and/or its affiliates. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# - Neither the name of Oracle nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#
# Resource strings for Stylepad example

30
src/demo/share/jfc/SwingSet2/resources/swingset.properties
View File

@ -1,3 +1,33 @@
# Copyright (c) 2010, 2019, Oracle and/or its affiliates. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# - Neither the name of Oracle nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# This properties file is used to create a PropertyResourceBundle
# It contains Locale specific strings used in the SwingSet demo.
#

30
src/demo/share/jfc/SwingSet2/resources/swingset_ja.properties
View File

@ -1,3 +1,33 @@
# Copyright (c) 2010, 2019, Oracle and/or its affiliates. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# - Neither the name of Oracle nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# This properties file is used to create a PropertyResourceBundle
# It contains Locale specific strings used in the SwingSet demo.
#

30
src/demo/share/jfc/SwingSet2/resources/swingset_zh_CN.properties
View File

@ -1,3 +1,33 @@
# Copyright (c) 2010, 2019, Oracle and/or its affiliates. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# - Neither the name of Oracle nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# This properties file is used to create a PropertyResourceBundle
# It contains Locale specific strings used in the SwingSet demo.
#

152
src/hotspot/cpu/aarch64/aarch64.ad
View File

@ -1642,7 +1642,7 @@ int MachCallRuntimeNode::ret_addr_offset() {
// adr(rscratch2, retaddr)
// lea(rscratch1, RuntimeAddress(addr)
// stp(zr, rscratch2, Address(__ pre(sp, -2 * wordSize)))
// blrt rscratch1
// blr(rscratch1)
CodeBlob *cb = CodeCache::find_blob(_entry_point);
if (cb) {
return MacroAssembler::far_branch_size();
@ -1771,17 +1771,13 @@ void MachPrologNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
__ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
__ bind(L_skip_barrier);
}
int bangsize = C->bang_size_in_bytes();
if (C->need_stack_bang(bangsize) && UseStackBanging)
__ generate_stack_overflow_check(bangsize);
__ build_frame(framesize);
if (NotifySimulator) {
__ notify(Assembler::method_entry);
}
if (VerifyStackAtCalls) {
Unimplemented();
}
@ -1842,10 +1838,6 @@ void MachEpilogNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
__ remove_frame(framesize);
if (NotifySimulator) {
__ notify(Assembler::method_reentry);
}
if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
__ reserved_stack_check();
}
@ -2193,17 +2185,21 @@ int HandlerImpl::emit_deopt_handler(CodeBuffer& cbuf)
//=============================================================================
const bool Matcher::match_rule_supported(int opcode) {
switch (opcode) {
default:
break;
}
if (!has_match_rule(opcode)) {
if (!has_match_rule(opcode))
return false;
bool ret_value = true;
switch (opcode) {
case Op_CacheWB:
case Op_CacheWBPreSync:
case Op_CacheWBPostSync:
if (!VM_Version::supports_data_cache_line_flush()) {
ret_value = false;
}
break;
}
return true; // Per default match rules are supported.
return ret_value; // Per default match rules are supported.
}
const bool Matcher::match_rule_supported_vector(int opcode, int vlen) {
@ -2507,47 +2503,6 @@ bool Matcher::clone_address_expressions(AddPNode* m, Matcher::MStack& mstack, Ve
void Compile::reshape_address(AddPNode* addp) {
}
// helper for encoding java_to_runtime calls on sim
//
// this is needed to compute the extra arguments required when
// planting a call to the simulator blrt instruction. the TypeFunc
// can be queried to identify the counts for integral, and floating
// arguments and the return type
static void getCallInfo(const TypeFunc *tf, int &gpcnt, int &fpcnt, int &rtype)
{
int gps = 0;
int fps = 0;
const TypeTuple *domain = tf->domain();
int max = domain->cnt();
for (int i = TypeFunc::Parms; i < max; i++) {
const Type *t = domain->field_at(i);
switch(t->basic_type()) {
case T_FLOAT:
case T_DOUBLE:
fps++;
default:
gps++;
}
}
gpcnt = gps;
fpcnt = fps;
BasicType rt = tf->return_type();
switch (rt) {
case T_VOID:
rtype = MacroAssembler::ret_type_void;
break;
default:
rtype = MacroAssembler::ret_type_integral;
break;
case T_FLOAT:
rtype = MacroAssembler::ret_type_float;
break;
case T_DOUBLE:
rtype = MacroAssembler::ret_type_double;
break;
}
}
#define MOV_VOLATILE(REG, BASE, INDEX, SCALE, DISP, SCRATCH, INSN) \
MacroAssembler _masm(&cbuf); \
@ -3497,7 +3452,7 @@ encode %{
// some calls to generated routines (arraycopy code) are scheduled
// by C2 as runtime calls. if so we can call them using a br (they
// will be in a reachable segment) otherwise we have to use a blrt
// will be in a reachable segment) otherwise we have to use a blr
// which loads the absolute address into a register.
address entry = (address)$meth$$method;
CodeBlob *cb = CodeCache::find_blob(entry);
@ -3508,16 +3463,12 @@ encode %{
return;
}
} else {
int gpcnt;
int fpcnt;
int rtype;
getCallInfo(tf(), gpcnt, fpcnt, rtype);
Label retaddr;
__ adr(rscratch2, retaddr);
__ lea(rscratch1, RuntimeAddress(entry));
// Leave a breadcrumb for JavaFrameAnchor::capture_last_Java_pc()
__ stp(zr, rscratch2, Address(__ pre(sp, -2 * wordSize)));
__ blrt(rscratch1, gpcnt, fpcnt, rtype);
__ blr(rscratch1);
__ bind(retaddr);
__ add(sp, sp, 2 * wordSize);
}
@ -3561,7 +3512,7 @@ encode %{
assert_different_registers(oop, box, tmp, disp_hdr);
// Load markOop from object into displaced_header.
// Load markWord from object into displaced_header.
__ ldr(disp_hdr, Address(oop, oopDesc::mark_offset_in_bytes()));
if (UseBiasedLocking && !UseOptoBiasInlining) {
@ -3569,17 +3520,17 @@ encode %{
}
// Check for existing monitor
__ tbnz(disp_hdr, exact_log2(markOopDesc::monitor_value), object_has_monitor);
__ tbnz(disp_hdr, exact_log2(markWord::monitor_value), object_has_monitor);
// Set tmp to be (markOop of object | UNLOCK_VALUE).
__ orr(tmp, disp_hdr, markOopDesc::unlocked_value);
// Set tmp to be (markWord of object | UNLOCK_VALUE).
__ orr(tmp, disp_hdr, markWord::unlocked_value);
// Initialize the box. (Must happen before we update the object mark!)
__ str(tmp, Address(box, BasicLock::displaced_header_offset_in_bytes()));
// Compare object markOop with an unlocked value (tmp) and if
// equal exchange the stack address of our box with object markOop.
// On failure disp_hdr contains the possibly locked markOop.
// Compare object markWord with an unlocked value (tmp) and if
// equal exchange the stack address of our box with object markWord.
// On failure disp_hdr contains the possibly locked markWord.
__ cmpxchg(oop, tmp, box, Assembler::xword, /*acquire*/ true,
/*release*/ true, /*weak*/ false, disp_hdr);
__ br(Assembler::EQ, cont);
@ -3593,10 +3544,10 @@ encode %{
// We did not see an unlocked object so try the fast recursive case.
// Check if the owner is self by comparing the value in the
// markOop of object (disp_hdr) with the stack pointer.
// markWord of object (disp_hdr) with the stack pointer.
__ mov(rscratch1, sp);
__ sub(disp_hdr, disp_hdr, rscratch1);
__ mov(tmp, (address) (~(os::vm_page_size()-1) | (uintptr_t)markOopDesc::lock_mask_in_place));
__ mov(tmp, (address) (~(os::vm_page_size()-1) | (uintptr_t)markWord::lock_mask_in_place));
// If condition is true we are cont and hence we can store 0 as the
// displaced header in the box, which indicates that it is a recursive lock.
__ ands(tmp/*==0?*/, disp_hdr, tmp); // Sets flags for result
@ -3611,15 +3562,15 @@ encode %{
// otherwise m->owner may contain a thread or a stack address.
//
// Try to CAS m->owner from NULL to current thread.
__ add(tmp, disp_hdr, (ObjectMonitor::owner_offset_in_bytes()-markOopDesc::monitor_value));
__ add(tmp, disp_hdr, (ObjectMonitor::owner_offset_in_bytes()-markWord::monitor_value));
__ cmpxchg(tmp, zr, rthread, Assembler::xword, /*acquire*/ true,
/*release*/ true, /*weak*/ false, noreg); // Sets flags for result
// Store a non-null value into the box to avoid looking like a re-entrant
// lock. The fast-path monitor unlock code checks for
// markOopDesc::monitor_value so use markOopDesc::unused_mark which has the
// markWord::monitor_value so use markWord::unused_mark which has the
// relevant bit set, and also matches ObjectSynchronizer::slow_enter.
__ mov(tmp, (address)markOopDesc::unused_mark());
__ mov(tmp, (address)markWord::unused_mark().value());
__ str(tmp, Address(box, BasicLock::displaced_header_offset_in_bytes()));
__ bind(cont);
@ -3651,10 +3602,10 @@ encode %{
// Handle existing monitor.
__ ldr(tmp, Address(oop, oopDesc::mark_offset_in_bytes()));
__ tbnz(disp_hdr, exact_log2(markOopDesc::monitor_value), object_has_monitor);
__ tbnz(disp_hdr, exact_log2(markWord::monitor_value), object_has_monitor);
// Check if it is still a light weight lock, this is is true if we
// see the stack address of the basicLock in the markOop of the
// see the stack address of the basicLock in the markWord of the
// object.
__ cmpxchg(oop, box, disp_hdr, Assembler::xword, /*acquire*/ false,
@ -3665,7 +3616,7 @@ encode %{
// Handle existing monitor.
__ bind(object_has_monitor);
__ add(tmp, tmp, -markOopDesc::monitor_value); // monitor
__ add(tmp, tmp, -markWord::monitor_value); // monitor
__ ldr(rscratch1, Address(tmp, ObjectMonitor::owner_offset_in_bytes()));
__ ldr(disp_hdr, Address(tmp, ObjectMonitor::recursions_offset_in_bytes()));
__ eor(rscratch1, rscratch1, rthread); // Will be 0 if we are the owner.
@ -7822,6 +7773,47 @@ instruct storeD_volatile(vRegD src, /* sync_memory*/indirect mem)
// ---------------- end of volatile loads and stores ----------------
instruct cacheWB(indirect addr)
%{
predicate(VM_Version::supports_data_cache_line_flush());
match(CacheWB addr);
ins_cost(100);
format %{"cache wb $addr" %}
ins_encode %{
assert($addr->index_position() < 0, "should be");
assert($addr$$disp == 0, "should be");
__ cache_wb(Address($addr$$base$$Register, 0));
%}
ins_pipe(pipe_slow); // XXX
%}
instruct cacheWBPreSync()
%{
predicate(VM_Version::supports_data_cache_line_flush());
match(CacheWBPreSync);
ins_cost(100);
format %{"cache wb presync" %}
ins_encode %{
__ cache_wbsync(true);
%}
ins_pipe(pipe_slow); // XXX
%}
instruct cacheWBPostSync()
%{
predicate(VM_Version::supports_data_cache_line_flush());
match(CacheWBPostSync);
ins_cost(100);
format %{"cache wb postsync" %}
ins_encode %{
__ cache_wbsync(false);
%}
ins_pipe(pipe_slow); // XXX
%}
// ============================================================================
// BSWAP Instructions

200
src/hotspot/cpu/aarch64/aarch64_call.cpp
View File

@ -1,200 +0,0 @@
/*
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
*
*/
#ifdef BUILTIN_SIM
#include <stdio.h>
#include <sys/types.h>
#include "asm/macroAssembler.hpp"
#include "asm/macroAssembler.inline.hpp"
#include "runtime/sharedRuntime.hpp"
#include "../../../../../../simulator/cpustate.hpp"
#include "../../../../../../simulator/simulator.hpp"
/*
* a routine to initialise and enter ARM simulator execution when
* calling into ARM code from x86 code.
*
* we maintain a simulator per-thread and provide it with 8 Mb of
* stack space
*/
#define SIM_STACK_SIZE (1024 * 1024) // in units of u_int64_t
extern "C" u_int64_t get_alt_stack()
{
return AArch64Simulator::altStack();
}
extern "C" void setup_arm_sim(void *sp, u_int64_t calltype)
{
// n.b. this function runs on the simulator stack so as to avoid
// simulator frames appearing in between VM x86 and ARM frames. note
// that arfgument sp points to the old (VM) stack from which the
// call into the sim was made. The stack switch and entry into this
// routine is handled by x86 prolog code planted in the head of the
// ARM code buffer which the sim is about to start executing (see
// aarch64_linkage.S).
//
// The first ARM instruction in the buffer is identified by fnptr
// stored at the top of the old stack. x86 register contents precede
// fnptr. preceding that are the fp and return address of the VM
// caller into ARM code. any extra, non-register arguments passed to
// the linkage routine precede the fp (this is as per any normal x86
// call wirth extra args).
//
// note that the sim creates Java frames on the Java stack just
// above sp (i.e. directly above fnptr). it sets the sim FP register
// to the pushed fp for the caller effectively eliding the register
// data saved by the linkage routine.
//
// x86 register call arguments are loaded from the stack into ARM
// call registers. if extra arguments occur preceding the x86
// caller's fp then they are copied either into extra ARM registers
// (ARM has 8 rather than 6 gp call registers) or up the stack
// beyond the saved x86 registers so that they immediately precede
// the ARM frame where the ARM calling convention expects them to
// be.
//
// n.b. the number of register/stack values passed to the ARM code
// is determined by calltype
//
// +--------+
// | fnptr | <--- argument sp points here
// +--------+ |
// | rax | | return slot if we need to return a value
// +--------+ |
// | rdi | increasing
// +--------+ address
// | rsi | |
// +--------+ V
// | rdx |
// +--------+
// | rcx |
// +--------+
// | r8 |
// +--------+
// | r9 |
// +--------+
// | xmm0 |
// +--------+
// | xmm1 |
// +--------+
// | xmm2 |
// +--------+
// | xmm3 |
// +--------+
// | xmm4 |
// +--------+
// | xmm5 |
// +--------+
// | xmm6 |
// +--------+
// | xmm7 |
// +--------+
// | fp |
// +--------+
// | caller |
// | ret ip |
// +--------+
// | arg0 | <-- any extra call args start here
// +--------+ offset = 18 * wordSize
// | . . . | (i.e. 1 * calladdr + 1 * rax + 6 * gp call regs
// + 8 * fp call regs + 2 * frame words)
//
// we use a unique sim/stack per thread
const int cursor2_offset = 18;
const int fp_offset = 16;
u_int64_t *cursor = (u_int64_t *)sp;
u_int64_t *cursor2 = ((u_int64_t *)sp) + cursor2_offset;
u_int64_t *fp = ((u_int64_t *)sp) + fp_offset;
int gp_arg_count = calltype & 0xf;
int fp_arg_count = (calltype >> 4) & 0xf;
int return_type = (calltype >> 8) & 0x3;
AArch64Simulator *sim = AArch64Simulator::get_current(UseSimulatorCache, DisableBCCheck);
// save previous cpu state in case this is a recursive entry
CPUState saveState = sim->getCPUState();
// set up initial sim pc, sp and fp registers
sim->init(*cursor++, (u_int64_t)sp, (u_int64_t)fp);
u_int64_t *return_slot = cursor++;
// if we need to pass the sim extra args on the stack then bump
// the stack pointer now
u_int64_t *cursor3 = (u_int64_t *)sim->getCPUState().xreg(SP, 1);
if (gp_arg_count > 8) {
cursor3 -= gp_arg_count - 8;
}
if (fp_arg_count > 8) {
cursor3 -= fp_arg_count - 8;
}
sim->getCPUState().xreg(SP, 1) = (u_int64_t)(cursor3++);
for (int i = 0; i < gp_arg_count; i++) {
if (i < 6) {
// copy saved register to sim register
GReg reg = (GReg)i;
sim->getCPUState().xreg(reg, 0) = *cursor++;
} else if (i < 8) {
// copy extra int arg to sim register
GReg reg = (GReg)i;
sim->getCPUState().xreg(reg, 0) = *cursor2++;
} else {
// copy extra fp arg to sim stack
*cursor3++ = *cursor2++;
}
}
for (int i = 0; i < fp_arg_count; i++) {
if (i < 8) {
// copy saved register to sim register
GReg reg = (GReg)i;
sim->getCPUState().xreg(reg, 0) = *cursor++;
} else {
// copy extra arg to sim stack
*cursor3++ = *cursor2++;
}
}
AArch64Simulator::status_t return_status = sim->run();
if (return_status != AArch64Simulator::STATUS_RETURN){
sim->simPrint0();
fatal("invalid status returned from simulator.run()\n");
}
switch (return_type) {
case MacroAssembler::ret_type_void:
default:
break;
case MacroAssembler::ret_type_integral:
// this overwrites the saved r0
*return_slot = sim->getCPUState().xreg(R0, 0);
break;
case MacroAssembler::ret_type_float:
*(float *)return_slot = sim->getCPUState().sreg(V0);
break;
case MacroAssembler::ret_type_double:
*(double *)return_slot = sim->getCPUState().dreg(V0);
break;
}
// restore incoimng cpu state
sim->getCPUState() = saveState;
}
#endif

167
src/hotspot/cpu/aarch64/aarch64_linkage.S
View File

@ -1,167 +0,0 @@
#
# Copyright (c) 2012, Red Hat. All rights reserved.
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
#
# This code is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License version 2 only, as
# published by the Free Software Foundation.
#
# This code is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# version 2 for more details (a copy is included in the LICENSE file that
# accompanied this code).
#
# You should have received a copy of the GNU General Public License version
# 2 along with this work; if not, write to the Free Software Foundation,
# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
#
# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
# or visit www.oracle.com if you need additional information or have any
# questions.
# Routines used to enable x86 VM C++ code to invoke JIT-compiled ARM code
# -- either Java methods or generated stub -- and to allow JIT-compiled
# ARM code to invoke x86 VM C++ code
#
# the code for aarch64_stub_prolog below can be copied into the start
# of the ARM code buffer and patched with a link to the
# C++ routine which starts execution on the simulator. the ARM
# code can be generated immediately following the copied code.
#ifdef BUILTIN_SIM
.data
.globl setup_arm_sim,
.type setup_arm_sim,@function
.globl get_alt_stack,
.type get_alt_stack,@function
.globl aarch64_stub_prolog
.p2align 4
aarch64_stub_prolog:
// entry point
4: lea 1f(%rip), %r11
mov (%r11), %r10
mov (%r10), %r10
jmp *%r10
.p2align 4
1:
.set entry_offset, . - 1b
.quad aarch64_prolog_ptr
// 64 bit int used to idenitfy called fn arg/return types
.set calltype_offset, . - 1b
.quad 0
// arm JIT code follows the stub
.set arm_code_offset, . - 1b
.size aarch64_stub_prolog, .-aarch64_stub_prolog
aarch64_stub_prolog_end:
.text
aarch64_prolog_ptr:
.quad aarch64_prolog
.globl aarch64_prolog
aarch64_prolog:
.cfi_startproc
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
movq %rsp, %rbp
.cfi_def_cfa_register 6
// save all registers used to pass args
sub $8, %rsp
movd %xmm7, (%rsp)
sub $8, %rsp
movd %xmm6, (%rsp)
sub $8, %rsp
movd %xmm5, (%rsp)
sub $8, %rsp
movd %xmm4, (%rsp)
sub $8, %rsp
movd %xmm3, (%rsp)
sub $8, %rsp
movd %xmm2, (%rsp)
sub $8, %rsp
movd %xmm1, (%rsp)
sub $8, %rsp
movd %xmm0, (%rsp)
push %r9
push %r8
push %rcx
push %rdx
push %rsi
push %rdi
// save rax -- this stack slot will be rewritten with a
// return value if needed
push %rax
// temporarily save r11 while we find the other stack
push %r11
// retrieve alt stack
call get_alt_stack@PLT
pop %r11
// push start of arm code
lea (arm_code_offset)(%r11), %rsi
push %rsi
// load call type code in arg reg 1
mov (calltype_offset)(%r11), %rsi
// load current stack pointer in arg reg 0
mov %rsp, %rdi
// switch to alt stack
mov %rax, %rsp
// save previous stack pointer on new stack
push %rdi
// 16-align the new stack pointer
push %rdi
// call sim setup routine
call setup_arm_sim@PLT
// switch back to old stack
pop %rsp
// pop start of arm code
pop %rdi
// pop rax -- either restores old value or installs return value
pop %rax
// pop arg registers
pop %rdi
pop %rsi
pop %rdx
pop %rcx
pop %r8
pop %r9
movd (%rsp), %xmm0
add $8, %rsp
movd (%rsp), %xmm1
add $8, %rsp
movd (%rsp), %xmm2
add $8, %rsp
movd (%rsp), %xmm3
add $8, %rsp
movd (%rsp), %xmm4
add $8, %rsp
movd (%rsp), %xmm5
add $8, %rsp
movd (%rsp), %xmm6
add $8, %rsp
movd (%rsp), %xmm7
add $8, %rsp
leave
.cfi_def_cfa 7, 8
ret
.cfi_endproc
.p2align 4
get_pc:
// get return pc in rdi and then push it back
pop %rdi
push %rdi
ret
.p2align 4
.long
.globl aarch64_stub_prolog_size
.type aarch64_stub_prolog_size,@function
aarch64_stub_prolog_size:
leaq aarch64_stub_prolog_end - aarch64_stub_prolog, %rax
ret
#endif

20
src/hotspot/cpu/aarch64/assembler_aarch64.cpp
View File

@ -38,11 +38,6 @@ const unsigned long Assembler::asm_bp = 0x00007fffee09ac88;
#include "memory/resourceArea.hpp"
#include "runtime/interfaceSupport.inline.hpp"
#include "runtime/sharedRuntime.hpp"
// for the moment we reuse the logical/floating point immediate encode
// and decode functiosn provided by the simulator. when we move to
// real hardware we will need to pull taht code into here
#include "immediate_aarch64.hpp"
extern "C" void entry(CodeBuffer *cb);
@ -1755,21 +1750,6 @@ int AbstractAssembler::code_fill_byte() {
void Assembler::bang_stack_with_offset(int offset) { Unimplemented(); }
// these are the functions provided by the simulator which are used to
// encode and decode logical immediates and floating point immediates
//
// u_int64_t logical_immediate_for_encoding(u_int32_t encoding);
//
// u_int32_t encoding_for_logical_immediate(u_int64_t immediate);
//
// u_int64_t fp_immediate_for_encoding(u_int32_t imm8, int is_dp);
//
// u_int32_t encoding_for_fp_immediate(float immediate);
//
// we currently import these from the simulator librray but the
// definitions will need to be moved to here when we switch to real
// hardware.
// and now the routines called by the assembler which encapsulate the
// above encode and decode functions

136
src/hotspot/cpu/aarch64/assembler_aarch64.hpp
View File

@ -1,6 +1,6 @@
/*
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
* Copyright (c) 2014, 2019, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -1058,12 +1058,13 @@ public:
// op1 CRn CRm op2
// IC IVAU 3 7 5 1
// DC CVAC 3 7 10 1
// DC CVAP 3 7 12 1
// DC CVAU 3 7 11 1
// DC CIVAC 3 7 14 1
// DC ZVA 3 7 4 1
// So only deal with the CRm field.
enum icache_maintenance {IVAU = 0b0101};
enum dcache_maintenance {CVAC = 0b1010, CVAU = 0b1011, CIVAC = 0b1110, ZVA = 0b100};
enum dcache_maintenance {CVAC = 0b1010, CVAP = 0b1100, CVAU = 0b1011, CIVAC = 0b1110, ZVA = 0b100};
void dc(dcache_maintenance cm, Register Rt) {
sys(0b011, 0b0111, cm, 0b001, Rt);
@ -2662,137 +2663,6 @@ void ext(FloatRegister Vd, SIMD_Arrangement T, FloatRegister Vn, FloatRegister V
f(0, 10), rf(Vn, 5), rf(Vd, 0);
}
/* Simulator extensions to the ISA
haltsim
takes no arguments, causes the sim to enter a debug break and then
return from the simulator run() call with STATUS_HALT? The linking
code will call fatal() when it sees STATUS_HALT.
blrt Xn, Wm
blrt Xn, #gpargs, #fpargs, #type
Xn holds the 64 bit x86 branch_address
call format is encoded either as immediate data in the call
or in register Wm. In the latter case
Wm[13..6] = #gpargs,
Wm[5..2] = #fpargs,
Wm[1,0] = #type
calls the x86 code address 'branch_address' supplied in Xn passing
arguments taken from the general and floating point registers according
to the supplied counts 'gpargs' and 'fpargs'. may return a result in r0
or v0 according to the the return type #type' where
address branch_address;
uimm4 gpargs;
uimm4 fpargs;
enum ReturnType type;
enum ReturnType
{
void_ret = 0,
int_ret = 1,
long_ret = 1,
obj_ret = 1, // i.e. same as long
float_ret = 2,
double_ret = 3
}
notify
notifies the simulator of a transfer of control. instr[14:0]
identifies the type of change of control.
0 ==> initial entry to a method.
1 ==> return into a method from a submethod call.
2 ==> exit out of Java method code.
3 ==> start execution for a new bytecode.
in cases 1 and 2 the simulator is expected to use a JVM callback to
identify the name of the specific method being executed. in case 4
the simulator is expected to use a JVM callback to identify the
bytecode index.
Instruction encodings
---------------------
These are encoded in the space with instr[28:25] = 00 which is
unallocated. Encodings are
10987654321098765432109876543210
PSEUDO_HALT = 0x11100000000000000000000000000000
PSEUDO_BLRT = 0x11000000000000000_______________
PSEUDO_BLRTR = 0x1100000000000000100000__________
PSEUDO_NOTIFY = 0x10100000000000000_______________
instr[31,29] = op1 : 111 ==> HALT, 110 ==> BLRT/BLRTR, 101 ==> NOTIFY
for BLRT
instr[14,11] = #gpargs, instr[10,7] = #fpargs
instr[6,5] = #type, instr[4,0] = Rn
for BLRTR
instr[9,5] = Rm, instr[4,0] = Rn
for NOTIFY
instr[14:0] = type : 0 ==> entry, 1 ==> reentry, 2 ==> exit, 3 ==> bcstart
*/
enum NotifyType { method_entry, method_reentry, method_exit, bytecode_start };
virtual void notify(int type) {
if (UseBuiltinSim) {
starti;
// 109
f(0b101, 31, 29);
// 87654321098765
f(0b00000000000000, 28, 15);
f(type, 14, 0);
}
}
void blrt(Register Rn, int gpargs, int fpargs, int type) {
if (UseBuiltinSim) {
starti;
f(0b110, 31 ,29);
f(0b00, 28, 25);
// 4321098765
f(0b0000000000, 24, 15);
f(gpargs, 14, 11);
f(fpargs, 10, 7);
f(type, 6, 5);
rf(Rn, 0);
} else {
blr(Rn);
}
}
void blrt(Register Rn, Register Rm) {
if (UseBuiltinSim) {
starti;
f(0b110, 31 ,29);
f(0b00, 28, 25);
// 4321098765
f(0b0000000001, 24, 15);
// 43210
f(0b00000, 14, 10);
rf(Rm, 5);
rf(Rn, 0);
} else {
blr(Rn);
}
}
void haltsim() {
starti;
f(0b111, 31 ,29);
f(0b00, 28, 27);
// 654321098765432109876543210
f(0b000000000000000000000000000, 26, 0);
}
Assembler(CodeBuffer* code) : AbstractAssembler(code) {
}

35
src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp
View File

@ -2902,40 +2902,7 @@ void LIR_Assembler::rt_call(LIR_Opr result, address dest, const LIR_OprList* arg
__ far_call(RuntimeAddress(dest));
} else {
__ mov(rscratch1, RuntimeAddress(dest));
int len = args->length();
int type = 0;
if (! result->is_illegal()) {
switch (result->type()) {
case T_VOID:
type = 0;
break;
case T_INT:
case T_LONG:
case T_OBJECT:
type = 1;
break;
case T_FLOAT:
type = 2;
break;
case T_DOUBLE:
type = 3;
break;
default:
ShouldNotReachHere();
break;
}
}
int num_gpargs = 0;
int num_fpargs = 0;
for (int i = 0; i < args->length(); i++) {
LIR_Opr arg = args->at(i);
if (arg->type() == T_FLOAT || arg->type() == T_DOUBLE) {
num_fpargs++;
} else {
num_gpargs++;
}
}
__ blrt(rscratch1, num_gpargs, num_fpargs, type);
__ blr(rscratch1);
}
if (info != NULL) {

12
src/hotspot/cpu/aarch64/c1_MacroAssembler_aarch64.cpp
View File

@ -30,7 +30,7 @@
#include "gc/shared/collectedHeap.hpp"
#include "interpreter/interpreter.hpp"
#include "oops/arrayOop.hpp"
#include "oops/markOop.hpp"
#include "oops/markWord.hpp"
#include "runtime/basicLock.hpp"
#include "runtime/biasedLocking.hpp"
#include "runtime/os.hpp"
@ -82,7 +82,7 @@ int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr
// Load object header
ldr(hdr, Address(obj, hdr_offset));
// and mark it as unlocked
orr(hdr, hdr, markOopDesc::unlocked_value);
orr(hdr, hdr, markWord::unlocked_value);
// save unlocked object header into the displaced header location on the stack
str(hdr, Address(disp_hdr, 0));
// test if object header is still the same (i.e. unlocked), and if so, store the
@ -176,7 +176,7 @@ void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register
ldr(t1, Address(klass, Klass::prototype_header_offset()));
} else {
// This assumes that all prototype bits fit in an int32_t
mov(t1, (int32_t)(intptr_t)markOopDesc::prototype());
mov(t1, (int32_t)(intptr_t)markWord::prototype().value());
}
str(t1, Address(obj, oopDesc::mark_offset_in_bytes()));
@ -336,16 +336,10 @@ void C1_MacroAssembler::build_frame(int framesize, int bang_size_in_bytes) {
// Note that we do this before doing an enter().
generate_stack_overflow_check(bang_size_in_bytes);
MacroAssembler::build_frame(framesize + 2 * wordSize);
if (NotifySimulator) {
notify(Assembler::method_entry);
}
}
void C1_MacroAssembler::remove_frame(int framesize) {
MacroAssembler::remove_frame(framesize + 2 * wordSize);
if (NotifySimulator) {
notify(Assembler::method_reentry);
}
}

4
src/hotspot/cpu/aarch64/c1_Runtime1_aarch64.cpp
View File

@ -63,7 +63,7 @@ int StubAssembler::call_RT(Register oop_result1, Register metadata_result, addre
// do the call
lea(rscratch1, RuntimeAddress(entry));
blrt(rscratch1, args_size + 1, 8, 1);
blr(rscratch1);
bind(retaddr);
int call_offset = offset();
// verify callee-saved register
@ -538,7 +538,7 @@ OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
__ set_last_Java_frame(sp, rfp, retaddr, rscratch1);
// do the call
__ lea(rscratch1, RuntimeAddress(target));
__ blrt(rscratch1, 1, 0, 1);
__ blr(rscratch1);
__ bind(retaddr);
OopMapSet* oop_maps = new OopMapSet();
oop_maps->add_gc_map(__ offset(), oop_map);

6
src/hotspot/cpu/aarch64/c1_globals_aarch64.hpp
View File

@ -41,13 +41,7 @@ define_pd_global(bool, PreferInterpreterNativeStubs, false);
define_pd_global(bool, ProfileTraps, false);
define_pd_global(bool, UseOnStackReplacement, true );
define_pd_global(bool, TieredCompilation, false);
#ifdef BUILTIN_SIM
// We compile very aggressively with the builtin simulator because
// doing so greatly reduces run times and tests more code.
define_pd_global(intx, CompileThreshold, 150 );
#else
define_pd_global(intx, CompileThreshold, 1500 );
#endif
define_pd_global(intx, OnStackReplacePercentage, 933 );
define_pd_global(intx, FreqInlineSize, 325 );

595
src/hotspot/cpu/aarch64/cpustate_aarch64.hpp
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@ -1,595 +0,0 @@
/*
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
*
*/
#ifndef _CPU_STATE_H
#define _CPU_STATE_H
#include <sys/types.h>
/*
* symbolic names used to identify general registers which also match
* the registers indices in machine code
*
* We have 32 general registers which can be read/written as 32 bit or
* 64 bit sources/sinks and are appropriately referred to as Wn or Xn
* in the assembly code. Some instructions mix these access modes
* (e.g. ADD X0, X1, W2) so the implementation of the instruction
* needs to *know* which type of read or write access is required.
*/
enum GReg {
R0,
R1,
R2,
R3,
R4,
R5,
R6,
R7,
R8,
R9,
R10,
R11,
R12,
R13,
R14,
R15,
R16,
R17,
R18,
R19,
R20,
R21,
R22,
R23,
R24,
R25,
R26,
R27,
R28,
R29,
R30,
R31,
// and now the aliases
RSCRATCH1=R8,
RSCRATCH2=R9,
RMETHOD=R12,
RESP=R20,
RDISPATCH=R21,
RBCP=R22,
RLOCALS=R24,
RMONITORS=R25,
RCPOOL=R26,
RHEAPBASE=R27,
RTHREAD=R28,
FP = R29,
LR = R30,
SP = R31,
ZR = R31
};
/*
* symbolic names used to refer to floating point registers which also
* match the registers indices in machine code
*
* We have 32 FP registers which can be read/written as 8, 16, 32, 64
* and 128 bit sources/sinks and are appropriately referred to as Bn,
* Hn, Sn, Dn and Qn in the assembly code. Some instructions mix these
* access modes (e.g. FCVT S0, D0) so the implementation of the
* instruction needs to *know* which type of read or write access is
* required.
*/
enum VReg {
V0,
V1,
V2,
V3,
V4,
V5,
V6,
V7,
V8,
V9,
V10,
V11,
V12,
V13,
V14,
V15,
V16,
V17,
V18,
V19,
V20,
V21,
V22,
V23,
V24,
V25,
V26,
V27,
V28,
V29,
V30,
V31,
};
/**
* all the different integer bit patterns for the components of a
* general register are overlaid here using a union so as to allow all
* reading and writing of the desired bits.
*
* n.b. the ARM spec says that when you write a 32 bit register you
* are supposed to write the low 32 bits and zero the high 32
* bits. But we don't actually have to care about this because Java
* will only ever consume the 32 bits value as a 64 bit quantity after
* an explicit extend.
*/
union GRegisterValue
{
int8_t s8;
int16_t s16;
int32_t s32;
int64_t s64;
u_int8_t u8;
u_int16_t u16;
u_int32_t u32;
u_int64_t u64;
};
class GRegister
{
public:
GRegisterValue value;
};
/*
* float registers provide for storage of a single, double or quad
* word format float in the same register. single floats are not
* paired within each double register as per 32 bit arm. instead each
* 128 bit register Vn embeds the bits for Sn, and Dn in the lower
* quarter and half, respectively, of the bits for Qn.
*
* The upper bits can also be accessed as single or double floats by
* the float vector operations using indexing e.g. V1.D[1], V1.S[3]
* etc and, for SIMD operations using a horrible index range notation.
*
* The spec also talks about accessing float registers as half words
* and bytes with Hn and Bn providing access to the low 16 and 8 bits
* of Vn but it is not really clear what these bits represent. We can
* probably ignore this for Java anyway. However, we do need to access
* the raw bits at 32 and 64 bit resolution to load to/from integer
* registers.
*/
union FRegisterValue
{
float s;
double d;
long double q;
// eventually we will need to be able to access the data as a vector
// the integral array elements allow us to access the bits in s, d,
// q, vs and vd at an appropriate level of granularity
u_int8_t vb[16];
u_int16_t vh[8];
u_int32_t vw[4];
u_int64_t vx[2];
float vs[4];
double vd[2];
};
class FRegister
{
public:
FRegisterValue value;
};
/*
* CPSR register -- this does not exist as a directly accessible
* register but we need to store the flags so we can implement
* flag-seting and flag testing operations
*
* we can possibly use injected x86 asm to report the outcome of flag
* setting operations. if so we will need to grab the flags
* immediately after the operation in order to ensure we don't lose
* them because of the actions of the simulator. so we still need
* somewhere to store the condition codes.
*/
class CPSRRegister
{
public:
u_int32_t value;
/*
* condition register bit select values
*
* the order of bits here is important because some of
* the flag setting conditional instructions employ a
* bit field to populate the flags when a false condition
* bypasses execution of the operation and we want to
* be able to assign the flags register using the
* supplied value.
*/
enum CPSRIdx {
V_IDX,
C_IDX,
Z_IDX,
N_IDX
};
enum CPSRMask {
V = 1 << V_IDX,
C = 1 << C_IDX,
Z = 1 << Z_IDX,
N = 1 << N_IDX
};
static const int CPSR_ALL_FLAGS = (V | C | Z | N);
};
// auxiliary function to assemble the relevant bits from
// the x86 EFLAGS register into an ARM CPSR value
#define X86_V_IDX 11
#define X86_C_IDX 0
#define X86_Z_IDX 6
#define X86_N_IDX 7
#define X86_V (1 << X86_V_IDX)
#define X86_C (1 << X86_C_IDX)
#define X86_Z (1 << X86_Z_IDX)
#define X86_N (1 << X86_N_IDX)
inline u_int32_t convertX86Flags(u_int32_t x86flags)
{
u_int32_t flags;
// set N flag
flags = ((x86flags & X86_N) >> X86_N_IDX);
// shift then or in Z flag
flags <<= 1;
flags |= ((x86flags & X86_Z) >> X86_Z_IDX);
// shift then or in C flag
flags <<= 1;
flags |= ((x86flags & X86_C) >> X86_C_IDX);
// shift then or in V flag
flags <<= 1;
flags |= ((x86flags & X86_V) >> X86_V_IDX);
return flags;
}
inline u_int32_t convertX86FlagsFP(u_int32_t x86flags)
{
// x86 flags set by fcomi(x,y) are ZF:PF:CF
// (yes, that's PF for parity, WTF?)
// where
// 0) 0:0:0 means x > y
// 1) 0:0:1 means x < y
// 2) 1:0:0 means x = y
// 3) 1:1:1 means x and y are unordered
// note that we don't have to check PF so
// we really have a simple 2-bit case switch
// the corresponding ARM64 flags settings
// in hi->lo bit order are
// 0) --C-
// 1) N---
// 2) -ZC-
// 3) --CV
static u_int32_t armFlags[] = {
0b0010,
0b1000,
0b0110,
0b0011
};
// pick out the ZF and CF bits
u_int32_t zc = ((x86flags & X86_Z) >> X86_Z_IDX);
zc <<= 1;
zc |= ((x86flags & X86_C) >> X86_C_IDX);
return armFlags[zc];
}
/*
* FPSR register -- floating point status register
* this register includes IDC, IXC, UFC, OFC, DZC, IOC and QC bits,
* and the floating point N, Z, C, V bits but the latter are unused in
* aarch64 mode. the sim ignores QC for now.
*
* bit positions are as per the ARMv7 FPSCR register
*
* IDC : 7 ==> Input Denormal (cumulative exception bit)
* IXC : 4 ==> Inexact
* UFC : 3 ==> Underflow
* OFC : 2 ==> Overflow
* DZC : 1 ==> Division by Zero
* IOC : 0 ==> Invalid Operation
*/
class FPSRRegister
{
public:
u_int32_t value;
// indices for bits in the FPSR register value
enum FPSRIdx {
IO_IDX = 0,
DZ_IDX = 1,
OF_IDX = 2,
UF_IDX = 3,
IX_IDX = 4,
ID_IDX = 7
};
// corresponding bits as numeric values
enum FPSRMask {
IO = (1 << IO_IDX),
DZ = (1 << DZ_IDX),
OF = (1 << OF_IDX),
UF = (1 << UF_IDX),
IX = (1 << IX_IDX),
ID = (1 << ID_IDX)
};
static const int FPSR_ALL_FPSRS = (IO | DZ | OF | UF | IX | ID);
};
// debugger support
enum PrintFormat
{
FMT_DECIMAL,
FMT_HEX,
FMT_SINGLE,
FMT_DOUBLE,
FMT_QUAD,
FMT_MULTI
};
/*
* model of the registers and other state associated with the cpu
*/
class CPUState
{
friend class AArch64Simulator;
private:
// this is the PC of the instruction being executed
u_int64_t pc;
// this is the PC of the instruction to be executed next
// it is defaulted to pc + 4 at instruction decode but
// execute may reset it
u_int64_t nextpc;
GRegister gr[33]; // extra register at index 32 is used
// to hold zero value
FRegister fr[32];
CPSRRegister cpsr;
FPSRRegister fpsr;
public:
CPUState() {
gr[20].value.u64 = 0; // establish initial condition for
// checkAssertions()
trace_counter = 0;
}
// General Register access macros
// only xreg or xregs can be used as an lvalue in order to update a
// register. this ensures that the top part of a register is always
// assigned when it is written by the sim.
inline u_int64_t &xreg(GReg reg, int r31_is_sp) {
if (reg == R31 && !r31_is_sp) {
return gr[32].value.u64;
} else {
return gr[reg].value.u64;
}
}
inline int64_t &xregs(GReg reg, int r31_is_sp) {
if (reg == R31 && !r31_is_sp) {
return gr[32].value.s64;
} else {
return gr[reg].value.s64;
}
}
inline u_int32_t wreg(GReg reg, int r31_is_sp) {
if (reg == R31 && !r31_is_sp) {
return gr[32].value.u32;
} else {
return gr[reg].value.u32;
}
}
inline int32_t wregs(GReg reg, int r31_is_sp) {
if (reg == R31 && !r31_is_sp) {
return gr[32].value.s32;
} else {
return gr[reg].value.s32;
}
}
inline u_int32_t hreg(GReg reg, int r31_is_sp) {
if (reg == R31 && !r31_is_sp) {
return gr[32].value.u16;
} else {
return gr[reg].value.u16;
}
}
inline int32_t hregs(GReg reg, int r31_is_sp) {
if (reg == R31 && !r31_is_sp) {
return gr[32].value.s16;
} else {
return gr[reg].value.s16;
}
}
inline u_int32_t breg(GReg reg, int r31_is_sp) {
if (reg == R31 && !r31_is_sp) {
return gr[32].value.u8;
} else {
return gr[reg].value.u8;
}
}
inline int32_t bregs(GReg reg, int r31_is_sp) {
if (reg == R31 && !r31_is_sp) {
return gr[32].value.s8;
} else {
return gr[reg].value.s8;
}
}
// FP Register access macros
// all non-vector accessors return a reference so we can both read
// and assign
inline float &sreg(VReg reg) {
return fr[reg].value.s;
}
inline double &dreg(VReg reg) {
return fr[reg].value.d;
}
inline long double &qreg(VReg reg) {
return fr[reg].value.q;
}
// all vector register accessors return a pointer
inline float *vsreg(VReg reg) {
return &fr[reg].value.vs[0];
}
inline double *vdreg(VReg reg) {
return &fr[reg].value.vd[0];
}
inline u_int8_t *vbreg(VReg reg) {
return &fr[reg].value.vb[0];
}
inline u_int16_t *vhreg(VReg reg) {
return &fr[reg].value.vh[0];
}
inline u_int32_t *vwreg(VReg reg) {
return &fr[reg].value.vw[0];
}
inline u_int64_t *vxreg(VReg reg) {
return &fr[reg].value.vx[0];
}
union GRegisterValue prev_sp, prev_fp;
static const int trace_size = 256;
u_int64_t trace_buffer[trace_size];
int trace_counter;
bool checkAssertions()
{
// Make sure that SP is 16-aligned
// Also make sure that ESP is above SP.
// We don't care about checking ESP if it is null, i.e. it hasn't
// been used yet.
if (gr[31].value.u64 & 0x0f) {
asm volatile("nop");
return false;
}
return true;
}
// pc register accessors
// this instruction can be used to fetch the current PC
u_int64_t getPC();
// instead of setting the current PC directly you can
// first set the next PC (either absolute or PC-relative)
// and later copy the next PC into the current PC
// this supports a default increment by 4 at instruction
// fetch with an optional reset by control instructions
u_int64_t getNextPC();
void setNextPC(u_int64_t next);
void offsetNextPC(int64_t offset);
// install nextpc as current pc
void updatePC();
// this instruction can be used to save the next PC to LR
// just before installing a branch PC
inline void saveLR() { gr[LR].value.u64 = nextpc; }
// cpsr register accessors
u_int32_t getCPSRRegister();
void setCPSRRegister(u_int32_t flags);
// read a specific subset of the flags as a bit pattern
// mask should be composed using elements of enum FlagMask
u_int32_t getCPSRBits(u_int32_t mask);
// assign a specific subset of the flags as a bit pattern
// mask and value should be composed using elements of enum FlagMask
void setCPSRBits(u_int32_t mask, u_int32_t value);
// test the value of a single flag returned as 1 or 0
u_int32_t testCPSR(CPSRRegister::CPSRIdx idx);
// set a single flag
void setCPSR(CPSRRegister::CPSRIdx idx);
// clear a single flag
void clearCPSR(CPSRRegister::CPSRIdx idx);
// utility method to set ARM CSPR flags from an x86 bit mask generated by integer arithmetic
void setCPSRRegisterFromX86(u_int64_t x86Flags);
// utility method to set ARM CSPR flags from an x86 bit mask generated by floating compare
void setCPSRRegisterFromX86FP(u_int64_t x86Flags);
// fpsr register accessors
u_int32_t getFPSRRegister();
void setFPSRRegister(u_int32_t flags);
// read a specific subset of the fprs bits as a bit pattern
// mask should be composed using elements of enum FPSRRegister::FlagMask
u_int32_t getFPSRBits(u_int32_t mask);
// assign a specific subset of the flags as a bit pattern
// mask and value should be composed using elements of enum FPSRRegister::FlagMask
void setFPSRBits(u_int32_t mask, u_int32_t value);
// test the value of a single flag returned as 1 or 0
u_int32_t testFPSR(FPSRRegister::FPSRIdx idx);
// set a single flag
void setFPSR(FPSRRegister::FPSRIdx idx);
// clear a single flag
void clearFPSR(FPSRRegister::FPSRIdx idx);
// debugger support
void printPC(int pending, const char *trailing = "\n");
void printInstr(u_int32_t instr, void (*dasm)(u_int64_t), const char *trailing = "\n");
void printGReg(GReg reg, PrintFormat format = FMT_HEX, const char *trailing = "\n");
void printVReg(VReg reg, PrintFormat format = FMT_HEX, const char *trailing = "\n");
void printCPSR(const char *trailing = "\n");
void printFPSR(const char *trailing = "\n");
void dumpState();
};
#endif // ifndef _CPU_STATE_H

412
src/hotspot/cpu/aarch64/decode_aarch64.hpp
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@ -1,412 +0,0 @@
/*
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
*
*/
#ifndef _DECODE_H
#define _DECODE_H
#include <sys/types.h>
#include "cpustate_aarch64.hpp"
// bitfield immediate expansion helper
extern int expandLogicalImmediate(u_int32_t immN, u_int32_t immr,
u_int32_t imms, u_int64_t &bimm);
/*
* codes used in conditional instructions
*
* these are passed to conditional operations to identify which
* condition to test for
*/
enum CondCode {
EQ = 0b0000, // meaning Z == 1
NE = 0b0001, // meaning Z == 0
HS = 0b0010, // meaning C == 1
CS = HS,
LO = 0b0011, // meaning C == 0
CC = LO,
MI = 0b0100, // meaning N == 1
PL = 0b0101, // meaning N == 0
VS = 0b0110, // meaning V == 1
VC = 0b0111, // meaning V == 0
HI = 0b1000, // meaning C == 1 && Z == 0
LS = 0b1001, // meaning !(C == 1 && Z == 0)
GE = 0b1010, // meaning N == V
LT = 0b1011, // meaning N != V
GT = 0b1100, // meaning Z == 0 && N == V
LE = 0b1101, // meaning !(Z == 0 && N == V)
AL = 0b1110, // meaning ANY
NV = 0b1111 // ditto
};
/*
* certain addressing modes for load require pre or post writeback of
* the computed address to a base register
*/
enum WriteBack {
Post = 0,
Pre = 1
};
/*
* certain addressing modes for load require an offset to
* be optionally scaled so the decode needs to pass that
* through to the execute routine
*/
enum Scaling {
Unscaled = 0,
Scaled = 1
};
/*
* when we do have to scale we do so by shifting using
* log(bytes in data element - 1) as the shift count.
* so we don't have to scale offsets when loading
* bytes.
*/
enum ScaleShift {
ScaleShift16 = 1,
ScaleShift32 = 2,
ScaleShift64 = 3,
ScaleShift128 = 4
};
/*
* one of the addressing modes for load requires a 32-bit register
* value to be either zero- or sign-extended for these instructions
* UXTW or SXTW should be passed
*
* arithmetic register data processing operations can optionally
* extend a portion of the second register value for these
* instructions the value supplied must identify the portion of the
* register which is to be zero- or sign-exended
*/
enum Extension {
UXTB = 0,
UXTH = 1,
UXTW = 2,
UXTX = 3,
SXTB = 4,
SXTH = 5,
SXTW = 6,
SXTX = 7
};
/*
* arithmetic and logical register data processing operations
* optionally perform a shift on the second register value
*/
enum Shift {
LSL = 0,
LSR = 1,
ASR = 2,
ROR = 3
};
/*
* bit twiddling helpers for instruction decode
*/
// 32 bit mask with bits [hi,...,lo] set
static inline u_int32_t mask32(int hi = 31, int lo = 0)
{
int nbits = (hi + 1) - lo;
return ((1 << nbits) - 1) << lo;
}
static inline u_int64_t mask64(int hi = 63, int lo = 0)
{
int nbits = (hi + 1) - lo;
return ((1L << nbits) - 1) << lo;
}
// pick bits [hi,...,lo] from val
static inline u_int32_t pick32(u_int32_t val, int hi = 31, int lo = 0)
{
return (val & mask32(hi, lo));
}
// pick bits [hi,...,lo] from val
static inline u_int64_t pick64(u_int64_t val, int hi = 31, int lo = 0)
{
return (val & mask64(hi, lo));
}
// pick bits [hi,...,lo] from val and shift to [(hi-(newlo - lo)),newlo]
static inline u_int32_t pickshift32(u_int32_t val, int hi = 31,
int lo = 0, int newlo = 0)
{
u_int32_t bits = pick32(val, hi, lo);
if (lo < newlo) {
return (bits << (newlo - lo));
} else {
return (bits >> (lo - newlo));
}
}
// mask [hi,lo] and shift down to start at bit 0
static inline u_int32_t pickbits32(u_int32_t val, int hi = 31, int lo = 0)
{
return (pick32(val, hi, lo) >> lo);
}
// mask [hi,lo] and shift down to start at bit 0
static inline u_int64_t pickbits64(u_int64_t val, int hi = 63, int lo = 0)
{
return (pick64(val, hi, lo) >> lo);
}
/*
* decode registers, immediates and constants of various types
*/
static inline GReg greg(u_int32_t val, int lo)
{
return (GReg)pickbits32(val, lo + 4, lo);
}
static inline VReg vreg(u_int32_t val, int lo)
{
return (VReg)pickbits32(val, lo + 4, lo);
}
static inline u_int32_t uimm(u_int32_t val, int hi, int lo)
{
return pickbits32(val, hi, lo);
}
static inline int32_t simm(u_int32_t val, int hi = 31, int lo = 0) {
union {
u_int32_t u;
int32_t n;
};
u = val << (31 - hi);
n = n >> (31 - hi + lo);
return n;
}
static inline int64_t simm(u_int64_t val, int hi = 63, int lo = 0) {
union {
u_int64_t u;
int64_t n;
};
u = val << (63 - hi);
n = n >> (63 - hi + lo);
return n;
}
static inline Shift shift(u_int32_t val, int lo)
{
return (Shift)pickbits32(val, lo+1, lo);
}
static inline Extension extension(u_int32_t val, int lo)
{
return (Extension)pickbits32(val, lo+2, lo);
}
static inline Scaling scaling(u_int32_t val, int lo)
{
return (Scaling)pickbits32(val, lo, lo);
}
static inline WriteBack writeback(u_int32_t val, int lo)
{
return (WriteBack)pickbits32(val, lo, lo);
}
static inline CondCode condcode(u_int32_t val, int lo)
{
return (CondCode)pickbits32(val, lo+3, lo);
}
/*
* operation decode
*/
// bits [28,25] are the primary dispatch vector
static inline u_int32_t dispatchGroup(u_int32_t val)
{
return pickshift32(val, 28, 25, 0);
}
/*
* the 16 possible values for bits [28,25] identified by tags which
* map them to the 5 main instruction groups LDST, DPREG, ADVSIMD,
* BREXSYS and DPIMM.
*
* An extra group PSEUDO is included in one of the unallocated ranges
* for simulator-specific pseudo-instructions.
*/
enum DispatchGroup {
GROUP_PSEUDO_0000,
GROUP_UNALLOC_0001,
GROUP_UNALLOC_0010,
GROUP_UNALLOC_0011,
GROUP_LDST_0100,
GROUP_DPREG_0101,
GROUP_LDST_0110,
GROUP_ADVSIMD_0111,
GROUP_DPIMM_1000,
GROUP_DPIMM_1001,
GROUP_BREXSYS_1010,
GROUP_BREXSYS_1011,
GROUP_LDST_1100,
GROUP_DPREG_1101,
GROUP_LDST_1110,
GROUP_ADVSIMD_1111
};
// bits [31, 29] of a Pseudo are the secondary dispatch vector
static inline u_int32_t dispatchPseudo(u_int32_t val)
{
return pickshift32(val, 31, 29, 0);
}
/*
* the 8 possible values for bits [31,29] in a Pseudo Instruction.
* Bits [28,25] are always 0000.
*/
enum DispatchPseudo {
PSEUDO_UNALLOC_000, // unallocated
PSEUDO_UNALLOC_001, // ditto
PSEUDO_UNALLOC_010, // ditto
PSEUDO_UNALLOC_011, // ditto
PSEUDO_UNALLOC_100, // ditto
PSEUDO_UNALLOC_101, // ditto
PSEUDO_CALLOUT_110, // CALLOUT -- bits [24,0] identify call/ret sig
PSEUDO_HALT_111 // HALT -- bits [24, 0] identify halt code
};
// bits [25, 23] of a DPImm are the secondary dispatch vector
static inline u_int32_t dispatchDPImm(u_int32_t instr)
{
return pickshift32(instr, 25, 23, 0);
}
/*
* the 8 possible values for bits [25,23] in a Data Processing Immediate
* Instruction. Bits [28,25] are always 100_.
*/
enum DispatchDPImm {
DPIMM_PCADR_000, // PC-rel-addressing
DPIMM_PCADR_001, // ditto
DPIMM_ADDSUB_010, // Add/Subtract (immediate)
DPIMM_ADDSUB_011, // ditto
DPIMM_LOG_100, // Logical (immediate)
DPIMM_MOV_101, // Move Wide (immediate)
DPIMM_BITF_110, // Bitfield
DPIMM_EXTR_111 // Extract
};
// bits [29,28:26] of a LS are the secondary dispatch vector
static inline u_int32_t dispatchLS(u_int32_t instr)
{
return (pickshift32(instr, 29, 28, 1) |
pickshift32(instr, 26, 26, 0));
}
/*
* the 8 possible values for bits [29,28:26] in a Load/Store
* Instruction. Bits [28,25] are always _1_0
*/
enum DispatchLS {
LS_EXCL_000, // Load/store exclusive (includes some unallocated)
LS_ADVSIMD_001, // AdvSIMD load/store (various -- includes some unallocated)
LS_LIT_010, // Load register literal (includes some unallocated)
LS_LIT_011, // ditto
LS_PAIR_100, // Load/store register pair (various)
LS_PAIR_101, // ditto
LS_OTHER_110, // other load/store formats
LS_OTHER_111 // ditto
};
// bits [28:24:21] of a DPReg are the secondary dispatch vector
static inline u_int32_t dispatchDPReg(u_int32_t instr)
{
return (pickshift32(instr, 28, 28, 2) |
pickshift32(instr, 24, 24, 1) |
pickshift32(instr, 21, 21, 0));
}
/*
* the 8 possible values for bits [28:24:21] in a Data Processing
* Register Instruction. Bits [28,25] are always _101
*/
enum DispatchDPReg {
DPREG_LOG_000, // Logical (shifted register)
DPREG_LOG_001, // ditto
DPREG_ADDSHF_010, // Add/subtract (shifted register)
DPREG_ADDEXT_011, // Add/subtract (extended register)
DPREG_ADDCOND_100, // Add/subtract (with carry) AND
// Cond compare/select AND
// Data Processing (1/2 source)
DPREG_UNALLOC_101, // Unallocated
DPREG_3SRC_110, // Data Processing (3 source)
DPREG_3SRC_111 // Data Processing (3 source)
};
// bits [31,29] of a BrExSys are the secondary dispatch vector
static inline u_int32_t dispatchBrExSys(u_int32_t instr)
{
return pickbits32(instr, 31, 29);
}
/*
* the 8 possible values for bits [31,29] in a Branch/Exception/System
* Instruction. Bits [28,25] are always 101_
*/
enum DispatchBr {
BR_IMM_000, // Unconditional branch (immediate)
BR_IMMCMP_001, // Compare & branch (immediate) AND
// Test & branch (immediate)
BR_IMMCOND_010, // Conditional branch (immediate) AND Unallocated
BR_UNALLOC_011, // Unallocated
BR_IMM_100, // Unconditional branch (immediate)
BR_IMMCMP_101, // Compare & branch (immediate) AND
// Test & branch (immediate)
BR_REG_110, // Unconditional branch (register) AND System AND
// Excn gen AND Unallocated
BR_UNALLOC_111 // Unallocated
};
/*
* TODO still need to provide secondary decode and dispatch for
* AdvSIMD Insructions with instr[28,25] = 0111 or 1111
*/
#endif // ifndef DECODE_H

2
src/hotspot/cpu/aarch64/frame_aarch64.cpp
View File

@ -27,7 +27,7 @@
#include "interpreter/interpreter.hpp"
#include "memory/resourceArea.hpp"
#include "memory/universe.hpp"
#include "oops/markOop.hpp"
#include "oops/markWord.hpp"
#include "oops/method.hpp"
#include "oops/oop.inline.hpp"
#include "prims/methodHandles.hpp"

3
src/hotspot/cpu/aarch64/gc/shenandoah/c1/shenandoahBarrierSetC1_aarch64.cpp
View File

@ -100,6 +100,9 @@ LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRIt
if (access.is_oop()) {
result = load_reference_barrier(access.gen(), result);
LIR_Opr tmp = gen->new_register(type);
__ move(result, tmp);
result = tmp;
if (ShenandoahSATBBarrier) {
pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr,
result /* pre_val */);

92
src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.cpp
View File

@ -242,9 +242,9 @@ void ShenandoahBarrierSetAssembler::resolve_forward_pointer_not_null(MacroAssemb
Label done;
__ ldr(tmp, Address(dst, oopDesc::mark_offset_in_bytes()));
__ eon(tmp, tmp, zr);
__ ands(zr, tmp, markOopDesc::lock_mask_in_place);
__ ands(zr, tmp, markWord::lock_mask_in_place);
__ br(Assembler::NE, done);
__ orr(tmp, tmp, markOopDesc::marked_value);
__ orr(tmp, tmp, markWord::marked_value);
__ eon(dst, tmp, zr);
__ bind(done);
@ -306,7 +306,7 @@ void ShenandoahBarrierSetAssembler::load_reference_barrier_native(MacroAssembler
__ push_call_clobbered_registers();
__ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_native));
__ mov(r0, rscratch2);
__ blrt(lr, 1, 0, MacroAssembler::ret_type_integral);
__ blr(lr);
__ mov(rscratch2, r0);
__ pop_call_clobbered_registers();
__ mov(dst, rscratch2);
@ -415,6 +415,26 @@ void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet
}
void ShenandoahBarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
Register obj, Register tmp, Label& slowpath) {
Label done;
// Resolve jobject
BarrierSetAssembler::try_resolve_jobject_in_native(masm, jni_env, obj, tmp, slowpath);
// Check for null.
__ cbz(obj, done);
assert(obj != rscratch2, "need rscratch2");
Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
__ ldrb(rscratch2, gc_state);
// Check for heap in evacuation phase
__ tbnz(rscratch2, ShenandoahHeap::EVACUATION_BITPOS, slowpath);
__ bind(done);
}
void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm, Register addr, Register expected, Register new_val,
bool acquire, bool release, bool weak, bool is_cae,
Register result) {
@ -501,23 +521,45 @@ void ShenandoahBarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, Shen
}
void ShenandoahBarrierSetAssembler::gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub) {
ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
__ bind(*stub->entry());
Register obj = stub->obj()->as_register();
Register res = stub->result()->as_register();
Register tmp1 = stub->tmp1()->as_register();
Register tmp2 = stub->tmp2()->as_register();
Label done;
__ bind(*stub->entry());
assert(res == r0, "result must arrive in r0");
if (res != obj) {
__ mov(res, obj);
}
// Check for null.
__ cbz(res, done);
__ cbz(res, *stub->continuation());
load_reference_barrier_not_null(ce->masm(), res, rscratch1);
// Check for object in cset.
__ mov(tmp2, ShenandoahHeap::in_cset_fast_test_addr());
__ lsr(tmp1, res, ShenandoahHeapRegion::region_size_bytes_shift_jint());
__ ldrb(tmp2, Address(tmp2, tmp1));
__ cbz(tmp2, *stub->continuation());
// Check if object is already forwarded.
Label slow_path;
__ ldr(tmp1, Address(res, oopDesc::mark_offset_in_bytes()));
__ eon(tmp1, tmp1, zr);
__ ands(zr, tmp1, markWord::lock_mask_in_place);
__ br(Assembler::NE, slow_path);
// Decode forwarded object.
__ orr(tmp1, tmp1, markWord::marked_value);
__ eon(res, tmp1, zr);
__ b(*stub->continuation());
__ bind(slow_path);
ce->store_parameter(res, 0);
__ far_call(RuntimeAddress(bs->load_reference_barrier_rt_code_blob()->code_begin()));
__ bind(done);
__ b(*stub->continuation());
}
@ -571,6 +613,21 @@ void ShenandoahBarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAss
__ epilogue();
}
void ShenandoahBarrierSetAssembler::generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm) {
__ prologue("shenandoah_load_reference_barrier", false);
// arg0 : object to be resolved
__ push_call_clobbered_registers();
__ load_parameter(0, r0);
__ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier));
__ blr(lr);
__ mov(rscratch1, r0);
__ pop_call_clobbered_registers();
__ mov(r0, rscratch1);
__ epilogue();
}
#undef __
#endif // COMPILER1
@ -605,17 +662,24 @@ address ShenandoahBarrierSetAssembler::generate_shenandoah_lrb(StubCodeGenerator
__ ret(lr);
__ bind(work);
__ mov(rscratch2, r0);
resolve_forward_pointer_not_null(cgen->assembler(), r0, rscratch1);
__ cmp(rscratch2, r0);
__ br(Assembler::NE, done);
Label slow_path;
__ ldr(rscratch1, Address(r0, oopDesc::mark_offset_in_bytes()));
__ eon(rscratch1, rscratch1, zr);
__ ands(zr, rscratch1, markWord::lock_mask_in_place);
__ br(Assembler::NE, slow_path);
// Decode forwarded object.
__ orr(rscratch1, rscratch1, markWord::marked_value);
__ eon(r0, rscratch1, zr);
__ ret(lr);
__ bind(slow_path);
__ enter(); // required for proper stackwalking of RuntimeStub frame
__ push_call_clobbered_registers();
__ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier));
__ blrt(lr, 1, 0, MacroAssembler::ret_type_integral);
__ blr(lr);
__ mov(rscratch1, r0);
__ pop_call_clobbered_registers();
__ mov(r0, rscratch1);

3
src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.hpp
View File

@ -71,6 +71,7 @@ public:
void gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub);
void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub);
void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
void generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm);
#endif
virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
@ -81,6 +82,8 @@ public:
Register dst, Address src, Register tmp1, Register tmp_thread);
virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
Address dst, Register val, Register tmp1, Register tmp2);
virtual void try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
Register obj, Register tmp, Label& slowpath);
void cmpxchg_oop(MacroAssembler* masm, Register addr, Register expected, Register new_val,
bool acquire, bool release, bool weak, bool is_cae, Register result);

48
src/hotspot/cpu/aarch64/globals_aarch64.hpp
View File

@ -1,6 +1,6 @@
/*
* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2015, Red Hat Inc. All rights reserved.
* Copyright (c) 2015, 2019, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -32,8 +32,6 @@
// Sets the default values for platform dependent flags used by the runtime system.
// (see globals.hpp)
define_pd_global(bool, ShareVtableStubs, true);
define_pd_global(bool, ImplicitNullChecks, true); // Generate code for implicit null checks
define_pd_global(bool, TrapBasedNullChecks, false);
define_pd_global(bool, UncommonNullCast, true); // Uncommon-trap NULLs past to check cast
@ -82,48 +80,6 @@ define_pd_global(bool, ThreadLocalHandshakes, true);
define_pd_global(intx, InlineSmallCode, 1000);
#endif
#ifdef BUILTIN_SIM
#define UseBuiltinSim true
#define ARCH_FLAGS(develop, \
product, \
diagnostic, \
experimental, \
notproduct, \
range, \
constraint, \
writeable) \
\
product(bool, NotifySimulator, UseBuiltinSim, \
"tell the AArch64 sim where we are in method code") \
\
product(bool, UseSimulatorCache, false, \
"tell sim to cache memory updates until exclusive op occurs") \
\
product(bool, DisableBCCheck, true, \
"tell sim not to invoke bccheck callback") \
\
product(bool, NearCpool, true, \
"constant pool is close to instructions") \
\
product(bool, UseBarriersForVolatile, false, \
"Use memory barriers to implement volatile accesses") \
\
product(bool, UseCRC32, false, \
"Use CRC32 instructions for CRC32 computation") \
\
product(bool, UseLSE, false, \
"Use LSE instructions") \
// Don't attempt to use Neon on builtin sim until builtin sim supports it
#define UseCRC32 false
#define UseSIMDForMemoryOps false
#define AvoidUnalignedAcesses false
#else
#define UseBuiltinSim false
#define NotifySimulator false
#define UseSimulatorCache false
#define DisableBCCheck true
#define ARCH_FLAGS(develop, \
product, \
diagnostic, \
@ -162,7 +118,5 @@ define_pd_global(intx, InlineSmallCode, 1000);
"Use prfm hint with specified distance in compiled code." \
"Value -1 means off.") \
range(-1, 4096)
#endif
#endif // CPU_AARCH64_GLOBALS_AARCH64_HPP

46
src/hotspot/cpu/aarch64/immediate_aarch64.cpp
View File

@ -23,7 +23,6 @@
*/
#include <stdlib.h>
#include "decode_aarch64.hpp"
#include "immediate_aarch64.hpp"
// there are at most 2^13 possible logical immediate encodings
@ -69,12 +68,57 @@ static inline u_int64_t ones(int N)
return (N == 64 ? (u_int64_t)-1UL : ((1UL << N) - 1));
}
/*
* bit twiddling helpers for instruction decode
*/
// 32 bit mask with bits [hi,...,lo] set
static inline u_int32_t mask32(int hi = 31, int lo = 0)
{
int nbits = (hi + 1) - lo;
return ((1 << nbits) - 1) << lo;
}
static inline u_int64_t mask64(int hi = 63, int lo = 0)
{
int nbits = (hi + 1) - lo;
return ((1L << nbits) - 1) << lo;
}
// pick bits [hi,...,lo] from val
static inline u_int32_t pick32(u_int32_t val, int hi = 31, int lo = 0)
{
return (val & mask32(hi, lo));
}
// pick bits [hi,...,lo] from val
static inline u_int64_t pick64(u_int64_t val, int hi = 31, int lo = 0)
{
return (val & mask64(hi, lo));
}
// mask [hi,lo] and shift down to start at bit 0
static inline u_int32_t pickbits32(u_int32_t val, int hi = 31, int lo = 0)
{
return (pick32(val, hi, lo) >> lo);
}
// mask [hi,lo] and shift down to start at bit 0
static inline u_int64_t pickbits64(u_int64_t val, int hi = 63, int lo = 0)
{
return (pick64(val, hi, lo) >> lo);
}
// result<0> to val<N>
static inline u_int64_t pickbit(u_int64_t val, int N)
{
return pickbits64(val, N, N);
}
static inline u_int32_t uimm(u_int32_t val, int hi, int lo)
{
return pickbits32(val, hi, lo);
}
// SPEC bits(M*N) Replicate(bits(M) x, integer N);
// this is just an educated guess

2
src/hotspot/cpu/aarch64/interp_masm_aarch64.cpp
View File

@ -32,7 +32,7 @@
#include "interpreter/interpreterRuntime.hpp"
#include "logging/log.hpp"
#include "oops/arrayOop.hpp"
#include "oops/markOop.hpp"
#include "oops/markWord.hpp"
#include "oops/method.hpp"
#include "oops/methodData.hpp"
#include "prims/jvmtiExport.hpp"

48
src/hotspot/cpu/aarch64/interpreterRT_aarch64.cpp
View File

@ -259,29 +259,6 @@ void InterpreterRuntime::SignatureHandlerGenerator::generate(uint64_t fingerprin
// generate code to handle arguments
iterate(fingerprint);
// set the call format
// n.b. allow extra 1 for the JNI_Env in c_rarg0
unsigned int call_format = ((_num_int_args + 1) << 6) | (_num_fp_args << 2);
switch (method()->result_type()) {
case T_VOID:
call_format |= MacroAssembler::ret_type_void;
break;
case T_FLOAT:
call_format |= MacroAssembler::ret_type_float;
break;
case T_DOUBLE:
call_format |= MacroAssembler::ret_type_double;
break;
default:
call_format |= MacroAssembler::ret_type_integral;
break;
}
// // store the call format in the method
// __ movw(r0, call_format);
// __ str(r0, Address(rmethod, Method::call_format_offset()));
// return result handler
__ lea(r0, ExternalAddress(Interpreter::result_handler(method()->result_type())));
__ ret(lr);
@ -392,28 +369,6 @@ class SlowSignatureHandler
_num_fp_args = 0;
}
// n.b. allow extra 1 for the JNI_Env in c_rarg0
unsigned int get_call_format()
{
unsigned int call_format = ((_num_int_args + 1) << 6) | (_num_fp_args << 2);
switch (method()->result_type()) {
case T_VOID:
call_format |= MacroAssembler::ret_type_void;
break;
case T_FLOAT:
call_format |= MacroAssembler::ret_type_float;
break;
case T_DOUBLE:
call_format |= MacroAssembler::ret_type_double;
break;
default:
call_format |= MacroAssembler::ret_type_integral;
break;
}
return call_format;
}
};
@ -429,9 +384,6 @@ JRT_ENTRY(address,
SlowSignatureHandler ssh(m, (address)from, to);
ssh.iterate(UCONST64(-1));
// // set the call format
// method->set_call_format(ssh.get_call_format());
// return result handler
return Interpreter::result_handler(m->result_type());
JRT_END

1
src/hotspot/cpu/aarch64/interpreterRT_aarch64.hpp
View File

@ -34,7 +34,6 @@
class SignatureHandlerGenerator: public NativeSignatureIterator {
private:
MacroAssembler* _masm;
unsigned int _call_format;
unsigned int _num_fp_args;
unsigned int _num_int_args;
int _stack_offset;

54
src/hotspot/cpu/aarch64/jniFastGetField_aarch64.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2004, 2017, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2004, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -79,33 +79,57 @@ address JNI_FastGetField::generate_fast_get_int_field0(BasicType type) {
Address safepoint_counter_addr(rcounter_addr, offset);
__ ldrw(rcounter, safepoint_counter_addr);
__ tbnz(rcounter, 0, slow);
__ eor(robj, c_rarg1, rcounter);
__ eor(robj, robj, rcounter); // obj, since
// robj ^ rcounter ^ rcounter == robj
// robj is address dependent on rcounter.
if (!UseBarriersForVolatile) {
// Field may be volatile. See other usages of this flag.
__ membar(MacroAssembler::AnyAny);
__ mov(robj, c_rarg1);
} else if (JvmtiExport::can_post_field_access()) {
// Using barrier to order wrt. JVMTI check and load of result.
__ membar(Assembler::LoadLoad);
__ mov(robj, c_rarg1);
} else {
// Using address dependency to order wrt. load of result.
__ eor(robj, c_rarg1, rcounter);
__ eor(robj, robj, rcounter); // obj, since
// robj ^ rcounter ^ rcounter == robj
// robj is address dependent on rcounter.
}
if (JvmtiExport::can_post_field_access()) {
// Check to see if a field access watch has been set before we
// take the fast path.
unsigned long offset2;
__ adrp(result,
ExternalAddress((address) JvmtiExport::get_field_access_count_addr()),
offset2);
__ ldrw(result, Address(result, offset2));
__ cbnzw(result, slow);
}
// Both robj and rscratch1 are clobbered by try_resolve_jobject_in_native.
BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
bs->try_resolve_jobject_in_native(masm, c_rarg0, robj, rscratch1, slow);
__ lsr(roffset, c_rarg2, 2); // offset
__ add(result, robj, roffset);
assert(count < LIST_CAPACITY, "LIST_CAPACITY too small");
speculative_load_pclist[count] = __ pc(); // Used by the segfault handler
// Using acquire: Order JVMTI check and load of result wrt. succeeding check
// (LoadStore for volatile field).
switch (type) {
case T_BOOLEAN: __ ldrb (result, Address(robj, roffset)); break;
case T_BYTE: __ ldrsb (result, Address(robj, roffset)); break;
case T_CHAR: __ ldrh (result, Address(robj, roffset)); break;
case T_SHORT: __ ldrsh (result, Address(robj, roffset)); break;
case T_FLOAT: __ ldrw (result, Address(robj, roffset)); break;
case T_INT: __ ldrsw (result, Address(robj, roffset)); break;
case T_BOOLEAN: __ ldarb(result, result); break;
case T_BYTE: __ ldarb(result, result); __ sxtb(result, result); break;
case T_CHAR: __ ldarh(result, result); break;
case T_SHORT: __ ldarh(result, result); __ sxth(result, result); break;
case T_FLOAT: __ ldarw(result, result); break;
case T_INT: __ ldarw(result, result); __ sxtw(result, result); break;
case T_DOUBLE:
case T_LONG: __ ldr (result, Address(robj, roffset)); break;
case T_LONG: __ ldar (result, result); break;
default: ShouldNotReachHere();
}
// counter_addr is address dependent on result.
__ eor(rcounter_addr, rcounter_addr, result);
__ eor(rcounter_addr, rcounter_addr, result);
__ ldrw(rscratch1, safepoint_counter_addr);
__ cmpw(rcounter, rscratch1);
__ br (Assembler::NE, slow);

117
src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp
View File

@ -472,7 +472,7 @@ int MacroAssembler::biased_locking_enter(Register lock_reg,
counters = BiasedLocking::counters();
assert_different_registers(lock_reg, obj_reg, swap_reg, tmp_reg, rscratch1, rscratch2, noreg);
assert(markOopDesc::age_shift == markOopDesc::lock_bits + markOopDesc::biased_lock_bits, "biased locking makes assumptions about bit layout");
assert(markWord::age_shift == markWord::lock_bits + markWord::biased_lock_bits, "biased locking makes assumptions about bit layout");
Address mark_addr (obj_reg, oopDesc::mark_offset_in_bytes());
Address klass_addr (obj_reg, oopDesc::klass_offset_in_bytes());
Address saved_mark_addr(lock_reg, 0);
@ -489,15 +489,15 @@ int MacroAssembler::biased_locking_enter(Register lock_reg,
null_check_offset = offset();
ldr(swap_reg, mark_addr);
}
andr(tmp_reg, swap_reg, markOopDesc::biased_lock_mask_in_place);
cmp(tmp_reg, (u1)markOopDesc::biased_lock_pattern);
andr(tmp_reg, swap_reg, markWord::biased_lock_mask_in_place);
cmp(tmp_reg, (u1)markWord::biased_lock_pattern);
br(Assembler::NE, cas_label);
// The bias pattern is present in the object's header. Need to check
// whether the bias owner and the epoch are both still current.
load_prototype_header(tmp_reg, obj_reg);
orr(tmp_reg, tmp_reg, rthread);
eor(tmp_reg, swap_reg, tmp_reg);
andr(tmp_reg, tmp_reg, ~((int) markOopDesc::age_mask_in_place));
andr(tmp_reg, tmp_reg, ~((int) markWord::age_mask_in_place));
if (counters != NULL) {
Label around;
cbnz(tmp_reg, around);
@ -520,7 +520,7 @@ int MacroAssembler::biased_locking_enter(Register lock_reg,
// If the low three bits in the xor result aren't clear, that means
// the prototype header is no longer biased and we have to revoke
// the bias on this object.
andr(rscratch1, tmp_reg, markOopDesc::biased_lock_mask_in_place);
andr(rscratch1, tmp_reg, markWord::biased_lock_mask_in_place);
cbnz(rscratch1, try_revoke_bias);
// Biasing is still enabled for this data type. See whether the
@ -532,7 +532,7 @@ int MacroAssembler::biased_locking_enter(Register lock_reg,
// that the current epoch is invalid in order to do this because
// otherwise the manipulations it performs on the mark word are
// illegal.
andr(rscratch1, tmp_reg, markOopDesc::epoch_mask_in_place);
andr(rscratch1, tmp_reg, markWord::epoch_mask_in_place);
cbnz(rscratch1, try_rebias);
// The epoch of the current bias is still valid but we know nothing
@ -543,7 +543,7 @@ int MacroAssembler::biased_locking_enter(Register lock_reg,
// don't accidentally blow away another thread's valid bias.
{
Label here;
mov(rscratch1, markOopDesc::biased_lock_mask_in_place | markOopDesc::age_mask_in_place | markOopDesc::epoch_mask_in_place);
mov(rscratch1, markWord::biased_lock_mask_in_place | markWord::age_mask_in_place | markWord::epoch_mask_in_place);
andr(swap_reg, swap_reg, rscratch1);
orr(tmp_reg, swap_reg, rthread);
cmpxchg_obj_header(swap_reg, tmp_reg, obj_reg, rscratch1, here, slow_case);
@ -628,8 +628,8 @@ void MacroAssembler::biased_locking_exit(Register obj_reg, Register temp_reg, La
// lock, the object could not be rebiased toward another thread, so
// the bias bit would be clear.
ldr(temp_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
andr(temp_reg, temp_reg, markOopDesc::biased_lock_mask_in_place);
cmp(temp_reg, (u1)markOopDesc::biased_lock_pattern);
andr(temp_reg, temp_reg, markWord::biased_lock_mask_in_place);
cmp(temp_reg, (u1)markWord::biased_lock_pattern);
br(Assembler::EQ, done);
}
@ -972,17 +972,6 @@ RegisterOrConstant MacroAssembler::delayed_value_impl(intptr_t* delayed_value_ad
return RegisterOrConstant(tmp);
}
void MacroAssembler:: notify(int type) {
if (type == bytecode_start) {
// set_last_Java_frame(esp, rfp, (address)NULL);
Assembler:: notify(type);
// reset_last_Java_frame(true);
}
else
Assembler:: notify(type);
}
// Look up the method for a megamorphic invokeinterface call.
// The target method is determined by <intf_klass, itable_index>.
// The receiver klass is in recv_klass.
@ -1425,22 +1414,12 @@ Address MacroAssembler::argument_address(RegisterOrConstant arg_slot,
void MacroAssembler::call_VM_leaf_base(address entry_point,
int number_of_arguments,
Label *retaddr) {
call_VM_leaf_base1(entry_point, number_of_arguments, 0, ret_type_integral, retaddr);
}
void MacroAssembler::call_VM_leaf_base1(address entry_point,
int number_of_gp_arguments,
int number_of_fp_arguments,
ret_type type,
Label *retaddr) {
Label E, L;
stp(rscratch1, rmethod, Address(pre(sp, -2 * wordSize)));
// We add 1 to number_of_arguments because the thread in arg0 is
// not counted
mov(rscratch1, entry_point);
blrt(rscratch1, number_of_gp_arguments + 1, number_of_fp_arguments, type);
blr(rscratch1);
if (retaddr)
bind(*retaddr);
@ -2198,8 +2177,7 @@ void MacroAssembler::stop(const char* msg) {
mov(c_rarg1, (address)ip);
mov(c_rarg2, sp);
mov(c_rarg3, CAST_FROM_FN_PTR(address, MacroAssembler::debug64));
// call(c_rarg3);
blrt(c_rarg3, 3, 0, 1);
blr(c_rarg3);
hlt(0);
}
@ -2207,7 +2185,7 @@ void MacroAssembler::warn(const char* msg) {
pusha();
mov(c_rarg0, (address)msg);
mov(lr, CAST_FROM_FN_PTR(address, warning));
blrt(lr, 1, 0, MacroAssembler::ret_type_void);
blr(lr);
popa();
}
@ -2588,50 +2566,6 @@ void MacroAssembler::debug64(char* msg, int64_t pc, int64_t regs[])
}
}
#ifdef BUILTIN_SIM
// routine to generate an x86 prolog for a stub function which
// bootstraps into the generated ARM code which directly follows the
// stub
//
// the argument encodes the number of general and fp registers
// passed by the caller and the callng convention (currently just
// the number of general registers and assumes C argument passing)
extern "C" {
int aarch64_stub_prolog_size();
void aarch64_stub_prolog();
void aarch64_prolog();
}
void MacroAssembler::c_stub_prolog(int gp_arg_count, int fp_arg_count, int ret_type,
address *prolog_ptr)
{
int calltype = (((ret_type & 0x3) << 8) |
((fp_arg_count & 0xf) << 4) |
(gp_arg_count & 0xf));
// the addresses for the x86 to ARM entry code we need to use
address start = pc();
// printf("start = %lx\n", start);
int byteCount = aarch64_stub_prolog_size();
// printf("byteCount = %x\n", byteCount);
int instructionCount = (byteCount + 3)/ 4;
// printf("instructionCount = %x\n", instructionCount);
for (int i = 0; i < instructionCount; i++) {
nop();
}
memcpy(start, (void*)aarch64_stub_prolog, byteCount);
// write the address of the setup routine and the call format at the
// end of into the copied code
u_int64_t *patch_end = (u_int64_t *)(start + byteCount);
if (prolog_ptr)
patch_end[-2] = (u_int64_t)prolog_ptr;
patch_end[-1] = calltype;
}
#endif
void MacroAssembler::push_call_clobbered_registers() {
int step = 4 * wordSize;
push(RegSet::range(r0, r18) - RegSet::of(rscratch1, rscratch2), sp);
@ -5678,7 +5612,6 @@ void MacroAssembler::encode_iso_array(Register src, Register dst,
mov(result, len); // Save initial len
#ifndef BUILTIN_SIM
cmp(len, (u1)8); // handle shortest strings first
br(LT, LOOP_1);
cmp(len, (u1)32);
@ -5754,7 +5687,7 @@ void MacroAssembler::encode_iso_array(Register src, Register dst,
br(GE, NEXT_8);
BIND(LOOP_1);
#endif
cbz(len, DONE);
BIND(NEXT_1);
ldrh(tmp1, Address(post(src, 2)));
@ -5893,10 +5826,32 @@ void MacroAssembler::get_thread(Register dst) {
push(saved_regs, sp);
mov(lr, CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper));
blrt(lr, 1, 0, 1);
blr(lr);
if (dst != c_rarg0) {
mov(dst, c_rarg0);
}
pop(saved_regs, sp);
}
void MacroAssembler::cache_wb(Address line) {
assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
assert(line.index() == noreg, "index should be noreg");
assert(line.offset() == 0, "offset should be 0");
// would like to assert this
// assert(line._ext.shift == 0, "shift should be zero");
if (VM_Version::supports_dcpop()) {
// writeback using clear virtual address to point of persistence
dc(Assembler::CVAP, line.base());
} else {
// no need to generate anything as Unsafe.writebackMemory should
// never invoke this stub
}
}
void MacroAssembler::cache_wbsync(bool is_pre) {
// we only need a barrier post sync
if (!is_pre) {
membar(Assembler::AnyAny);
}
}

30
src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp
View File

@ -1,6 +1,6 @@
/*
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
* Copyright (c) 2014, 2019, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -170,13 +170,10 @@ class MacroAssembler: public Assembler {
virtual void _call_Unimplemented(address call_site) {
mov(rscratch2, call_site);
haltsim();
}
#define call_Unimplemented() _call_Unimplemented((address)__PRETTY_FUNCTION__)
virtual void notify(int type);
// aliases defined in AARCH64 spec
template<class T>
@ -1185,28 +1182,6 @@ public:
//
public:
// enum used for aarch64--x86 linkage to define return type of x86 function
enum ret_type { ret_type_void, ret_type_integral, ret_type_float, ret_type_double};
#ifdef BUILTIN_SIM
void c_stub_prolog(int gp_arg_count, int fp_arg_count, int ret_type, address *prolog_ptr = NULL);
#else
void c_stub_prolog(int gp_arg_count, int fp_arg_count, int ret_type) { }
#endif
// special version of call_VM_leaf_base needed for aarch64 simulator
// where we need to specify both the gp and fp arg counts and the
// return type so that the linkage routine from aarch64 to x86 and
// back knows which aarch64 registers to copy to x86 registers and
// which x86 result register to copy back to an aarch64 register
void call_VM_leaf_base1(
address entry_point, // the entry point
int number_of_gp_arguments, // the number of gp reg arguments to pass
int number_of_fp_arguments, // the number of fp reg arguments to pass
ret_type type, // the return type for the call
Label* retaddr = NULL
);
void ldr_constant(Register dest, const Address &const_addr) {
if (NearCpool) {
@ -1369,6 +1344,9 @@ public:
spill(tmp1, true, dst_offset+8);
}
}
void cache_wb(Address line);
void cache_wbsync(bool is_pre);
};
#ifdef ASSERT

176
src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp
View File

@ -50,10 +50,6 @@
#include "jvmci/jvmciJavaClasses.hpp"
#endif
#ifdef BUILTIN_SIM
#include "../../../../../../simulator/simulator.hpp"
#endif
#define __ masm->
const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
@ -342,7 +338,7 @@ static void patch_callers_callsite(MacroAssembler *masm) {
__ mov(c_rarg0, rmethod);
__ mov(c_rarg1, lr);
__ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
__ blrt(rscratch1, 2, 0, 0);
__ blr(rscratch1);
__ maybe_isb();
__ pop_CPU_state();
@ -662,71 +658,6 @@ void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
__ br(rscratch1);
}
#ifdef BUILTIN_SIM
static void generate_i2c_adapter_name(char *result, int total_args_passed, const BasicType *sig_bt)
{
strcpy(result, "i2c(");
int idx = 4;
for (int i = 0; i < total_args_passed; i++) {
switch(sig_bt[i]) {
case T_BOOLEAN:
result[idx++] = 'Z';
break;
case T_CHAR:
result[idx++] = 'C';
break;
case T_FLOAT:
result[idx++] = 'F';
break;
case T_DOUBLE:
assert((i < (total_args_passed - 1)) && (sig_bt[i+1] == T_VOID),
"double must be followed by void");
i++;
result[idx++] = 'D';
break;
case T_BYTE:
result[idx++] = 'B';
break;
case T_SHORT:
result[idx++] = 'S';
break;
case T_INT:
result[idx++] = 'I';
break;
case T_LONG:
assert((i < (total_args_passed - 1)) && (sig_bt[i+1] == T_VOID),
"long must be followed by void");
i++;
result[idx++] = 'L';
break;
case T_OBJECT:
result[idx++] = 'O';
break;
case T_ARRAY:
result[idx++] = '[';
break;
case T_ADDRESS:
result[idx++] = 'P';
break;
case T_NARROWOOP:
result[idx++] = 'N';
break;
case T_METADATA:
result[idx++] = 'M';
break;
case T_NARROWKLASS:
result[idx++] = 'K';
break;
default:
result[idx++] = '?';
break;
}
}
result[idx++] = ')';
result[idx] = '\0';
}
#endif
// ---------------------------------------------------------------
AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
int total_args_passed,
@ -735,20 +666,7 @@ AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm
const VMRegPair *regs,
AdapterFingerPrint* fingerprint) {
address i2c_entry = __ pc();
#ifdef BUILTIN_SIM
char *name = NULL;
AArch64Simulator *sim = NULL;
size_t len = 65536;
if (NotifySimulator) {
name = NEW_C_HEAP_ARRAY(char, len, mtInternal);
}
if (name) {
generate_i2c_adapter_name(name, total_args_passed, sig_bt);
sim = AArch64Simulator::get_current(UseSimulatorCache, DisableBCCheck);
sim->notifyCompile(name, i2c_entry);
}
#endif
gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
address c2i_unverified_entry = __ pc();
@ -790,15 +708,6 @@ AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm
address c2i_entry = __ pc();
#ifdef BUILTIN_SIM
if (name) {
name[0] = 'c';
name[2] = 'i';
sim->notifyCompile(name, c2i_entry);
FREE_C_HEAP_ARRAY(char, name, mtInternal);
}
#endif
// Class initialization barrier for static methods
address c2i_no_clinit_check_entry = NULL;
if (VM_Version::supports_fast_class_init_checks()) {
@ -1219,8 +1128,7 @@ static void rt_call(MacroAssembler* masm, address dest, int gpargs, int fpargs,
assert((unsigned)gpargs < 256, "eek!");
assert((unsigned)fpargs < 32, "eek!");
__ lea(rscratch1, RuntimeAddress(dest));
if (UseBuiltinSim) __ mov(rscratch2, (gpargs << 6) | (fpargs << 2) | type);
__ blrt(rscratch1, rscratch2);
__ blr(rscratch1);
__ maybe_isb();
}
}
@ -1340,25 +1248,8 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
int compile_id,
BasicType* in_sig_bt,
VMRegPair* in_regs,
BasicType ret_type) {
#ifdef BUILTIN_SIM
if (NotifySimulator) {
// Names are up to 65536 chars long. UTF8-coded strings are up to
// 3 bytes per character. We concatenate three such strings.
// Yes, I know this is ridiculous, but it's debug code and glibc
// allocates large arrays very efficiently.
size_t len = (65536 * 3) * 3;
char *name = new char[len];
strncpy(name, method()->method_holder()->name()->as_utf8(), len);
strncat(name, ".", len);
strncat(name, method()->name()->as_utf8(), len);
strncat(name, method()->signature()->as_utf8(), len);
AArch64Simulator::get_current(UseSimulatorCache, DisableBCCheck)->notifyCompile(name, __ pc());
delete[] name;
}
#endif
BasicType ret_type,
address critical_entry) {
if (method->is_method_handle_intrinsic()) {
vmIntrinsics::ID iid = method->intrinsic_id();
intptr_t start = (intptr_t)__ pc();
@ -1384,7 +1275,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
(OopMapSet*)NULL);
}
bool is_critical_native = true;
address native_func = method->critical_native_function();
address native_func = critical_entry;
if (native_func == NULL) {
native_func = method->native_function();
is_critical_native = false;
@ -1623,11 +1514,6 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
// Frame is now completed as far as size and linkage.
int frame_complete = ((intptr_t)__ pc()) - start;
// record entry into native wrapper code
if (NotifySimulator) {
__ notify(Assembler::method_entry);
}
// We use r20 as the oop handle for the receiver/klass
// It is callee save so it survives the call to native
@ -2089,11 +1975,6 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
__ cbnz(rscratch1, exception_pending);
}
// record exit from native wrapper code
if (NotifySimulator) {
__ notify(Assembler::method_reentry);
}
// We're done
__ ret(lr);
@ -2208,7 +2089,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
} else {
__ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition)));
}
__ blrt(rscratch1, 1, 0, 1);
__ blr(rscratch1);
__ maybe_isb();
// Restore any method result value
restore_native_result(masm, ret_type, stack_slots);
@ -2305,14 +2186,6 @@ void SharedRuntime::generate_deopt_blob() {
OopMap* map = NULL;
OopMapSet *oop_maps = new OopMapSet();
#ifdef BUILTIN_SIM
AArch64Simulator *simulator;
if (NotifySimulator) {
simulator = AArch64Simulator::get_current(UseSimulatorCache, DisableBCCheck);
simulator->notifyCompile(const_cast<char*>("SharedRuntime::deopt_blob"), __ pc());
}
#endif
// -------------
// This code enters when returning to a de-optimized nmethod. A return
// address has been pushed on the the stack, and return values are in
@ -2401,7 +2274,7 @@ void SharedRuntime::generate_deopt_blob() {
__ lea(rscratch1,
RuntimeAddress(CAST_FROM_FN_PTR(address,
Deoptimization::uncommon_trap)));
__ blrt(rscratch1, 2, 0, MacroAssembler::ret_type_integral);
__ blr(rscratch1);
__ bind(retaddr);
oop_maps->add_gc_map( __ pc()-start, map->deep_copy());
@ -2493,7 +2366,7 @@ void SharedRuntime::generate_deopt_blob() {
__ mov(c_rarg0, rthread);
__ mov(c_rarg1, rcpool);
__ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
__ blrt(rscratch1, 1, 0, 1);
__ blr(rscratch1);
__ bind(retaddr);
// Need to have an oopmap that tells fetch_unroll_info where to
@ -2633,7 +2506,7 @@ void SharedRuntime::generate_deopt_blob() {
__ mov(c_rarg0, rthread);
__ movw(c_rarg1, rcpool); // second arg: exec_mode
__ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
__ blrt(rscratch1, 2, 0, 0);
__ blr(rscratch1);
// Set an oopmap for the call site
// Use the same PC we used for the last java frame
@ -2666,12 +2539,6 @@ void SharedRuntime::generate_deopt_blob() {
_deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset);
}
#endif
#ifdef BUILTIN_SIM
if (NotifySimulator) {
unsigned char *base = _deopt_blob->code_begin();
simulator->notifyRelocate(start, base - start);
}
#endif
}
uint SharedRuntime::out_preserve_stack_slots() {
@ -2687,14 +2554,6 @@ void SharedRuntime::generate_uncommon_trap_blob() {
CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
MacroAssembler* masm = new MacroAssembler(&buffer);
#ifdef BUILTIN_SIM
AArch64Simulator *simulator;
if (NotifySimulator) {
simulator = AArch64Simulator::get_current(UseSimulatorCache, DisableBCCheck);
simulator->notifyCompile(const_cast<char*>("SharedRuntime:uncommon_trap_blob"), __ pc());
}
#endif
assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
address start = __ pc();
@ -2733,7 +2592,7 @@ void SharedRuntime::generate_uncommon_trap_blob() {
__ lea(rscratch1,
RuntimeAddress(CAST_FROM_FN_PTR(address,
Deoptimization::uncommon_trap)));
__ blrt(rscratch1, 2, 0, MacroAssembler::ret_type_integral);
__ blr(rscratch1);
__ bind(retaddr);
// Set an oopmap for the call site
@ -2856,7 +2715,7 @@ void SharedRuntime::generate_uncommon_trap_blob() {
__ mov(c_rarg0, rthread);
__ movw(c_rarg1, (unsigned)Deoptimization::Unpack_uncommon_trap);
__ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
__ blrt(rscratch1, 2, 0, MacroAssembler::ret_type_integral);
__ blr(rscratch1);
// Set an oopmap for the call site
// Use the same PC we used for the last java frame
@ -2876,13 +2735,6 @@ void SharedRuntime::generate_uncommon_trap_blob() {
_uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps,
SimpleRuntimeFrame::framesize >> 1);
#ifdef BUILTIN_SIM
if (NotifySimulator) {
unsigned char *base = _deopt_blob->code_begin();
simulator->notifyRelocate(start, base - start);
}
#endif
}
#endif // COMPILER2_OR_JVMCI
@ -2932,7 +2784,7 @@ SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_t
// Do the call
__ mov(c_rarg0, rthread);
__ lea(rscratch1, RuntimeAddress(call_ptr));
__ blrt(rscratch1, 1, 0, 1);
__ blr(rscratch1);
__ bind(retaddr);
// Set an oopmap for the call site. This oopmap will map all
@ -3037,7 +2889,7 @@ RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const cha
__ mov(c_rarg0, rthread);
__ lea(rscratch1, RuntimeAddress(destination));
__ blrt(rscratch1, 1, 0, 1);
__ blr(rscratch1);
__ bind(retaddr);
}
@ -3169,7 +3021,7 @@ void OptoRuntime::generate_exception_blob() {
__ set_last_Java_frame(sp, noreg, the_pc, rscratch1);
__ mov(c_rarg0, rthread);
__ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
__ blrt(rscratch1, 1, 0, MacroAssembler::ret_type_integral);
__ blr(rscratch1);
__ maybe_isb();
// Set an oopmap for the call site. This oopmap will only be used if we

92
src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp
View File

@ -50,10 +50,6 @@
#include "gc/z/zThreadLocalData.hpp"
#endif
#ifdef BUILTIN_SIM
#include "../../../../../../simulator/simulator.hpp"
#endif
// Declaration and definition of StubGenerator (no .hpp file).
// For a more detailed description of the stub routine structure
// see the comment in stubRoutines.hpp
@ -221,16 +217,8 @@ class StubGenerator: public StubCodeGenerator {
// stub code
// we need a C prolog to bootstrap the x86 caller into the sim
__ c_stub_prolog(8, 0, MacroAssembler::ret_type_void);
address aarch64_entry = __ pc();
#ifdef BUILTIN_SIM
// Save sender's SP for stack traces.
__ mov(rscratch1, sp);
__ str(rscratch1, Address(__ pre(sp, -2 * wordSize)));
#endif
// set up frame and move sp to end of save area
__ enter();
__ sub(sp, rfp, -sp_after_call_off * wordSize);
@ -301,8 +289,6 @@ class StubGenerator: public StubCodeGenerator {
__ mov(r13, sp);
__ blr(c_rarg4);
// tell the simulator we have returned to the stub
// we do this here because the notify will already have been done
// if we get to the next instruction via an exception
//
@ -312,9 +298,6 @@ class StubGenerator: public StubCodeGenerator {
// pc against the address saved below. so we may need to allow for
// this extra instruction in the check.
if (NotifySimulator) {
__ notify(Assembler::method_reentry);
}
// save current address for use by exception handling code
return_address = __ pc();
@ -377,12 +360,6 @@ class StubGenerator: public StubCodeGenerator {
__ ldp(c_rarg4, c_rarg5, entry_point);
__ ldp(c_rarg6, c_rarg7, parameter_size);
#ifndef PRODUCT
// tell the simulator we are about to end Java execution
if (NotifySimulator) {
__ notify(Assembler::method_exit);
}
#endif
// leave frame and return to caller
__ leave();
__ ret(lr);
@ -416,13 +393,6 @@ class StubGenerator: public StubCodeGenerator {
//
// r0: exception oop
// NOTE: this is used as a target from the signal handler so it
// needs an x86 prolog which returns into the current simulator
// executing the generated catch_exception code. so the prolog
// needs to install rax in a sim register and adjust the sim's
// restart pc to enter the generated code at the start position
// then return from native to simulated execution.
address generate_catch_exception() {
StubCodeMark mark(this, "StubRoutines", "catch_exception");
address start = __ pc();
@ -627,7 +597,7 @@ class StubGenerator: public StubCodeGenerator {
#endif
BLOCK_COMMENT("call MacroAssembler::debug");
__ mov(rscratch1, CAST_FROM_FN_PTR(address, MacroAssembler::debug64));
__ blrt(rscratch1, 3, 0, 1);
__ blr(rscratch1);
return start;
}
@ -1401,12 +1371,6 @@ class StubGenerator: public StubCodeGenerator {
__ leave();
__ mov(r0, zr); // return 0
__ ret(lr);
#ifdef BUILTIN_SIM
{
AArch64Simulator *sim = AArch64Simulator::get_current(UseSimulatorCache, DisableBCCheck);
sim->notifyCompile(const_cast<char*>(name), start);
}
#endif
return start;
}
@ -1475,12 +1439,6 @@ class StubGenerator: public StubCodeGenerator {
__ leave();
__ mov(r0, zr); // return 0
__ ret(lr);
#ifdef BUILTIN_SIM
{
AArch64Simulator *sim = AArch64Simulator::get_current(UseSimulatorCache, DisableBCCheck);
sim->notifyCompile(const_cast<char*>(name), start);
}
#endif
return start;
}
@ -2392,6 +2350,44 @@ class StubGenerator: public StubCodeGenerator {
return start;
}
address generate_data_cache_writeback() {
const Register line = c_rarg0; // address of line to write back
__ align(CodeEntryAlignment);
StubCodeMark mark(this, "StubRoutines", "_data_cache_writeback");
address start = __ pc();
__ enter();
__ cache_wb(Address(line, 0));
__ leave();
__ ret(lr);
return start;
}
address generate_data_cache_writeback_sync() {
const Register is_pre = c_rarg0; // pre or post sync
__ align(CodeEntryAlignment);
StubCodeMark mark(this, "StubRoutines", "_data_cache_writeback_sync");
// pre wbsync is a no-op
// post wbsync translates to an sfence
Label skip;
address start = __ pc();
__ enter();
__ cbnz(is_pre, skip);
__ cache_wbsync(false);
__ bind(skip);
__ leave();
__ ret(lr);
return start;
}
void generate_arraycopy_stubs() {
address entry;
address entry_jbyte_arraycopy;
@ -3128,7 +3124,6 @@ class StubGenerator: public StubCodeGenerator {
return start;
}
#ifndef BUILTIN_SIM
// Safefetch stubs.
void generate_safefetch(const char* name, int size, address* entry,
address* fault_pc, address* continuation_pc) {
@ -3168,7 +3163,6 @@ class StubGenerator: public StubCodeGenerator {
__ mov(r0, c_rarg1);
__ ret(lr);
}
#endif
/**
* Arguments:
@ -4804,7 +4798,7 @@ class StubGenerator: public StubCodeGenerator {
__ mov(c_rarg0, rthread);
BLOCK_COMMENT("call runtime_entry");
__ mov(rscratch1, runtime_entry);
__ blrt(rscratch1, 3 /* number_of_arguments */, 0, 1);
__ blr(rscratch1);
// Generate oop map
OopMap* map = new OopMap(framesize, 0);
@ -5778,12 +5772,15 @@ class StubGenerator: public StubCodeGenerator {
}
#endif // COMPILER2
#ifndef BUILTIN_SIM
// generate GHASH intrinsics code
if (UseGHASHIntrinsics) {
StubRoutines::_ghash_processBlocks = generate_ghash_processBlocks();
}
// data cache line writeback
StubRoutines::_data_cache_writeback = generate_data_cache_writeback();
StubRoutines::_data_cache_writeback_sync = generate_data_cache_writeback_sync();
if (UseAESIntrinsics) {
StubRoutines::_aescrypt_encryptBlock = generate_aescrypt_encryptBlock();
StubRoutines::_aescrypt_decryptBlock = generate_aescrypt_decryptBlock();
@ -5812,7 +5809,6 @@ class StubGenerator: public StubCodeGenerator {
generate_safefetch("SafeFetchN", sizeof(intptr_t), &StubRoutines::_safefetchN_entry,
&StubRoutines::_safefetchN_fault_pc,
&StubRoutines::_safefetchN_continuation_pc);
#endif
StubRoutines::aarch64::set_completed();
}

7
src/hotspot/cpu/aarch64/stubRoutines_aarch64.hpp
View File

@ -30,13 +30,8 @@
// definition. See stubRoutines.hpp for a description on how to
// extend it.
// n.b. if we are notifying entry/exit to the simulator then the call
// stub does a notify at normal return placing
// call_stub_return_address one instruction beyond the notify. the
// latter address is sued by the stack unwind code when doign an
// exception return.
static bool returns_to_call_stub(address return_pc) {
return return_pc == _call_stub_return_address + (NotifySimulator ? -4 : 0);
return return_pc == _call_stub_return_address;
}
enum platform_dependent_constants {

161
src/hotspot/cpu/aarch64/templateInterpreterGenerator_aarch64.cpp
View File

@ -55,10 +55,6 @@
#include "oops/method.hpp"
#endif // !PRODUCT
#ifdef BUILTIN_SIM
#include "../../../../../../simulator/simulator.hpp"
#endif
// Size of interpreter code. Increase if too small. Interpreter will
// fail with a guarantee ("not enough space for interpreter generation");
// if too small.
@ -300,9 +296,8 @@ void TemplateInterpreterGenerator::generate_transcendental_entry(AbstractInterpr
ShouldNotReachHere();
fn = NULL; // unreachable
}
const int gpargs = 0, rtype = 3;
__ mov(rscratch1, fn);
__ blrt(rscratch1, gpargs, fpargs, rtype);
__ blr(rscratch1);
}
// Abstract method entry
@ -469,13 +464,6 @@ address TemplateInterpreterGenerator::generate_return_entry_for(TosState state,
__ sub(rscratch1, rscratch2, rscratch1, ext::uxtw, 3);
__ andr(sp, rscratch1, -16);
#ifndef PRODUCT
// tell the simulator that the method has been reentered
if (NotifySimulator) {
__ notify(Assembler::method_reentry);
}
#endif
__ check_and_handle_popframe(rthread);
__ check_and_handle_earlyret(rthread);
@ -514,7 +502,7 @@ address TemplateInterpreterGenerator::generate_deopt_entry_for(TosState state,
// only occur on method entry so emit it only for vtos with step 0.
if ((EnableJVMCI || UseAOT) && state == vtos && step == 0) {
Label L;
__ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
__ ldrb(rscratch1, Address(rthread, JavaThread::pending_monitorenter_offset()));
__ cbz(rscratch1, L);
// Clear flag.
__ strb(zr, Address(rthread, JavaThread::pending_monitorenter_offset()));
@ -525,7 +513,7 @@ address TemplateInterpreterGenerator::generate_deopt_entry_for(TosState state,
#ifdef ASSERT
if (EnableJVMCI) {
Label L;
__ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
__ ldrb(rscratch1, Address(rthread, JavaThread::pending_monitorenter_offset()));
__ cbz(rscratch1, L);
__ stop("unexpected pending monitor in deopt entry");
__ bind(L);
@ -1185,12 +1173,6 @@ address TemplateInterpreterGenerator::generate_native_entry(bool synchronized) {
// initialize fixed part of activation frame
generate_fixed_frame(true);
#ifndef PRODUCT
// tell the simulator that a method has been entered
if (NotifySimulator) {
__ notify(Assembler::method_entry);
}
#endif
// make sure method is native & not abstract
#ifdef ASSERT
@ -1375,7 +1357,7 @@ address TemplateInterpreterGenerator::generate_native_entry(bool synchronized) {
__ stlrw(rscratch1, rscratch2);
// Call the native method.
__ blrt(r10, rscratch1);
__ blr(r10);
__ bind(native_return);
__ maybe_isb();
__ get_method(rmethod);
@ -1415,7 +1397,7 @@ address TemplateInterpreterGenerator::generate_native_entry(bool synchronized) {
//
__ mov(c_rarg0, rthread);
__ mov(rscratch2, CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans));
__ blrt(rscratch2, 1, 0, 0);
__ blr(rscratch2);
__ maybe_isb();
__ get_method(rmethod);
__ reinit_heapbase();
@ -1466,7 +1448,7 @@ address TemplateInterpreterGenerator::generate_native_entry(bool synchronized) {
__ pusha(); // XXX only save smashed registers
__ mov(c_rarg0, rthread);
__ mov(rscratch2, CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
__ blrt(rscratch2, 0, 0, 0);
__ blr(rscratch2);
__ popa(); // XXX only restore smashed registers
__ bind(no_reguard);
}
@ -1621,12 +1603,7 @@ address TemplateInterpreterGenerator::generate_normal_entry(bool synchronized) {
// initialize fixed part of activation frame
generate_fixed_frame(false);
#ifndef PRODUCT
// tell the simulator that a method has been entered
if (NotifySimulator) {
__ notify(Assembler::method_entry);
}
#endif
// make sure method is not native & not abstract
#ifdef ASSERT
__ ldrw(r0, access_flags);
@ -1762,13 +1739,6 @@ void TemplateInterpreterGenerator::generate_throw_exception() {
__ reinit_heapbase(); // restore rheapbase as heapbase.
__ get_dispatch();
#ifndef PRODUCT
// tell the simulator that the caller method has been reentered
if (NotifySimulator) {
__ get_method(rmethod);
__ notify(Assembler::method_reentry);
}
#endif
// Entry point for exceptions thrown within interpreter code
Interpreter::_throw_exception_entry = __ pc();
// If we came here via a NullPointerException on the receiver of a
@ -2086,121 +2056,4 @@ void TemplateInterpreterGenerator::stop_interpreter_at() {
__ pop(rscratch1);
}
#ifdef BUILTIN_SIM
#include <sys/mman.h>
#include <unistd.h>
extern "C" {
static int PAGESIZE = getpagesize();
int is_mapped_address(u_int64_t address)
{
address = (address & ~((u_int64_t)PAGESIZE - 1));
if (msync((void *)address, PAGESIZE, MS_ASYNC) == 0) {
return true;
}
if (errno != ENOMEM) {
return true;
}
return false;
}
void bccheck1(u_int64_t pc, u_int64_t fp, char *method, int *bcidx, int *framesize, char *decode)
{
if (method != 0) {
method[0] = '\0';
}
if (bcidx != 0) {
*bcidx = -2;
}
if (decode != 0) {
decode[0] = 0;
}
if (framesize != 0) {
*framesize = -1;
}
if (Interpreter::contains((address)pc)) {
AArch64Simulator *sim = AArch64Simulator::get_current(UseSimulatorCache, DisableBCCheck);
Method* meth;
address bcp;
if (fp) {
#define FRAME_SLOT_METHOD 3
#define FRAME_SLOT_BCP 7
meth = (Method*)sim->getMemory()->loadU64(fp - (FRAME_SLOT_METHOD << 3));
bcp = (address)sim->getMemory()->loadU64(fp - (FRAME_SLOT_BCP << 3));
#undef FRAME_SLOT_METHOD
#undef FRAME_SLOT_BCP
} else {
meth = (Method*)sim->getCPUState().xreg(RMETHOD, 0);
bcp = (address)sim->getCPUState().xreg(RBCP, 0);
}
if (meth->is_native()) {
return;
}
if(method && meth->is_method()) {
ResourceMark rm;
method[0] = 'I';
method[1] = ' ';
meth->name_and_sig_as_C_string(method + 2, 398);
}
if (bcidx) {
if (meth->contains(bcp)) {
*bcidx = meth->bci_from(bcp);
} else {
*bcidx = -2;
}
}
if (decode) {
if (!BytecodeTracer::closure()) {
BytecodeTracer::set_closure(BytecodeTracer::std_closure());
}
stringStream str(decode, 400);
BytecodeTracer::trace(meth, bcp, &str);
}
} else {
if (method) {
CodeBlob *cb = CodeCache::find_blob((address)pc);
if (cb != NULL) {
if (cb->is_nmethod()) {
ResourceMark rm;
nmethod* nm = (nmethod*)cb;
method[0] = 'C';
method[1] = ' ';
nm->method()->name_and_sig_as_C_string(method + 2, 398);
} else if (cb->is_adapter_blob()) {
strcpy(method, "B adapter blob");
} else if (cb->is_runtime_stub()) {
strcpy(method, "B runtime stub");
} else if (cb->is_exception_stub()) {
strcpy(method, "B exception stub");
} else if (cb->is_deoptimization_stub()) {
strcpy(method, "B deoptimization stub");
} else if (cb->is_safepoint_stub()) {
strcpy(method, "B safepoint stub");
} else if (cb->is_uncommon_trap_stub()) {
strcpy(method, "B uncommon trap stub");
} else if (cb->contains((address)StubRoutines::call_stub())) {
strcpy(method, "B call stub");
} else {
strcpy(method, "B unknown blob : ");
strcat(method, cb->name());
}
if (framesize != NULL) {
*framesize = cb->frame_size();
}
}
}
}
}
JNIEXPORT void bccheck(u_int64_t pc, u_int64_t fp, char *method, int *bcidx, int *framesize, char *decode)
{
bccheck1(pc, fp, method, bcidx, framesize, decode);
}
}
#endif // BUILTIN_SIM
#endif // !PRODUCT

20
src/hotspot/cpu/aarch64/templateTable_aarch64.cpp
View File

@ -1478,8 +1478,7 @@ void TemplateTable::fop2(Operation op)
case rem:
__ fmovs(v1, v0);
__ pop_f(v0);
__ call_VM_leaf_base1(CAST_FROM_FN_PTR(address, SharedRuntime::frem),
0, 2, MacroAssembler::ret_type_float);
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::frem));
break;
default:
ShouldNotReachHere();
@ -1511,8 +1510,7 @@ void TemplateTable::dop2(Operation op)
case rem:
__ fmovd(v1, v0);
__ pop_d(v0);
__ call_VM_leaf_base1(CAST_FROM_FN_PTR(address, SharedRuntime::drem),
0, 2, MacroAssembler::ret_type_double);
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::drem));
break;
default:
ShouldNotReachHere();
@ -1653,8 +1651,7 @@ void TemplateTable::convert()
__ fcvtzsw(r0, v0);
__ get_fpsr(r1);
__ cbzw(r1, L_Okay);
__ call_VM_leaf_base1(CAST_FROM_FN_PTR(address, SharedRuntime::f2i),
0, 1, MacroAssembler::ret_type_integral);
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::f2i));
__ bind(L_Okay);
}
break;
@ -1665,8 +1662,7 @@ void TemplateTable::convert()
__ fcvtzs(r0, v0);
__ get_fpsr(r1);
__ cbzw(r1, L_Okay);
__ call_VM_leaf_base1(CAST_FROM_FN_PTR(address, SharedRuntime::f2l),
0, 1, MacroAssembler::ret_type_integral);
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::f2l));
__ bind(L_Okay);
}
break;
@ -1680,8 +1676,7 @@ void TemplateTable::convert()
__ fcvtzdw(r0, v0);
__ get_fpsr(r1);
__ cbzw(r1, L_Okay);
__ call_VM_leaf_base1(CAST_FROM_FN_PTR(address, SharedRuntime::d2i),
0, 1, MacroAssembler::ret_type_integral);
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::d2i));
__ bind(L_Okay);
}
break;
@ -1692,8 +1687,7 @@ void TemplateTable::convert()
__ fcvtzd(r0, v0);
__ get_fpsr(r1);
__ cbzw(r1, L_Okay);
__ call_VM_leaf_base1(CAST_FROM_FN_PTR(address, SharedRuntime::d2l),
0, 1, MacroAssembler::ret_type_integral);
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::d2l));
__ bind(L_Okay);
}
break;
@ -3621,7 +3615,7 @@ void TemplateTable::_new() {
if (UseBiasedLocking) {
__ ldr(rscratch1, Address(r4, Klass::prototype_header_offset()));
} else {
__ mov(rscratch1, (intptr_t)markOopDesc::prototype());
__ mov(rscratch1, (intptr_t)markWord::prototype().value());
}
__ str(rscratch1, Address(r0, oopDesc::mark_offset_in_bytes()));
__ store_klass_gap(r0, zr); // zero klass gap for compressed oops

30
src/hotspot/cpu/aarch64/vm_version_aarch64.cpp
View File

@ -1,6 +1,6 @@
/*
* Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2015, Red Hat Inc. All rights reserved.
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2015, 2019, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -28,18 +28,15 @@
#include "asm/macroAssembler.inline.hpp"
#include "memory/resourceArea.hpp"
#include "runtime/java.hpp"
#include "runtime/os.hpp"
#include "runtime/stubCodeGenerator.hpp"
#include "utilities/macros.hpp"
#include "vm_version_aarch64.hpp"
#include OS_HEADER_INLINE(os)
#ifndef BUILTIN_SIM
#include <sys/auxv.h>
#include <asm/hwcap.h>
#else
#define getauxval(hwcap) 0
#endif
#ifndef HWCAP_AES
#define HWCAP_AES (1<<3)
@ -71,6 +68,7 @@ int VM_Version::_model2;
int VM_Version::_variant;
int VM_Version::_revision;
int VM_Version::_stepping;
bool VM_Version::_dcpop;
VM_Version::PsrInfo VM_Version::_psr_info = { 0, };
static BufferBlob* stub_blob;
@ -92,10 +90,6 @@ class VM_Version_StubGenerator: public StubCodeGenerator {
# define __ _masm->
address start = __ pc();
#ifdef BUILTIN_SIM
__ c_stub_prolog(1, 0, MacroAssembler::ret_type_void);
#endif
// void getPsrInfo(VM_Version::PsrInfo* psr_info);
address entry = __ pc();
@ -175,7 +169,8 @@ void VM_Version::get_processor_features() {
int cpu_lines = 0;
if (FILE *f = fopen("/proc/cpuinfo", "r")) {
char buf[128], *p;
// need a large buffer as the flags line may include lots of text
char buf[1024], *p;
while (fgets(buf, sizeof (buf), f) != NULL) {
if ((p = strchr(buf, ':')) != NULL) {
long v = strtol(p+1, NULL, 0);
@ -189,12 +184,25 @@ void VM_Version::get_processor_features() {
_model = v;
} else if (strncmp(buf, "CPU revision", sizeof "CPU revision" - 1) == 0) {
_revision = v;
} else if (strncmp(buf, "flags", sizeof("flags") - 1) == 0) {
if (strstr(p+1, "dcpop")) {
_dcpop = true;
}
}
}
}
fclose(f);
}
if (os::supports_map_sync()) {
// if dcpop is available publish data cache line flush size via
// generic field, otherwise let if default to zero thereby
// disabling writeback
if (_dcpop) {
_data_cache_line_flush_size = dcache_line;
}
}
// Enable vendor specific features
// Ampere eMAG

5
src/hotspot/cpu/aarch64/vm_version_aarch64.hpp
View File

@ -1,6 +1,6 @@
/*
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* Copyright (c) 2014, 2019, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -40,7 +40,7 @@ protected:
static int _variant;
static int _revision;
static int _stepping;
static bool _dcpop;
struct PsrInfo {
uint32_t dczid_el0;
uint32_t ctr_el0;
@ -106,6 +106,7 @@ public:
static int cpu_model2() { return _model2; }
static int cpu_variant() { return _variant; }
static int cpu_revision() { return _revision; }
static bool supports_dcpop() { return _dcpop; }
static ByteSize dczid_el0_offset() { return byte_offset_of(PsrInfo, dczid_el0); }
static ByteSize ctr_el0_offset() { return byte_offset_of(PsrInfo, ctr_el0); }
static bool is_zva_enabled() {

6
src/hotspot/cpu/arm/c1_MacroAssembler_arm.cpp
View File

@ -29,7 +29,7 @@
#include "gc/shared/collectedHeap.hpp"
#include "interpreter/interpreter.hpp"
#include "oops/arrayOop.hpp"
#include "oops/markOop.hpp"
#include "oops/markWord.hpp"
#include "runtime/basicLock.hpp"
#include "runtime/biasedLocking.hpp"
#include "runtime/os.hpp"
@ -92,7 +92,7 @@ void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register
if(UseBiasedLocking && !len->is_valid()) {
ldr(tmp, Address(klass, Klass::prototype_header_offset()));
} else {
mov(tmp, (intptr_t)markOopDesc::prototype());
mov(tmp, (intptr_t)markWord::prototype().value());
}
str(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
@ -219,7 +219,7 @@ int C1_MacroAssembler::lock_object(Register hdr, Register obj,
ldr(hdr, Address(obj, oopDesc::mark_offset_in_bytes()));
str(obj, Address(disp_hdr, obj_offset));
tst(hdr, markOopDesc::unlocked_value);
tst(hdr, markWord::unlocked_value);
b(fast_lock, ne);
// Check for recursive locking

2
src/hotspot/cpu/arm/frame_arm.cpp
View File

@ -26,7 +26,7 @@
#include "interpreter/interpreter.hpp"
#include "memory/resourceArea.hpp"
#include "memory/universe.hpp"
#include "oops/markOop.hpp"
#include "oops/markWord.hpp"
#include "oops/method.hpp"
#include "oops/oop.inline.hpp"
#include "runtime/frame.inline.hpp"

2
src/hotspot/cpu/arm/globals_arm.hpp
View File

@ -30,8 +30,6 @@
// (see globals.hpp)
//
define_pd_global(bool, ShareVtableStubs, true);
define_pd_global(bool, ImplicitNullChecks, true); // Generate code for implicit null checks
define_pd_global(bool, UncommonNullCast, true); // Uncommon-trap NULLs past to check cast
define_pd_global(bool, TrapBasedNullChecks, false); // Not needed

4
src/hotspot/cpu/arm/interp_masm_arm.cpp
View File

@ -34,7 +34,7 @@
#include "interpreter/interpreterRuntime.hpp"
#include "logging/log.hpp"
#include "oops/arrayOop.hpp"
#include "oops/markOop.hpp"
#include "oops/markWord.hpp"
#include "oops/method.hpp"
#include "oops/methodData.hpp"
#include "prims/jvmtiExport.hpp"
@ -878,7 +878,7 @@ void InterpreterMacroAssembler::lock_object(Register Rlock) {
ldr(Rmark, Address(Robj, oopDesc::mark_offset_in_bytes()));
// Test if object is already locked
tst(Rmark, markOopDesc::unlocked_value);
tst(Rmark, markWord::unlocked_value);
b(already_locked, eq);
// Save old object->mark() into BasicLock's displaced header

42
src/hotspot/cpu/arm/jniFastGetField_arm.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -32,7 +32,7 @@
#define __ masm->
#define BUFFER_SIZE 96
#define BUFFER_SIZE 120
address JNI_FastGetField::generate_fast_get_int_field0(BasicType type) {
const char* name = NULL;
@ -99,10 +99,10 @@ address JNI_FastGetField::generate_fast_get_int_field0(BasicType type) {
CodeBuffer cbuf(blob);
MacroAssembler* masm = new MacroAssembler(&cbuf);
fast_entry = __ pc();
Label slow_case;
// Safepoint check
InlinedAddress safepoint_counter_addr(SafepointSynchronize::safepoint_counter_addr());
Label slow_case;
__ ldr_literal(Rsafepoint_counter_addr, safepoint_counter_addr);
__ push(RegisterSet(R0, R3)); // save incoming arguments for slow case
@ -112,9 +112,21 @@ address JNI_FastGetField::generate_fast_get_int_field0(BasicType type) {
__ bic(R1, R1, JNIHandles::weak_tag_mask);
// Address dependency restricts memory access ordering. It's cheaper than explicit LoadLoad barrier
__ andr(Rtmp1, Rsafept_cnt, (unsigned)1);
__ ldr(Robj, Address(R1, Rtmp1));
if (JvmtiExport::can_post_field_access()) {
// Using barrier to order wrt. JVMTI check and load of result.
__ membar(MacroAssembler::Membar_mask_bits(MacroAssembler::LoadLoad), Rtmp1);
// Check to see if a field access watch has been set before we
// take the fast path.
__ ldr_global_s32(Rtmp1, (address)JvmtiExport::get_field_access_count_addr());
__ cbnz(Rtmp1, slow_case);
__ ldr(Robj, Address(R1));
} else {
// Address dependency restricts memory access ordering. It's cheaper than explicit LoadLoad barrier
__ andr(Rtmp1, Rsafept_cnt, (unsigned)1);
__ ldr(Robj, Address(R1, Rtmp1));
}
Address field_addr;
if (type != T_BOOLEAN
@ -170,20 +182,18 @@ address JNI_FastGetField::generate_fast_get_int_field0(BasicType type) {
ShouldNotReachHere();
}
// Address dependency restricts memory access ordering. It's cheaper than explicit LoadLoad barrier
__ ldr_literal(Rsafepoint_counter_addr, safepoint_counter_addr);
#ifdef __ABI_HARD__
if (type == T_FLOAT || type == T_DOUBLE) {
__ ldr_literal(Rsafepoint_counter_addr, safepoint_counter_addr);
__ fmrrd(Rres, Rres_hi, D0);
__ eor(Rtmp2, Rres, Rres);
__ ldr_s32(Rsafept_cnt2, Address(Rsafepoint_counter_addr, Rtmp2));
} else
#endif // __ABI_HARD__
{
__ ldr_literal(Rsafepoint_counter_addr, safepoint_counter_addr);
__ eor(Rtmp2, Rres, Rres);
__ ldr_s32(Rsafept_cnt2, Address(Rsafepoint_counter_addr, Rtmp2));
}
#endif // __ABI_HARD__
// Order JVMTI check and load of result wrt. succeeding check
// (LoadStore for volatile field).
__ membar(MacroAssembler::Membar_mask_bits(MacroAssembler::LoadLoad | MacroAssembler::LoadStore), Rtmp2);
__ ldr_s32(Rsafept_cnt2, Address(Rsafepoint_counter_addr));
__ cmp(Rsafept_cnt2, Rsafept_cnt);
// discards saved R0 R1 R2 R3
__ add(SP, SP, 4 * wordSize, eq);

22
src/hotspot/cpu/arm/macroAssembler_arm.cpp
View File

@ -1345,7 +1345,7 @@ int MacroAssembler::biased_locking_enter(Register obj_reg, Register swap_reg, Re
}
#endif
assert(markOopDesc::age_shift == markOopDesc::lock_bits + markOopDesc::biased_lock_bits, "biased locking makes assumptions about bit layout");
assert(markWord::age_shift == markWord::lock_bits + markWord::biased_lock_bits, "biased locking makes assumptions about bit layout");
Address mark_addr(obj_reg, oopDesc::mark_offset_in_bytes());
// Biased locking
@ -1367,8 +1367,8 @@ int MacroAssembler::biased_locking_enter(Register obj_reg, Register swap_reg, Re
// On MP platform loads could return 'stale' values in some cases.
// That is acceptable since either CAS or slow case path is taken in the worst case.
andr(tmp_reg, swap_reg, (uintx)markOopDesc::biased_lock_mask_in_place);
cmp(tmp_reg, markOopDesc::biased_lock_pattern);
andr(tmp_reg, swap_reg, (uintx)markWord::biased_lock_mask_in_place);
cmp(tmp_reg, markWord::biased_lock_pattern);
b(cas_label, ne);
@ -1379,7 +1379,7 @@ int MacroAssembler::biased_locking_enter(Register obj_reg, Register swap_reg, Re
orr(tmp_reg, tmp_reg, Rthread);
eor(tmp_reg, tmp_reg, swap_reg);
bics(tmp_reg, tmp_reg, ((int) markOopDesc::age_mask_in_place));
bics(tmp_reg, tmp_reg, ((int) markWord::age_mask_in_place));
#ifndef PRODUCT
if (counters != NULL) {
@ -1401,7 +1401,7 @@ int MacroAssembler::biased_locking_enter(Register obj_reg, Register swap_reg, Re
// If the low three bits in the xor result aren't clear, that means
// the prototype header is no longer biased and we have to revoke
// the bias on this object.
tst(tmp_reg, (uintx)markOopDesc::biased_lock_mask_in_place);
tst(tmp_reg, (uintx)markWord::biased_lock_mask_in_place);
b(try_revoke_bias, ne);
// Biasing is still enabled for this data type. See whether the
@ -1413,7 +1413,7 @@ int MacroAssembler::biased_locking_enter(Register obj_reg, Register swap_reg, Re
// that the current epoch is invalid in order to do this because
// otherwise the manipulations it performs on the mark word are
// illegal.
tst(tmp_reg, (uintx)markOopDesc::epoch_mask_in_place);
tst(tmp_reg, (uintx)markWord::epoch_mask_in_place);
b(try_rebias, ne);
// tmp_reg has the age, epoch and pattern bits cleared
@ -1431,10 +1431,10 @@ int MacroAssembler::biased_locking_enter(Register obj_reg, Register swap_reg, Re
// until the assembler can be made smarter, we need to make some assumptions about the values
// so we can optimize this:
assert((markOopDesc::biased_lock_mask_in_place | markOopDesc::age_mask_in_place | markOopDesc::epoch_mask_in_place) == 0x1ff, "biased bitmasks changed");
assert((markWord::biased_lock_mask_in_place | markWord::age_mask_in_place | markWord::epoch_mask_in_place) == 0x1ff, "biased bitmasks changed");
mov(swap_reg, AsmOperand(swap_reg, lsl, 23));
mov(swap_reg, AsmOperand(swap_reg, lsr, 23)); // markOop with thread bits cleared (for CAS)
mov(swap_reg, AsmOperand(swap_reg, lsr, 23)); // markWord with thread bits cleared (for CAS)
orr(tmp_reg, swap_reg, Rthread); // new mark
@ -1519,8 +1519,8 @@ void MacroAssembler::biased_locking_exit(Register obj_reg, Register tmp_reg, Lab
// the bias bit would be clear.
ldr(tmp_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
andr(tmp_reg, tmp_reg, (uintx)markOopDesc::biased_lock_mask_in_place);
cmp(tmp_reg, markOopDesc::biased_lock_pattern);
andr(tmp_reg, tmp_reg, (uintx)markWord::biased_lock_mask_in_place);
cmp(tmp_reg, markWord::biased_lock_pattern);
b(done, eq);
}
@ -1993,7 +1993,7 @@ void MacroAssembler::fast_lock(Register Roop, Register Rbox, Register Rscratch,
// Invariant: Rmark loaded below does not contain biased lock pattern
ldr(Rmark, Address(Roop, oopDesc::mark_offset_in_bytes()));
tst(Rmark, markOopDesc::unlocked_value);
tst(Rmark, markWord::unlocked_value);
b(fast_lock, ne);
// Check for recursive lock

17
src/hotspot/cpu/arm/sharedRuntime_arm.cpp
View File

@ -752,7 +752,8 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
int compile_id,
BasicType* in_sig_bt,
VMRegPair* in_regs,
BasicType ret_type) {
BasicType ret_type,
address critical_entry) {
if (method->is_method_handle_intrinsic()) {
vmIntrinsics::ID iid = method->intrinsic_id();
intptr_t start = (intptr_t)__ pc();
@ -860,16 +861,16 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
__ ldr(Rtemp, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
assert(markOopDesc::unlocked_value == 1, "adjust this code");
__ tbz(Rtemp, exact_log2(markOopDesc::unlocked_value), slow_case);
assert(markWord::unlocked_value == 1, "adjust this code");
__ tbz(Rtemp, exact_log2(markWord::unlocked_value), slow_case);
if (UseBiasedLocking) {
assert(is_power_of_2(markOopDesc::biased_lock_bit_in_place), "adjust this code");
__ tbnz(Rtemp, exact_log2(markOopDesc::biased_lock_bit_in_place), slow_case);
assert(is_power_of_2(markWord::biased_lock_bit_in_place), "adjust this code");
__ tbnz(Rtemp, exact_log2(markWord::biased_lock_bit_in_place), slow_case);
}
__ bics(Rtemp, Rtemp, ~markOopDesc::hash_mask_in_place);
__ mov(R0, AsmOperand(Rtemp, lsr, markOopDesc::hash_shift), ne);
__ bics(Rtemp, Rtemp, ~markWord::hash_mask_in_place);
__ mov(R0, AsmOperand(Rtemp, lsr, markWord::hash_shift), ne);
__ bx(LR, ne);
__ bind(slow_case);
@ -1171,7 +1172,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
__ ldr(mark, Address(sync_obj, oopDesc::mark_offset_in_bytes()));
__ sub(disp_hdr, FP, lock_slot_fp_offset);
__ tst(mark, markOopDesc::unlocked_value);
__ tst(mark, markWord::unlocked_value);
__ b(fast_lock, ne);
// Check for recursive lock

13
src/hotspot/cpu/arm/templateTable_arm.cpp
View File

@ -487,19 +487,20 @@ void TemplateTable::ldc2_w() {
__ add(Rbase, Rcpool, AsmOperand(Rindex, lsl, LogBytesPerWord));
Label Condy, exit;
#ifdef __ABI_HARD__
Label Long;
// get type from tags
__ add(Rtemp, Rtags, tags_offset);
__ ldrb(Rtemp, Address(Rtemp, Rindex));
Label Condy, exit;
#ifdef __ABI_HARD__
Label NotDouble;
__ cmp(Rtemp, JVM_CONSTANT_Double);
__ b(Long, ne);
__ b(NotDouble, ne);
__ ldr_double(D0_tos, Address(Rbase, base_offset));
__ push(dtos);
__ b(exit);
__ bind(Long);
__ bind(NotDouble);
#endif
__ cmp(Rtemp, JVM_CONSTANT_Long);
@ -4045,7 +4046,7 @@ void TemplateTable::_new() {
if (UseBiasedLocking) {
__ ldr(Rtemp, Address(Rklass, Klass::prototype_header_offset()));
} else {
__ mov_slow(Rtemp, (intptr_t)markOopDesc::prototype());
__ mov_slow(Rtemp, (intptr_t)markWord::prototype().value());
}
// mark
__ str(Rtemp, Address(Robj, oopDesc::mark_offset_in_bytes()));

12
src/hotspot/cpu/ppc/c1_MacroAssembler_ppc.cpp
View File

@ -31,7 +31,7 @@
#include "gc/shared/collectedHeap.hpp"
#include "interpreter/interpreter.hpp"
#include "oops/arrayOop.hpp"
#include "oops/markOop.hpp"
#include "oops/markWord.hpp"
#include "runtime/basicLock.hpp"
#include "runtime/biasedLocking.hpp"
#include "runtime/os.hpp"
@ -110,12 +110,12 @@ void C1_MacroAssembler::lock_object(Register Rmark, Register Roop, Register Rbox
}
// ... and mark it unlocked.
ori(Rmark, Rmark, markOopDesc::unlocked_value);
ori(Rmark, Rmark, markWord::unlocked_value);
// Save unlocked object header into the displaced header location on the stack.
std(Rmark, BasicLock::displaced_header_offset_in_bytes(), Rbox);
// Compare object markOop with Rmark and if equal exchange Rscratch with object markOop.
// Compare object markWord with Rmark and if equal exchange Rscratch with object markWord.
assert(oopDesc::mark_offset_in_bytes() == 0, "cas must take a zero displacement");
cmpxchgd(/*flag=*/CCR0,
/*current_value=*/Rscratch,
@ -137,7 +137,7 @@ void C1_MacroAssembler::lock_object(Register Rmark, Register Roop, Register Rbox
bind(cas_failed);
// We did not find an unlocked object so see if this is a recursive case.
sub(Rscratch, Rscratch, R1_SP);
load_const_optimized(R0, (~(os::vm_page_size()-1) | markOopDesc::lock_mask_in_place));
load_const_optimized(R0, (~(os::vm_page_size()-1) | markWord::lock_mask_in_place));
and_(R0/*==0?*/, Rscratch, R0);
std(R0/*==0, perhaps*/, BasicLock::displaced_header_offset_in_bytes(), Rbox);
bne(CCR0, slow_int);
@ -171,7 +171,7 @@ void C1_MacroAssembler::unlock_object(Register Rmark, Register Roop, Register Rb
}
// Check if it is still a light weight lock, this is is true if we see
// the stack address of the basicLock in the markOop of the object.
// the stack address of the basicLock in the markWord of the object.
cmpxchgd(/*flag=*/CCR0,
/*current_value=*/R0,
/*compare_value=*/Rbox,
@ -215,7 +215,7 @@ void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register
if (UseBiasedLocking && !len->is_valid()) {
ld(t1, in_bytes(Klass::prototype_header_offset()), klass);
} else {
load_const_optimized(t1, (intx)markOopDesc::prototype());
load_const_optimized(t1, (intx)markWord::prototype().value());
}
std(t1, oopDesc::mark_offset_in_bytes(), obj);
store_klass(obj, klass);

2
src/hotspot/cpu/ppc/frame_ppc.cpp
View File

@ -27,7 +27,7 @@
#include "interpreter/interpreter.hpp"
#include "memory/resourceArea.hpp"
#include "memory/universe.hpp"
#include "oops/markOop.hpp"
#include "oops/markWord.hpp"
#include "oops/method.hpp"
#include "oops/oop.inline.hpp"
#include "runtime/frame.inline.hpp"

9
src/hotspot/cpu/ppc/frame_ppc.hpp
View File

@ -250,9 +250,6 @@
(offset_of(frame::top_ijava_frame_abi, _component))
struct ijava_state {
#ifdef ASSERT
uint64_t ijava_reserved; // Used for assertion.
#endif
uint64_t method;
uint64_t mirror;
uint64_t locals;
@ -409,12 +406,6 @@
// The size of a cInterpreter object.
static inline int interpreter_frame_cinterpreterstate_size_in_bytes();
private:
ConstantPoolCache** interpreter_frame_cpoolcache_addr() const;
public:
// Additional interface for entry frames:
inline entry_frame_locals* get_entry_frame_locals() const {
return (entry_frame_locals*) (((address) fp()) - entry_frame_locals_size);

15
src/hotspot/cpu/ppc/frame_ppc.inline.hpp
View File

@ -130,19 +130,22 @@ inline frame::ijava_state* frame::get_ijava_state() const {
inline intptr_t** frame::interpreter_frame_locals_addr() const {
return (intptr_t**) &(get_ijava_state()->locals);
}
inline intptr_t* frame::interpreter_frame_bcp_addr() const {
return (intptr_t*) &(get_ijava_state()->bcp);
}
inline intptr_t* frame::interpreter_frame_mdp_addr() const {
return (intptr_t*) &(get_ijava_state()->mdx);
}
// Pointer beyond the "oldest/deepest" BasicObjectLock on stack.
inline BasicObjectLock* frame::interpreter_frame_monitor_end() const {
return (BasicObjectLock *) get_ijava_state()->monitors;
return (BasicObjectLock*) get_ijava_state()->monitors;
}
inline BasicObjectLock* frame::interpreter_frame_monitor_begin() const {
return (BasicObjectLock *) get_ijava_state();
return (BasicObjectLock*) get_ijava_state();
}
// Return register stack slot addr at which currently interpreted method is found.
@ -154,23 +157,21 @@ inline oop* frame::interpreter_frame_mirror_addr() const {
return (oop*) &(get_ijava_state()->mirror);
}
inline ConstantPoolCache** frame::interpreter_frame_cpoolcache_addr() const {
return (ConstantPoolCache**) &(get_ijava_state()->cpoolCache);
}
inline ConstantPoolCache** frame::interpreter_frame_cache_addr() const {
return (ConstantPoolCache**) &(get_ijava_state()->cpoolCache);
}
inline oop* frame::interpreter_frame_temp_oop_addr() const {
return (oop *) &(get_ijava_state()->oop_tmp);
return (oop*) &(get_ijava_state()->oop_tmp);
}
inline intptr_t* frame::interpreter_frame_esp() const {
return (intptr_t*) get_ijava_state()->esp;
}
// Convenient setters
inline void frame::interpreter_frame_set_monitor_end(BasicObjectLock* end) { get_ijava_state()->monitors = (intptr_t) end;}
inline void frame::interpreter_frame_set_cpcache(ConstantPoolCache* cp) { *frame::interpreter_frame_cpoolcache_addr() = cp; }
inline void frame::interpreter_frame_set_cpcache(ConstantPoolCache* cp) { *interpreter_frame_cache_addr() = cp; }
inline void frame::interpreter_frame_set_esp(intptr_t* esp) { get_ijava_state()->esp = (intptr_t) esp; }
inline void frame::interpreter_frame_set_top_frame_sp(intptr_t* top_frame_sp) { get_ijava_state()->top_frame_sp = (intptr_t) top_frame_sp; }
inline void frame::interpreter_frame_set_sender_sp(intptr_t* sender_sp) { get_ijava_state()->sender_sp = (intptr_t) sender_sp; }

6
src/hotspot/cpu/ppc/gc/shared/barrierSetAssembler_ppc.cpp
View File

@ -116,3 +116,9 @@ void BarrierSetAssembler::resolve_jobject(MacroAssembler* masm, Register value,
__ verify_oop(value);
__ bind(done);
}
void BarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler* masm, Register dst, Register jni_env,
Register obj, Register tmp, Label& slowpath) {
__ clrrdi(dst, obj, JNIHandles::weak_tag_size);
__ ld(dst, 0, dst); // Resolve (untagged) jobject.
}

3
src/hotspot/cpu/ppc/gc/shared/barrierSetAssembler_ppc.hpp
View File

@ -49,6 +49,9 @@ public:
virtual void resolve_jobject(MacroAssembler* masm, Register value, Register tmp1, Register tmp2, bool needs_frame);
virtual void try_resolve_jobject_in_native(MacroAssembler* masm, Register dst, Register jni_env,
Register obj, Register tmp, Label& slowpath);
virtual void barrier_stubs_init() {}
};

2
src/hotspot/cpu/ppc/globals_ppc.hpp
View File

@ -32,8 +32,6 @@
// Sets the default values for platform dependent flags used by the runtime system.
// (see globals.hpp)
define_pd_global(bool, ShareVtableStubs, true);
define_pd_global(bool, ImplicitNullChecks, true); // Generate code for implicit null checks.
define_pd_global(bool, TrapBasedNullChecks, true);
define_pd_global(bool, UncommonNullCast, true); // Uncommon-trap NULLs passed to check cast.

34
src/hotspot/cpu/ppc/interp_masm_ppc_64.cpp
View File

@ -768,16 +768,6 @@ void InterpreterMacroAssembler::merge_frames(Register Rsender_sp, Register retur
ld(Rscratch1, 0, R1_SP); // *SP
ld(Rsender_sp, _ijava_state_neg(sender_sp), Rscratch1); // top_frame_sp
ld(Rscratch2, 0, Rscratch1); // **SP
#ifdef ASSERT
{
Label Lok;
ld(R0, _ijava_state_neg(ijava_reserved), Rscratch1);
cmpdi(CCR0, R0, 0x5afe);
beq(CCR0, Lok);
stop("frame corrupted (remove activation)", 0x5afe);
bind(Lok);
}
#endif
if (return_pc!=noreg) {
ld(return_pc, _abi(lr), Rscratch1); // LR
}
@ -891,7 +881,7 @@ void InterpreterMacroAssembler::lock_object(Register monitor, Register object) {
} else {
// template code:
//
// markOop displaced_header = obj->mark().set_unlocked();
// markWord displaced_header = obj->mark().set_unlocked();
// monitor->lock()->set_displaced_header(displaced_header);
// if (Atomic::cmpxchg(/*ex=*/monitor, /*addr*/obj->mark_addr(), /*cmp*/displaced_header) == displaced_header) {
// // We stored the monitor address into the object's mark word.
@ -913,17 +903,17 @@ void InterpreterMacroAssembler::lock_object(Register monitor, Register object) {
assert_different_registers(displaced_header, object_mark_addr, current_header, tmp);
// markOop displaced_header = obj->mark().set_unlocked();
// markWord displaced_header = obj->mark().set_unlocked();
// Load markOop from object into displaced_header.
// Load markWord from object into displaced_header.
ld(displaced_header, oopDesc::mark_offset_in_bytes(), object);
if (UseBiasedLocking) {
biased_locking_enter(CCR0, object, displaced_header, tmp, current_header, done, &slow_case);
}
// Set displaced_header to be (markOop of object | UNLOCK_VALUE).
ori(displaced_header, displaced_header, markOopDesc::unlocked_value);
// Set displaced_header to be (markWord of object | UNLOCK_VALUE).
ori(displaced_header, displaced_header, markWord::unlocked_value);
// monitor->lock()->set_displaced_header(displaced_header);
@ -959,12 +949,12 @@ void InterpreterMacroAssembler::lock_object(Register monitor, Register object) {
// We did not see an unlocked object so try the fast recursive case.
// Check if owner is self by comparing the value in the markOop of object
// Check if owner is self by comparing the value in the markWord of object
// (current_header) with the stack pointer.
sub(current_header, current_header, R1_SP);
assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
load_const_optimized(tmp, ~(os::vm_page_size()-1) | markOopDesc::lock_mask_in_place);
load_const_optimized(tmp, ~(os::vm_page_size()-1) | markWord::lock_mask_in_place);
and_(R0/*==0?*/, current_header, tmp);
// If condition is true we are done and hence we can store 0 in the displaced
@ -2263,14 +2253,6 @@ void InterpreterMacroAssembler::restore_interpreter_state(Register scratch, bool
stop("frame too small (restore istate)", 0x5432);
bind(Lok);
}
{
Label Lok;
ld(R0, _ijava_state_neg(ijava_reserved), scratch);
cmpdi(CCR0, R0, 0x5afe);
beq(CCR0, Lok);
stop("frame corrupted (restore istate)", 0x5afe);
bind(Lok);
}
#endif
}
@ -2283,7 +2265,7 @@ void InterpreterMacroAssembler::get_method_counters(Register method,
cmpdi(CCR0, Rcounters, 0);
bne(CCR0, has_counters);
call_VM(noreg, CAST_FROM_FN_PTR(address,
InterpreterRuntime::build_method_counters), method, false);
InterpreterRuntime::build_method_counters), method);
ld(Rcounters, in_bytes(Method::method_counters_offset()), method);
cmpdi(CCR0, Rcounters, 0);
beq(CCR0, skip); // No MethodCounters, OutOfMemory.

144
src/hotspot/cpu/ppc/jniFastGetField_ppc.cpp
View File

@ -1,6 +1,6 @@
/*
* Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2018 SAP SE. All rights reserved.
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2019 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -24,16 +24,138 @@
*/
#include "precompiled.hpp"
#include "asm/assembler.inline.hpp"
#include "asm/macroAssembler.inline.hpp"
#include "gc/shared/barrierSet.hpp"
#include "gc/shared/barrierSetAssembler.hpp"
#include "memory/resourceArea.hpp"
#include "prims/jniFastGetField.hpp"
#include "prims/jvm_misc.hpp"
#include "runtime/safepoint.hpp"
#define __ masm->
#define BUFFER_SIZE 48*BytesPerInstWord
// Common register usage:
// R3/F0: result
// R3_ARG1: jni env
// R4_ARG2: obj
// R5_ARG3: jfield id
address JNI_FastGetField::generate_fast_get_int_field0(BasicType type) {
// We don't have fast jni accessors.
return (address) -1;
const char *name;
switch (type) {
case T_BOOLEAN: name = "jni_fast_GetBooleanField"; break;
case T_BYTE: name = "jni_fast_GetByteField"; break;
case T_CHAR: name = "jni_fast_GetCharField"; break;
case T_SHORT: name = "jni_fast_GetShortField"; break;
case T_INT: name = "jni_fast_GetIntField"; break;
case T_LONG: name = "jni_fast_GetLongField"; break;
case T_FLOAT: name = "jni_fast_GetFloatField"; break;
case T_DOUBLE: name = "jni_fast_GetDoubleField"; break;
default: ShouldNotReachHere();
name = NULL; // unreachable
}
ResourceMark rm;
BufferBlob* blob = BufferBlob::create(name, BUFFER_SIZE);
CodeBuffer cbuf(blob);
MacroAssembler* masm = new MacroAssembler(&cbuf);
address fast_entry = __ function_entry();
Label slow;
const Register Rcounter_addr = R6_ARG4,
Rcounter = R7_ARG5,
Robj = R8_ARG6,
Rtmp = R9_ARG7;
const int counter_offs = __ load_const_optimized(Rcounter_addr,
SafepointSynchronize::safepoint_counter_addr(),
R0, true);
__ ld(Rcounter, counter_offs, Rcounter_addr);
__ andi_(R0, Rcounter, 1);
__ bne(CCR0, slow);
if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
// Field may be volatile.
__ fence();
} else {
// Using acquire to order wrt. JVMTI check and load of result.
__ isync(); // order wrt. to following load(s)
}
if (JvmtiExport::can_post_field_access()) {
// Check to see if a field access watch has been set before we
// take the fast path.
int fac_offs = __ load_const_optimized(Rtmp, JvmtiExport::get_field_access_count_addr(),
R0, true);
__ lwa(Rtmp, fac_offs, Rtmp);
__ cmpwi(CCR0, Rtmp, 0);
__ bne(CCR0, slow);
}
BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
bs->try_resolve_jobject_in_native(masm, Robj, R3_ARG1, R4_ARG2, Rtmp, slow);
__ srwi(Rtmp, R5_ARG3, 2); // offset
assert(count < LIST_CAPACITY, "LIST_CAPACITY too small");
speculative_load_pclist[count] = __ pc(); // Used by the segfault handler
bool is_fp = false;
switch (type) {
case T_BOOLEAN: __ lbzx(Rtmp, Rtmp, Robj); break;
case T_BYTE: __ lbzx(Rtmp, Rtmp, Robj); __ extsb(Rtmp, Rtmp); break;
case T_CHAR: __ lhzx(Rtmp, Rtmp, Robj); break;
case T_SHORT: __ lhax(Rtmp, Rtmp, Robj); break;
case T_INT: __ lwax(Rtmp, Rtmp, Robj); break;
case T_LONG: __ ldx( Rtmp, Rtmp, Robj); break;
case T_FLOAT: __ lfsx(F1_RET, Rtmp, Robj); is_fp = true; break;
case T_DOUBLE: __ lfdx(F1_RET, Rtmp, Robj); is_fp = true; break;
default: ShouldNotReachHere();
}
// Order preceding load(s) wrt. succeeding check (LoadStore for volatile field).
if (is_fp) {
Label next;
__ fcmpu(CCR0, F1_RET, F1_RET);
__ bne(CCR0, next);
__ bind(next);
} else {
__ twi_0(Rtmp);
}
__ isync();
__ ld(R0, counter_offs, Rcounter_addr);
__ cmpd(CCR0, R0, Rcounter);
__ bne(CCR0, slow);
if (!is_fp) {
__ mr(R3_RET, Rtmp);
}
__ blr();
slowcase_entry_pclist[count++] = __ pc();
__ bind(slow);
address slow_case_addr;
switch (type) {
case T_BOOLEAN: slow_case_addr = jni_GetBooleanField_addr(); break;
case T_BYTE: slow_case_addr = jni_GetByteField_addr(); break;
case T_CHAR: slow_case_addr = jni_GetCharField_addr(); break;
case T_SHORT: slow_case_addr = jni_GetShortField_addr(); break;
case T_INT: slow_case_addr = jni_GetIntField_addr(); break;
case T_LONG: slow_case_addr = jni_GetLongField_addr(); break;
case T_FLOAT: slow_case_addr = jni_GetFloatField_addr(); break;
case T_DOUBLE: slow_case_addr = jni_GetDoubleField_addr(); break;
default: ShouldNotReachHere();
slow_case_addr = NULL; // unreachable
}
__ load_const_optimized(R12, slow_case_addr, R0);
__ call_c_and_return_to_caller(R12); // tail call
__ flush();
return fast_entry;
}
address JNI_FastGetField::generate_fast_get_boolean_field() {
@ -57,19 +179,13 @@ address JNI_FastGetField::generate_fast_get_int_field() {
}
address JNI_FastGetField::generate_fast_get_long_field() {
// We don't have fast jni accessors.
return (address) -1;
}
address JNI_FastGetField::generate_fast_get_float_field0(BasicType type) {
// We don't have fast jni accessors.
return (address) -1;
return generate_fast_get_int_field0(T_LONG);
}
address JNI_FastGetField::generate_fast_get_float_field() {
return generate_fast_get_float_field0(T_FLOAT);
return generate_fast_get_int_field0(T_FLOAT);
}
address JNI_FastGetField::generate_fast_get_double_field() {
return generate_fast_get_float_field0(T_DOUBLE);
return generate_fast_get_int_field0(T_DOUBLE);
}

80
src/hotspot/cpu/ppc/macroAssembler_ppc.cpp
View File

@ -2078,7 +2078,7 @@ void MacroAssembler::biased_locking_enter(ConditionRegister cr_reg, Register obj
// whether the epoch is still valid
// Note that the runtime guarantees sufficient alignment of JavaThread
// pointers to allow age to be placed into low bits
assert(markOopDesc::age_shift == markOopDesc::lock_bits + markOopDesc::biased_lock_bits,
assert(markWord::age_shift == markWord::lock_bits + markWord::biased_lock_bits,
"biased locking makes assumptions about bit layout");
if (PrintBiasedLockingStatistics) {
@ -2088,13 +2088,13 @@ void MacroAssembler::biased_locking_enter(ConditionRegister cr_reg, Register obj
stwx(temp_reg, temp2_reg);
}
andi(temp_reg, mark_reg, markOopDesc::biased_lock_mask_in_place);
cmpwi(cr_reg, temp_reg, markOopDesc::biased_lock_pattern);
andi(temp_reg, mark_reg, markWord::biased_lock_mask_in_place);
cmpwi(cr_reg, temp_reg, markWord::biased_lock_pattern);
bne(cr_reg, cas_label);
load_klass(temp_reg, obj_reg);
load_const_optimized(temp2_reg, ~((int) markOopDesc::age_mask_in_place));
load_const_optimized(temp2_reg, ~((int) markWord::age_mask_in_place));
ld(temp_reg, in_bytes(Klass::prototype_header_offset()), temp_reg);
orr(temp_reg, R16_thread, temp_reg);
xorr(temp_reg, mark_reg, temp_reg);
@ -2125,7 +2125,7 @@ void MacroAssembler::biased_locking_enter(ConditionRegister cr_reg, Register obj
// If the low three bits in the xor result aren't clear, that means
// the prototype header is no longer biased and we have to revoke
// the bias on this object.
andi(temp2_reg, temp_reg, markOopDesc::biased_lock_mask_in_place);
andi(temp2_reg, temp_reg, markWord::biased_lock_mask_in_place);
cmpwi(cr_reg, temp2_reg, 0);
bne(cr_reg, try_revoke_bias);
@ -2139,10 +2139,10 @@ void MacroAssembler::biased_locking_enter(ConditionRegister cr_reg, Register obj
// otherwise the manipulations it performs on the mark word are
// illegal.
int shift_amount = 64 - markOopDesc::epoch_shift;
int shift_amount = 64 - markWord::epoch_shift;
// rotate epoch bits to right (little) end and set other bits to 0
// [ big part | epoch | little part ] -> [ 0..0 | epoch ]
rldicl_(temp2_reg, temp_reg, shift_amount, 64 - markOopDesc::epoch_bits);
rldicl_(temp2_reg, temp_reg, shift_amount, 64 - markWord::epoch_bits);
// branch if epoch bits are != 0, i.e. they differ, because the epoch has been incremented
bne(CCR0, try_rebias);
@ -2152,9 +2152,9 @@ void MacroAssembler::biased_locking_enter(ConditionRegister cr_reg, Register obj
// fails we will go in to the runtime to revoke the object's bias.
// Note that we first construct the presumed unbiased header so we
// don't accidentally blow away another thread's valid bias.
andi(mark_reg, mark_reg, (markOopDesc::biased_lock_mask_in_place |
markOopDesc::age_mask_in_place |
markOopDesc::epoch_mask_in_place));
andi(mark_reg, mark_reg, (markWord::biased_lock_mask_in_place |
markWord::age_mask_in_place |
markWord::epoch_mask_in_place));
orr(temp_reg, R16_thread, mark_reg);
assert(oopDesc::mark_offset_in_bytes() == 0, "offset of _mark is not 0");
@ -2187,7 +2187,7 @@ void MacroAssembler::biased_locking_enter(ConditionRegister cr_reg, Register obj
// bias in the current epoch. In other words, we allow transfer of
// the bias from one thread to another directly in this situation.
load_klass(temp_reg, obj_reg);
andi(temp2_reg, mark_reg, markOopDesc::age_mask_in_place);
andi(temp2_reg, mark_reg, markWord::age_mask_in_place);
orr(temp2_reg, R16_thread, temp2_reg);
ld(temp_reg, in_bytes(Klass::prototype_header_offset()), temp_reg);
orr(temp_reg, temp2_reg, temp_reg);
@ -2224,7 +2224,7 @@ void MacroAssembler::biased_locking_enter(ConditionRegister cr_reg, Register obj
// normal locking code.
load_klass(temp_reg, obj_reg);
ld(temp_reg, in_bytes(Klass::prototype_header_offset()), temp_reg);
andi(temp2_reg, mark_reg, markOopDesc::age_mask_in_place);
andi(temp2_reg, mark_reg, markWord::age_mask_in_place);
orr(temp_reg, temp_reg, temp2_reg);
assert(oopDesc::mark_offset_in_bytes() == 0, "offset of _mark is not 0");
@ -2236,7 +2236,7 @@ void MacroAssembler::biased_locking_enter(ConditionRegister cr_reg, Register obj
MacroAssembler::MemBarAcq,
MacroAssembler::cmpxchgx_hint_acquire_lock());
// reload markOop in mark_reg before continuing with lightweight locking
// reload markWord in mark_reg before continuing with lightweight locking
ld(mark_reg, oopDesc::mark_offset_in_bytes(), obj_reg);
// Fall through to the normal CAS-based lock, because no matter what
@ -2264,9 +2264,9 @@ void MacroAssembler::biased_locking_exit (ConditionRegister cr_reg, Register mar
// the bias bit would be clear.
ld(temp_reg, 0, mark_addr);
andi(temp_reg, temp_reg, markOopDesc::biased_lock_mask_in_place);
andi(temp_reg, temp_reg, markWord::biased_lock_mask_in_place);
cmpwi(cr_reg, temp_reg, markOopDesc::biased_lock_pattern);
cmpwi(cr_reg, temp_reg, markWord::biased_lock_pattern);
beq(cr_reg, done);
}
@ -2687,7 +2687,7 @@ void MacroAssembler::rtm_stack_locking(ConditionRegister flag,
load_const_optimized(retry_on_abort_count_Reg, RTMRetryCount); // Retry on abort
bind(L_rtm_retry);
}
andi_(R0, mark_word, markOopDesc::monitor_value); // inflated vs stack-locked|neutral|biased
andi_(R0, mark_word, markWord::monitor_value); // inflated vs stack-locked|neutral|biased
bne(CCR0, IsInflated);
if (PrintPreciseRTMLockingStatistics || profile_rtm) {
@ -2705,10 +2705,10 @@ void MacroAssembler::rtm_stack_locking(ConditionRegister flag,
}
tbegin_();
beq(CCR0, L_on_abort);
ld(mark_word, oopDesc::mark_offset_in_bytes(), obj); // Reload in transaction, conflicts need to be tracked.
andi(R0, mark_word, markOopDesc::biased_lock_mask_in_place); // look at 3 lock bits
cmpwi(flag, R0, markOopDesc::unlocked_value); // bits = 001 unlocked
beq(flag, DONE_LABEL); // all done if unlocked
ld(mark_word, oopDesc::mark_offset_in_bytes(), obj); // Reload in transaction, conflicts need to be tracked.
andi(R0, mark_word, markWord::biased_lock_mask_in_place); // look at 3 lock bits
cmpwi(flag, R0, markWord::unlocked_value); // bits = 001 unlocked
beq(flag, DONE_LABEL); // all done if unlocked
if (UseRTMXendForLockBusy) {
tend_();
@ -2744,9 +2744,9 @@ void MacroAssembler::rtm_inflated_locking(ConditionRegister flag,
assert(UseRTMLocking, "why call this otherwise?");
Label L_rtm_retry, L_decrement_retry, L_on_abort;
// Clean monitor_value bit to get valid pointer.
int owner_offset = ObjectMonitor::owner_offset_in_bytes() - markOopDesc::monitor_value;
int owner_offset = ObjectMonitor::owner_offset_in_bytes() - markWord::monitor_value;
// Store non-null, using boxReg instead of (intptr_t)markOopDesc::unused_mark().
// Store non-null, using boxReg instead of (intptr_t)markWord::unused_mark().
std(boxReg, BasicLock::displaced_header_offset_in_bytes(), boxReg);
const Register tmpReg = boxReg;
const Register owner_addr_Reg = mark_word;
@ -2791,7 +2791,7 @@ void MacroAssembler::rtm_inflated_locking(ConditionRegister flag,
// Restore owner_addr_Reg
ld(mark_word, oopDesc::mark_offset_in_bytes(), obj);
#ifdef ASSERT
andi_(R0, mark_word, markOopDesc::monitor_value);
andi_(R0, mark_word, markWord::monitor_value);
asm_assert_ne("must be inflated", 0xa754); // Deflating only allowed at safepoint.
#endif
addi(owner_addr_Reg, mark_word, owner_offset);
@ -2833,7 +2833,7 @@ void MacroAssembler::compiler_fast_lock_object(ConditionRegister flag, Register
Label object_has_monitor;
Label cas_failed;
// Load markOop from object into displaced_header.
// Load markWord from object into displaced_header.
ld(displaced_header, oopDesc::mark_offset_in_bytes(), oop);
@ -2851,11 +2851,11 @@ void MacroAssembler::compiler_fast_lock_object(ConditionRegister flag, Register
// Handle existing monitor.
// The object has an existing monitor iff (mark & monitor_value) != 0.
andi_(temp, displaced_header, markOopDesc::monitor_value);
andi_(temp, displaced_header, markWord::monitor_value);
bne(CCR0, object_has_monitor);
// Set displaced_header to be (markOop of object | UNLOCK_VALUE).
ori(displaced_header, displaced_header, markOopDesc::unlocked_value);
// Set displaced_header to be (markWord of object | UNLOCK_VALUE).
ori(displaced_header, displaced_header, markWord::unlocked_value);
// Load Compare Value application register.
@ -2863,7 +2863,7 @@ void MacroAssembler::compiler_fast_lock_object(ConditionRegister flag, Register
std(displaced_header, BasicLock::displaced_header_offset_in_bytes(), box);
// Must fence, otherwise, preceding store(s) may float below cmpxchg.
// Compare object markOop with mark and if equal exchange scratch1 with object markOop.
// Compare object markWord with mark and if equal exchange scratch1 with object markWord.
cmpxchgd(/*flag=*/flag,
/*current_value=*/current_header,
/*compare_value=*/displaced_header,
@ -2883,10 +2883,10 @@ void MacroAssembler::compiler_fast_lock_object(ConditionRegister flag, Register
bind(cas_failed);
// We did not see an unlocked object so try the fast recursive case.
// Check if the owner is self by comparing the value in the markOop of object
// Check if the owner is self by comparing the value in the markWord of object
// (current_header) with the stack pointer.
sub(current_header, current_header, R1_SP);
load_const_optimized(temp, ~(os::vm_page_size()-1) | markOopDesc::lock_mask_in_place);
load_const_optimized(temp, ~(os::vm_page_size()-1) | markWord::lock_mask_in_place);
and_(R0/*==0?*/, current_header, temp);
// If condition is true we are cont and hence we can store 0 as the
@ -2910,7 +2910,7 @@ void MacroAssembler::compiler_fast_lock_object(ConditionRegister flag, Register
#endif // INCLUDE_RTM_OPT
// Try to CAS m->owner from NULL to current thread.
addi(temp, displaced_header, ObjectMonitor::owner_offset_in_bytes()-markOopDesc::monitor_value);
addi(temp, displaced_header, ObjectMonitor::owner_offset_in_bytes()-markWord::monitor_value);
cmpxchgd(/*flag=*/flag,
/*current_value=*/current_header,
/*compare_value=*/(intptr_t)0,
@ -2957,12 +2957,12 @@ void MacroAssembler::compiler_fast_unlock_object(ConditionRegister flag, Registe
if (UseRTMForStackLocks && use_rtm) {
assert(!UseBiasedLocking, "Biased locking is not supported with RTM locking");
Label L_regular_unlock;
ld(current_header, oopDesc::mark_offset_in_bytes(), oop); // fetch markword
andi(R0, current_header, markOopDesc::biased_lock_mask_in_place); // look at 3 lock bits
cmpwi(flag, R0, markOopDesc::unlocked_value); // bits = 001 unlocked
bne(flag, L_regular_unlock); // else RegularLock
tend_(); // otherwise end...
b(cont); // ... and we're done
ld(current_header, oopDesc::mark_offset_in_bytes(), oop); // fetch markword
andi(R0, current_header, markWord::biased_lock_mask_in_place); // look at 3 lock bits
cmpwi(flag, R0, markWord::unlocked_value); // bits = 001 unlocked
bne(flag, L_regular_unlock); // else RegularLock
tend_(); // otherwise end...
b(cont); // ... and we're done
bind(L_regular_unlock);
}
#endif
@ -2978,11 +2978,11 @@ void MacroAssembler::compiler_fast_unlock_object(ConditionRegister flag, Registe
// The object has an existing monitor iff (mark & monitor_value) != 0.
RTM_OPT_ONLY( if (!(UseRTMForStackLocks && use_rtm)) ) // skip load if already done
ld(current_header, oopDesc::mark_offset_in_bytes(), oop);
andi_(R0, current_header, markOopDesc::monitor_value);
andi_(R0, current_header, markWord::monitor_value);
bne(CCR0, object_has_monitor);
// Check if it is still a light weight lock, this is is true if we see
// the stack address of the basicLock in the markOop of the object.
// the stack address of the basicLock in the markWord of the object.
// Cmpxchg sets flag to cmpd(current_header, box).
cmpxchgd(/*flag=*/flag,
/*current_value=*/current_header,
@ -3000,7 +3000,7 @@ void MacroAssembler::compiler_fast_unlock_object(ConditionRegister flag, Registe
b(cont);
bind(object_has_monitor);
addi(current_header, current_header, -markOopDesc::monitor_value); // monitor
addi(current_header, current_header, -markWord::monitor_value); // monitor
ld(temp, ObjectMonitor::owner_offset_in_bytes(), current_header);
// It's inflated.

13
src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp
View File

@ -1849,7 +1849,8 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
int compile_id,
BasicType *in_sig_bt,
VMRegPair *in_regs,
BasicType ret_type) {
BasicType ret_type,
address critical_entry) {
#ifdef COMPILER2
if (method->is_method_handle_intrinsic()) {
vmIntrinsics::ID iid = method->intrinsic_id();
@ -1874,7 +1875,7 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
}
bool is_critical_native = true;
address native_func = method->critical_native_function();
address native_func = critical_entry;
if (native_func == NULL) {
native_func = method->native_function();
is_critical_native = false;
@ -2719,10 +2720,6 @@ static void push_skeleton_frame(MacroAssembler* masm, bool deopt,
__ ld(frame_size_reg, 0, frame_sizes_reg);
__ std(pc_reg, _abi(lr), R1_SP);
__ push_frame(frame_size_reg, R0/*tmp*/);
#ifdef ASSERT
__ load_const_optimized(pc_reg, 0x5afe);
__ std(pc_reg, _ijava_state_neg(ijava_reserved), R1_SP);
#endif
__ std(R1_SP, _ijava_state_neg(sender_sp), R1_SP);
__ addi(number_of_frames_reg, number_of_frames_reg, -1);
__ addi(frame_sizes_reg, frame_sizes_reg, wordSize);
@ -2795,10 +2792,6 @@ static void push_skeleton_frames(MacroAssembler* masm, bool deopt,
__ std(R12_scratch2, _abi(lr), R1_SP);
// Initialize initial_caller_sp.
#ifdef ASSERT
__ load_const_optimized(pc_reg, 0x5afe);
__ std(pc_reg, _ijava_state_neg(ijava_reserved), R1_SP);
#endif
__ std(frame_size_reg, _ijava_state_neg(sender_sp), R1_SP);
#ifdef ASSERT

44
src/hotspot/cpu/ppc/templateInterpreterGenerator_ppc.cpp
View File

@ -1050,17 +1050,14 @@ void TemplateInterpreterGenerator::generate_fixed_frame(bool native_call, Regist
// Get mirror and store it in the frame as GC root for this Method*.
__ load_mirror_from_const_method(R12_scratch2, Rconst_method);
__ addi(R26_monitor, R1_SP, - frame::ijava_state_size);
__ addi(R15_esp, R26_monitor, - Interpreter::stackElementSize);
__ addi(R26_monitor, R1_SP, -frame::ijava_state_size);
__ addi(R15_esp, R26_monitor, -Interpreter::stackElementSize);
// Store values.
// R15_esp, R14_bcp, R26_monitor, R28_mdx are saved at java calls
// in InterpreterMacroAssembler::call_from_interpreter.
__ std(R19_method, _ijava_state_neg(method), R1_SP);
__ std(R12_scratch2, _ijava_state_neg(mirror), R1_SP);
__ std(R21_sender_SP, _ijava_state_neg(sender_sp), R1_SP);
__ std(R27_constPoolCache, _ijava_state_neg(cpoolCache), R1_SP);
__ std(R18_locals, _ijava_state_neg(locals), R1_SP);
__ std(R27_constPoolCache, _ijava_state_neg(cpoolCache), R1_SP);
// Note: esp, bcp, monitor, mdx live in registers. Hence, the correct version can only
// be found in the frame after save_interpreter_state is done. This is always true
@ -1068,31 +1065,20 @@ void TemplateInterpreterGenerator::generate_fixed_frame(bool native_call, Regist
// because e.g. frame::interpreter_frame_bcp() will not access the correct value
// (Enhanced Stack Trace).
// The signal handler does not save the interpreter state into the frame.
// We have to initialize some of these frame slots for native calls (accessed by GC).
// Also initialize them for non-native calls for better tool support (even though
// you may not get the most recent version as described above).
__ li(R0, 0);
#ifdef ASSERT
// Fill remaining slots with constants.
__ load_const_optimized(R11_scratch1, 0x5afe);
__ load_const_optimized(R12_scratch2, 0xdead);
#endif
// We have to initialize some frame slots for native calls (accessed by GC).
if (native_call) {
__ std(R26_monitor, _ijava_state_neg(monitors), R1_SP);
__ std(R14_bcp, _ijava_state_neg(bcp), R1_SP);
if (ProfileInterpreter) { __ std(R28_mdx, _ijava_state_neg(mdx), R1_SP); }
}
#ifdef ASSERT
else {
__ std(R12_scratch2, _ijava_state_neg(monitors), R1_SP);
__ std(R12_scratch2, _ijava_state_neg(bcp), R1_SP);
__ std(R12_scratch2, _ijava_state_neg(mdx), R1_SP);
}
__ std(R11_scratch1, _ijava_state_neg(ijava_reserved), R1_SP);
__ std(R12_scratch2, _ijava_state_neg(esp), R1_SP);
__ std(R12_scratch2, _ijava_state_neg(lresult), R1_SP);
__ std(R12_scratch2, _ijava_state_neg(fresult), R1_SP);
#endif
__ std(R26_monitor, _ijava_state_neg(monitors), R1_SP);
__ std(R14_bcp, _ijava_state_neg(bcp), R1_SP);
if (ProfileInterpreter) { __ std(R28_mdx, _ijava_state_neg(mdx), R1_SP); }
__ std(R15_esp, _ijava_state_neg(esp), R1_SP);
__ std(R0, _ijava_state_neg(oop_tmp), R1_SP); // only used for native_call
// Store sender's SP and this frame's top SP.
__ subf(R12_scratch2, top_frame_size, R1_SP);
__ std(R0, _ijava_state_neg(oop_tmp), R1_SP);
__ std(R21_sender_SP, _ijava_state_neg(sender_sp), R1_SP);
__ std(R12_scratch2, _ijava_state_neg(top_frame_sp), R1_SP);
// Push top frame.

2
src/hotspot/cpu/ppc/templateTable_ppc_64.cpp
View File

@ -3820,7 +3820,7 @@ void TemplateTable::_new() {
if (UseBiasedLocking) {
__ ld(Rscratch, in_bytes(Klass::prototype_header_offset()), RinstanceKlass);
} else {
__ load_const_optimized(Rscratch, markOopDesc::prototype(), R0);
__ load_const_optimized(Rscratch, markWord::prototype().value(), R0);
}
__ std(Rscratch, oopDesc::mark_offset_in_bytes(), RallocatedObject);

12
src/hotspot/cpu/s390/c1_MacroAssembler_s390.cpp
View File

@ -31,7 +31,7 @@
#include "gc/shared/collectedHeap.hpp"
#include "interpreter/interpreter.hpp"
#include "oops/arrayOop.hpp"
#include "oops/markOop.hpp"
#include "oops/markWord.hpp"
#include "runtime/basicLock.hpp"
#include "runtime/biasedLocking.hpp"
#include "runtime/os.hpp"
@ -96,7 +96,7 @@ void C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hd
}
// and mark it as unlocked.
z_oill(hdr, markOopDesc::unlocked_value);
z_oill(hdr, markWord::unlocked_value);
// Save unlocked object header into the displaced header location on the stack.
z_stg(hdr, Address(disp_hdr, (intptr_t)0));
// Test if object header is still the same (i.e. unlocked), and if so, store the
@ -115,19 +115,19 @@ void C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hd
// If the object header was not the same, it is now in the hdr register.
// => Test if it is a stack pointer into the same stack (recursive locking), i.e.:
//
// 1) (hdr & markOopDesc::lock_mask_in_place) == 0
// 1) (hdr & markWord::lock_mask_in_place) == 0
// 2) rsp <= hdr
// 3) hdr <= rsp + page_size
//
// These 3 tests can be done by evaluating the following expression:
//
// (hdr - Z_SP) & (~(page_size-1) | markOopDesc::lock_mask_in_place)
// (hdr - Z_SP) & (~(page_size-1) | markWord::lock_mask_in_place)
//
// assuming both the stack pointer and page_size have their least
// significant 2 bits cleared and page_size is a power of 2
z_sgr(hdr, Z_SP);
load_const_optimized(Z_R0_scratch, (~(os::vm_page_size()-1) | markOopDesc::lock_mask_in_place));
load_const_optimized(Z_R0_scratch, (~(os::vm_page_size()-1) | markWord::lock_mask_in_place));
z_ngr(hdr, Z_R0_scratch); // AND sets CC (result eq/ne 0).
// For recursive locking, the result is zero. => Save it in the displaced header
// location (NULL in the displaced hdr location indicates recursive locking).
@ -192,7 +192,7 @@ void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register
z_lg(t1, Address(klass, Klass::prototype_header_offset()));
} else {
// This assumes that all prototype bits fit in an int32_t.
load_const_optimized(t1, (intx)markOopDesc::prototype());
load_const_optimized(t1, (intx)markWord::prototype().value());
}
z_stg(t1, Address(obj, oopDesc::mark_offset_in_bytes()));

4
src/hotspot/cpu/s390/c1_MacroAssembler_s390.hpp
View File

@ -41,14 +41,14 @@
void initialize_body(Register objectFields, Register len_in_bytes, Register Rzero);
// locking
// hdr : Used to hold locked markOop to be CASed into obj, contents destroyed.
// hdr : Used to hold locked markWord to be CASed into obj, contents destroyed.
// obj : Must point to the object to lock, contents preserved.
// disp_hdr: Must point to the displaced header location, contents preserved.
// Returns code offset at which to add null check debug information.
void lock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case);
// unlocking
// hdr : Used to hold original markOop to be CASed back into obj, contents destroyed.
// hdr : Used to hold original markWord to be CASed back into obj, contents destroyed.
// obj : Must point to the object to lock, contents preserved.
// disp_hdr: Must point to the displaced header location, contents destroyed.
void unlock_object(Register hdr, Register obj, Register lock, Label& slow_case);

4
src/hotspot/cpu/s390/compiledIC_s390.cpp
View File

@ -119,7 +119,7 @@ void CompiledDirectStaticCall::set_to_interpreted(const methodHandle& callee, ad
#endif
// Update stub.
method_holder->set_data((intptr_t)callee());
method_holder->set_data((intptr_t)callee(), relocInfo::metadata_type);
jump->set_jump_destination(entry);
// Update jump to call.
@ -134,7 +134,7 @@ void CompiledDirectStaticCall::set_stub_to_clean(static_stub_Relocation* static_
// Creation also verifies the object.
NativeMovConstReg* method_holder = nativeMovConstReg_at(stub + NativeCall::get_IC_pos_in_java_to_interp_stub());
NativeJump* jump = nativeJump_at(method_holder->next_instruction_address());
method_holder->set_data(0);
method_holder->set_data(0, relocInfo::metadata_type);
jump->set_jump_destination((address)-1);
}

2
src/hotspot/cpu/s390/frame_s390.cpp
View File

@ -27,7 +27,7 @@
#include "interpreter/interpreter.hpp"
#include "memory/resourceArea.hpp"
#include "memory/universe.hpp"
#include "oops/markOop.hpp"
#include "oops/markWord.hpp"
#include "oops/oop.inline.hpp"
#include "runtime/frame.inline.hpp"
#include "runtime/handles.inline.hpp"

6
src/hotspot/cpu/s390/gc/shared/barrierSetAssembler_s390.cpp
View File

@ -111,3 +111,9 @@ void BarrierSetAssembler::resolve_jobject(MacroAssembler* masm, Register value,
__ verify_oop(value);
__ bind(Ldone);
}
void BarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
Register obj, Register tmp, Label& slowpath) {
__ z_nill(obj, ~JNIHandles::weak_tag_mask);
__ z_lg(obj, 0, obj); // Resolve (untagged) jobject.
}

3
src/hotspot/cpu/s390/gc/shared/barrierSetAssembler_s390.hpp
View File

@ -46,6 +46,9 @@ public:
virtual void resolve_jobject(MacroAssembler* masm, Register value, Register tmp1, Register tmp2);
virtual void try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
Register obj, Register tmp, Label& slowpath);
virtual void barrier_stubs_init() {}
};

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