6810845: Performance regression in mpegaudio on x64
Used the outer loop frequency in frequencies checks in RA. Reviewed-by: never, twisti
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@ -371,6 +371,7 @@ class PhaseCFG : public Phase {
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Block *_broot; // Basic block of root
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uint _rpo_ctr;
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CFGLoop* _root_loop;
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float _outer_loop_freq; // Outmost loop frequency
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// Per node latency estimation, valid only during GCM
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GrowableArray<uint> _node_latency;
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@ -537,6 +538,7 @@ class CFGLoop : public CFGElement {
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void compute_loop_depth(int depth);
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void compute_freq(); // compute frequency with loop assuming head freq 1.0f
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void scale_freq(); // scale frequency by loop trip count (including outer loops)
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float outer_loop_freq() const; // frequency of outer loop
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bool in_loop_nest(Block* b);
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float trip_count() const { return 1.0f / _exit_prob; }
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virtual bool is_loop() { return true; }
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@ -391,7 +391,7 @@
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product(intx, EliminateAllocationArraySizeLimit, 64, \
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"Array size (number of elements) limit for scalar replacement") \
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\
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product(bool, UseOptoBiasInlining, true, \
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product(bool, UseOptoBiasInlining, true, \
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"Generate biased locking code in C2 ideal graph") \
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\
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product(intx, ValueSearchLimit, 1000, \
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@ -410,7 +410,7 @@
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"Miniumum %% of a successor (predecessor) for which block layout "\
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"a will allow a fork (join) in a single chain") \
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\
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product(bool, BlockLayoutRotateLoops, false, \
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product(bool, BlockLayoutRotateLoops, true, \
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"Allow back branches to be fall throughs in the block layour") \
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C2_FLAGS(DECLARE_DEVELOPER_FLAG, DECLARE_PD_DEVELOPER_FLAG, DECLARE_PRODUCT_FLAG, DECLARE_PD_PRODUCT_FLAG, DECLARE_DIAGNOSTIC_FLAG, DECLARE_NOTPRODUCT_FLAG)
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@ -149,6 +149,9 @@ PhaseChaitin::PhaseChaitin(uint unique, PhaseCFG &cfg, Matcher &matcher)
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#endif
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{
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NOT_PRODUCT( Compile::TracePhase t3("ctorChaitin", &_t_ctorChaitin, TimeCompiler); )
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_high_frequency_lrg = MIN2(float(OPTO_LRG_HIGH_FREQ), _cfg._outer_loop_freq);
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uint i,j;
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// Build a list of basic blocks, sorted by frequency
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_blks = NEW_RESOURCE_ARRAY( Block *, _cfg._num_blocks );
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@ -338,6 +338,8 @@ class PhaseChaitin : public PhaseRegAlloc {
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Block **_blks; // Array of blocks sorted by frequency for coalescing
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float _high_frequency_lrg; // Frequency at which LRG will be spilled for debug info
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#ifndef PRODUCT
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bool _trace_spilling;
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#endif
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@ -360,6 +362,8 @@ public:
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uint n2lidx( const Node *n ) const { return _names[n->_idx]; }
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float high_frequency_lrg() const { return _high_frequency_lrg; }
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#ifndef PRODUCT
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bool trace_spilling() const { return _trace_spilling; }
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#endif
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@ -473,7 +473,7 @@ void PhaseAggressiveCoalesce::insert_copies( Matcher &matcher ) {
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} // End of is two-adr
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// Insert a copy at a debug use for a lrg which has high frequency
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if( (b->_freq < OPTO_DEBUG_SPLIT_FREQ) && n->is_MachSafePoint() ) {
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if( b->_freq < OPTO_DEBUG_SPLIT_FREQ || b->is_uncommon(_phc._cfg._bbs) ) {
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// Walk the debug inputs to the node and check for lrg freq
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JVMState* jvms = n->jvms();
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uint debug_start = jvms ? jvms->debug_start() : 999999;
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@ -487,7 +487,7 @@ void PhaseAggressiveCoalesce::insert_copies( Matcher &matcher ) {
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LRG &lrg = lrgs(nidx);
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// If this lrg has a high frequency use/def
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if( lrg._maxfreq >= OPTO_LRG_HIGH_FREQ ) {
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if( lrg._maxfreq >= _phc.high_frequency_lrg() ) {
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// If the live range is also live out of this block (like it
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// would be for a fast/slow idiom), the normal spill mechanism
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// does an excellent job. If it is not live out of this block
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@ -1374,6 +1374,9 @@ void PhaseCFG::Estimate_Block_Frequency() {
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_root_loop->_freq = 1.0;
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_root_loop->scale_freq();
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// Save outmost loop frequency for LRG frequency threshold
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_outer_loop_freq = _root_loop->outer_loop_freq();
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// force paths ending at uncommon traps to be infrequent
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if (!C->do_freq_based_layout()) {
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Block_List worklist;
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@ -1898,6 +1901,7 @@ bool CFGLoop::in_loop_nest(Block* b) {
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// Do a top down traversal of loop tree (visit outer loops first.)
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void CFGLoop::scale_freq() {
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float loop_freq = _freq * trip_count();
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_freq = loop_freq;
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for (int i = 0; i < _members.length(); i++) {
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CFGElement* s = _members.at(i);
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float block_freq = s->_freq * loop_freq;
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@ -1912,6 +1916,14 @@ void CFGLoop::scale_freq() {
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}
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}
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// Frequency of outer loop
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float CFGLoop::outer_loop_freq() const {
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if (_child != NULL) {
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return _child->_freq;
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}
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return _freq;
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}
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#ifndef PRODUCT
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//------------------------------dump_tree--------------------------------------
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void CFGLoop::dump_tree() const {
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@ -340,6 +340,10 @@ const class TypePtr *MachNode::adr_type() const {
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if (base == NodeSentinel) return TypePtr::BOTTOM;
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const Type* t = base->bottom_type();
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if (UseCompressedOops && Universe::narrow_oop_shift() == 0) {
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// 32-bit unscaled narrow oop can be the base of any address expression
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t = t->make_ptr();
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}
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if (t->isa_intptr_t() && offset != 0 && offset != Type::OffsetBot) {
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// We cannot assert that the offset does not look oop-ish here.
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// Depending on the heap layout the cardmark base could land
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@ -353,6 +357,7 @@ const class TypePtr *MachNode::adr_type() const {
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// be conservative if we do not recognize the type
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if (tp == NULL) {
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assert(false, "this path may produce not optimal code");
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return TypePtr::BOTTOM;
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}
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assert(tp->base() != Type::AnyPtr, "not a bare pointer");
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