8215483: Off heap memory accesses should be vectorized
Reviewed-by: neliasso, kvn
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791ab38fcd
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6c640e1831
@ -2146,9 +2146,9 @@ const bool Matcher::pass_original_key_for_aes() {
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return false;
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}
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// x86 supports misaligned vectors store/load.
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// aarch64 supports misaligned vectors store/load.
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const bool Matcher::misaligned_vectors_ok() {
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return !AlignVector; // can be changed by flag
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return true;
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}
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// false => size gets scaled to BytesPerLong, ok.
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@ -2338,9 +2338,10 @@ const int Matcher::min_vector_size(const BasicType bt) {
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return max_vector_size(bt); // Same as max.
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}
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// PPC doesn't support misaligned vectors store/load.
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// PPC implementation uses VSX load/store instructions (if
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// SuperwordUseVSX) which support 4 byte but not arbitrary alignment
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const bool Matcher::misaligned_vectors_ok() {
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return !AlignVector; // can be changed by flag
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return false;
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}
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// PPC AES support not yet implemented
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@ -1585,7 +1585,7 @@ const uint Matcher::vector_shift_count_ideal_reg(int size) {
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// x86 supports misaligned vectors store/load.
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const bool Matcher::misaligned_vectors_ok() {
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return !AlignVector; // can be changed by flag
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return true;
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}
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// x86 AES instructions are compatible with SunJCE expanded
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@ -613,7 +613,7 @@ void SuperWord::find_adjacent_refs() {
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// alignment is set and vectors will be aligned.
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bool create_pack = true;
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if (memory_alignment(mem_ref, best_iv_adjustment) == 0 || _do_vector_loop) {
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if (!Matcher::misaligned_vectors_ok()) {
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if (!Matcher::misaligned_vectors_ok() || AlignVector) {
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int vw = vector_width(mem_ref);
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int vw_best = vector_width(best_align_to_mem_ref);
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if (vw > vw_best) {
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@ -638,7 +638,7 @@ void SuperWord::find_adjacent_refs() {
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} else {
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// Allow independent (different type) unaligned memory operations
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// if HW supports them.
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if (!Matcher::misaligned_vectors_ok()) {
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if (!Matcher::misaligned_vectors_ok() || AlignVector) {
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create_pack = false;
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} else {
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// Check if packs of the same memory type but
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@ -3372,9 +3372,9 @@ void SuperWord::align_initial_loop_index(MemNode* align_to_ref) {
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_igvn.register_new_node_with_optimizer(e);
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_phase->set_ctrl(e, pre_ctrl);
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}
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if (vw > ObjectAlignmentInBytes) {
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if (vw > ObjectAlignmentInBytes || align_to_ref_p.base()->is_top()) {
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// incorporate base e +/- base && Mask >>> log2(elt)
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Node* xbase = new CastP2XNode(NULL, align_to_ref_p.base());
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Node* xbase = new CastP2XNode(NULL, align_to_ref_p.adr());
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_igvn.register_new_node_with_optimizer(xbase);
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#ifdef _LP64
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xbase = new ConvL2INode(xbase);
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@ -3566,8 +3566,8 @@ SWPointer::SWPointer(MemNode* mem, SuperWord* slp, Node_Stack *nstack, bool anal
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assert(!valid(), "base address is loop variant");
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return;
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}
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//unsafe reference could not be aligned appropriately without runtime checking
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if (base == NULL || base->bottom_type() == Type::TOP) {
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// unsafe references require misaligned vector access support
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if (base->is_top() && !Matcher::misaligned_vectors_ok()) {
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assert(!valid(), "unsafe access");
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return;
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}
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@ -3591,6 +3591,16 @@ SWPointer::SWPointer(MemNode* mem, SuperWord* slp, Node_Stack *nstack, bool anal
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break; // stop looking at addp's
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}
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}
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if (!invariant(adr)) {
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assert(!valid(), "adr is loop variant");
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return;
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}
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if (!base->is_top() && adr != base) {
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assert(!valid(), "adr and base differ");
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return;
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}
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NOT_PRODUCT(if(_slp->is_trace_alignment()) _tracer.restore_depth();)
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NOT_PRODUCT(_tracer.ctor_6(mem);)
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