8233328: fix minimal VM build on Linux s390x
Reviewed-by: lucy, mdoerr
This commit is contained in:
parent
3b5b596f4b
commit
6e3be7fbf7
@ -1,6 +1,6 @@
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/*
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/*
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* Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016 SAP SE. All rights reserved.
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* Copyright (c) 2016, 2019, SAP SE. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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*
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* This code is free software; you can redistribute it and/or modify it
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* This code is free software; you can redistribute it and/or modify it
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@ -75,6 +75,7 @@ address CompiledStaticCall::emit_to_interp_stub(CodeBuffer &cbuf, address mark/*
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return stub;
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return stub;
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#else
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#else
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ShouldNotReachHere();
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ShouldNotReachHere();
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return NULL;
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#endif
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#endif
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}
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}
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@ -28,8 +28,6 @@
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#include "code/codeCache.hpp"
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#include "code/codeCache.hpp"
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#include "compiler/disassembler.hpp"
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#include "compiler/disassembler.hpp"
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#include "depChecker_s390.hpp"
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#include "depChecker_s390.hpp"
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#include "gc/cms/concurrentMarkSweepGeneration.inline.hpp"
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#include "gc/cms/parOopClosures.inline.hpp"
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#include "gc/shared/collectedHeap.hpp"
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#include "gc/shared/collectedHeap.hpp"
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#include "gc/shared/cardTableBarrierSet.hpp"
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#include "gc/shared/cardTableBarrierSet.hpp"
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#include "gc/shared/genOopClosures.inline.hpp"
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#include "gc/shared/genOopClosures.inline.hpp"
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@ -37,9 +37,11 @@
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#include "oops/accessDecorators.hpp"
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#include "oops/accessDecorators.hpp"
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#include "oops/compressedOops.inline.hpp"
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#include "oops/compressedOops.inline.hpp"
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#include "oops/klass.inline.hpp"
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#include "oops/klass.inline.hpp"
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#ifdef COMPILER2
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#include "opto/compile.hpp"
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#include "opto/compile.hpp"
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#include "opto/intrinsicnode.hpp"
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#include "opto/intrinsicnode.hpp"
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#include "opto/matcher.hpp"
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#include "opto/matcher.hpp"
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#endif
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#include "prims/methodHandles.hpp"
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#include "prims/methodHandles.hpp"
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#include "registerSaver_s390.hpp"
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#include "registerSaver_s390.hpp"
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#include "runtime/biasedLocking.hpp"
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#include "runtime/biasedLocking.hpp"
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@ -2925,7 +2927,7 @@ unsigned int MacroAssembler::call_ic_miss_handler(Label& ICM, int trapMarker, in
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}
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}
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void MacroAssembler::nmethod_UEP(Label& ic_miss) {
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void MacroAssembler::nmethod_UEP(Label& ic_miss) {
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Register ic_reg = as_Register(Matcher::inline_cache_reg_encode());
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Register ic_reg = Z_inline_cache;
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int klass_offset = oopDesc::klass_offset_in_bytes();
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int klass_offset = oopDesc::klass_offset_in_bytes();
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if (!ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(klass_offset)) {
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if (!ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(klass_offset)) {
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if (VM_Version::has_CompareBranch()) {
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if (VM_Version::has_CompareBranch()) {
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@ -4590,6 +4592,7 @@ unsigned int MacroAssembler::CopyRawMemory_AlignedDisjoint(Register src_reg, Reg
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return block_end - block_start;
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return block_end - block_start;
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}
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}
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#ifdef COMPILER2
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//------------------------------------------------------
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//------------------------------------------------------
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// Special String Intrinsics. Implementation
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// Special String Intrinsics. Implementation
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//------------------------------------------------------
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//------------------------------------------------------
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@ -5837,7 +5840,7 @@ unsigned int MacroAssembler::string_indexof_char(Register result, Register hayst
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return offset() - block_start;
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return offset() - block_start;
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}
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}
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#endif
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//-------------------------------------------------
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//-------------------------------------------------
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// Constants (scalar and oop) in constant pool
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// Constants (scalar and oop) in constant pool
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@ -6150,96 +6153,6 @@ void MacroAssembler::translate_tt(Register r1, Register r2, uint m3) {
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Assembler::z_brc(Assembler::bcondOverflow /* CC==3 (iterate) */, retry);
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Assembler::z_brc(Assembler::bcondOverflow /* CC==3 (iterate) */, retry);
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}
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}
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void MacroAssembler::generate_type_profiling(const Register Rdata,
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const Register Rreceiver_klass,
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const Register Rwanted_receiver_klass,
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const Register Rmatching_row,
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bool is_virtual_call) {
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const int row_size = in_bytes(ReceiverTypeData::receiver_offset(1)) -
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in_bytes(ReceiverTypeData::receiver_offset(0));
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const int num_rows = ReceiverTypeData::row_limit();
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NearLabel found_free_row;
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NearLabel do_increment;
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NearLabel found_no_slot;
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BLOCK_COMMENT("type profiling {");
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// search for:
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// a) The type given in Rwanted_receiver_klass.
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// b) The *first* empty row.
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// First search for a) only, just running over b) with no regard.
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// This is possible because
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// wanted_receiver_class == receiver_class && wanted_receiver_class == 0
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// is never true (receiver_class can't be zero).
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for (int row_num = 0; row_num < num_rows; row_num++) {
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// Row_offset should be a well-behaved positive number. The generated code relies
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// on that wrt constant code size. Add2reg can handle all row_offset values, but
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// will have to vary generated code size.
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int row_offset = in_bytes(ReceiverTypeData::receiver_offset(row_num));
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assert(Displacement::is_shortDisp(row_offset), "Limitation of generated code");
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// Is Rwanted_receiver_klass in this row?
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if (VM_Version::has_CompareBranch()) {
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z_lg(Rwanted_receiver_klass, row_offset, Z_R0, Rdata);
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// Rmatching_row = Rdata + row_offset;
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add2reg(Rmatching_row, row_offset, Rdata);
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// if (*row_recv == (intptr_t) receiver_klass) goto fill_existing_slot;
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compare64_and_branch(Rwanted_receiver_klass, Rreceiver_klass, Assembler::bcondEqual, do_increment);
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} else {
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add2reg(Rmatching_row, row_offset, Rdata);
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z_cg(Rreceiver_klass, row_offset, Z_R0, Rdata);
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z_bre(do_increment);
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}
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}
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// Now that we did not find a match, let's search for b).
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// We could save the first calculation of Rmatching_row if we woud search for a) in reverse order.
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// We would then end up here with Rmatching_row containing the value for row_num == 0.
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// We would not see much benefit, if any at all, because the CPU can schedule
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// two instructions together with a branch anyway.
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for (int row_num = 0; row_num < num_rows; row_num++) {
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int row_offset = in_bytes(ReceiverTypeData::receiver_offset(row_num));
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// Has this row a zero receiver_klass, i.e. is it empty?
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if (VM_Version::has_CompareBranch()) {
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z_lg(Rwanted_receiver_klass, row_offset, Z_R0, Rdata);
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// Rmatching_row = Rdata + row_offset
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add2reg(Rmatching_row, row_offset, Rdata);
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// if (*row_recv == (intptr_t) 0) goto found_free_row
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compare64_and_branch(Rwanted_receiver_klass, (intptr_t)0, Assembler::bcondEqual, found_free_row);
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} else {
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add2reg(Rmatching_row, row_offset, Rdata);
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load_and_test_long(Rwanted_receiver_klass, Address(Rdata, row_offset));
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z_bre(found_free_row); // zero -> Found a free row.
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}
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}
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// No match, no empty row found.
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// Increment total counter to indicate polymorphic case.
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if (is_virtual_call) {
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add2mem_64(Address(Rdata, CounterData::count_offset()), 1, Rmatching_row);
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}
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z_bru(found_no_slot);
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// Here we found an empty row, but we have not found Rwanted_receiver_klass.
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// Rmatching_row holds the address to the first empty row.
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bind(found_free_row);
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// Store receiver_klass into empty slot.
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z_stg(Rreceiver_klass, 0, Z_R0, Rmatching_row);
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// Increment the counter of Rmatching_row.
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bind(do_increment);
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ByteSize counter_offset = ReceiverTypeData::receiver_count_offset(0) - ReceiverTypeData::receiver_offset(0);
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add2mem_64(Address(Rmatching_row, counter_offset), 1, Rdata);
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bind(found_no_slot);
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BLOCK_COMMENT("} type profiling");
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}
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//---------------------------------------
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//---------------------------------------
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// Helpers for Intrinsic Emitters
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// Helpers for Intrinsic Emitters
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//---------------------------------------
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//---------------------------------------
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@ -850,6 +850,7 @@ class MacroAssembler: public Assembler {
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// Kills: tmp, Z_R0, Z_R1.
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// Kills: tmp, Z_R0, Z_R1.
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// Early clobber: result.
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// Early clobber: result.
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// Boolean precise controls accuracy of result value.
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// Boolean precise controls accuracy of result value.
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#ifdef COMPILER2
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unsigned int string_compress(Register result, Register src, Register dst, Register cnt,
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unsigned int string_compress(Register result, Register src, Register dst, Register cnt,
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Register tmp, bool precise);
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Register tmp, bool precise);
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@ -885,6 +886,7 @@ class MacroAssembler: public Assembler {
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unsigned int string_indexof_char(Register result, Register haystack, Register haycnt,
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unsigned int string_indexof_char(Register result, Register haystack, Register haycnt,
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Register needle, jchar needleChar, Register odd_reg, Register even_reg, bool is_byte);
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Register needle, jchar needleChar, Register odd_reg, Register even_reg, bool is_byte);
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#endif
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// Emit an oop const to the constant pool and set a relocation info
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// Emit an oop const to the constant pool and set a relocation info
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// with address current_pc. Return the TOC offset of the constant.
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// with address current_pc. Return the TOC offset of the constant.
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@ -918,13 +920,6 @@ class MacroAssembler: public Assembler {
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// Offset is +/- 2**32 -> use long.
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// Offset is +/- 2**32 -> use long.
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static long get_load_const_from_toc_offset(address a);
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static long get_load_const_from_toc_offset(address a);
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void generate_type_profiling(const Register Rdata,
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const Register Rreceiver_klass,
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const Register Rwanted_receiver_klass,
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const Register Rmatching_row,
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bool is_virtual_call);
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// Bit operations for single register operands.
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// Bit operations for single register operands.
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inline void lshift(Register r, int places, bool doubl = true); // <<
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inline void lshift(Register r, int places, bool doubl = true); // <<
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inline void rshift(Register r, int places, bool doubl = true); // >>
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inline void rshift(Register r, int places, bool doubl = true); // >>
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@ -32,6 +32,7 @@
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#include "interpreter/interpreter.hpp"
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#include "interpreter/interpreter.hpp"
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#include "interpreter/interp_masm.hpp"
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#include "interpreter/interp_masm.hpp"
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#include "memory/resourceArea.hpp"
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#include "memory/resourceArea.hpp"
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#include "nativeInst_s390.hpp"
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#include "oops/compiledICHolder.hpp"
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#include "oops/compiledICHolder.hpp"
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#include "oops/klass.inline.hpp"
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#include "oops/klass.inline.hpp"
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#include "registerSaver_s390.hpp"
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#include "registerSaver_s390.hpp"
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@ -1521,7 +1522,6 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
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VMRegPair *in_regs,
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VMRegPair *in_regs,
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BasicType ret_type,
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BasicType ret_type,
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address critical_entry) {
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address critical_entry) {
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#ifdef COMPILER2
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int total_in_args = method->size_of_parameters();
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int total_in_args = method->size_of_parameters();
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if (method->is_method_handle_intrinsic()) {
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if (method->is_method_handle_intrinsic()) {
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vmIntrinsics::ID iid = method->intrinsic_id();
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vmIntrinsics::ID iid = method->intrinsic_id();
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@ -2401,10 +2401,6 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
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}
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}
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return nm;
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return nm;
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#else
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ShouldNotReachHere();
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return NULL;
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#endif // COMPILER2
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}
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}
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static address gen_c2i_adapter(MacroAssembler *masm,
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static address gen_c2i_adapter(MacroAssembler *masm,
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@ -2880,7 +2876,7 @@ void SharedRuntime::generate_deopt_blob() {
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// to Deoptimization::fetch_unroll_info below.
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// to Deoptimization::fetch_unroll_info below.
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// The (int) cast is necessary, because -((unsigned int)14)
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// The (int) cast is necessary, because -((unsigned int)14)
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// is an unsigned int.
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// is an unsigned int.
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__ add2reg(Z_R14, -(int)HandlerImpl::size_deopt_handler());
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__ add2reg(Z_R14, -(int)NativeCall::max_instruction_size());
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const Register exec_mode_reg = Z_tmp_1;
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const Register exec_mode_reg = Z_tmp_1;
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@ -61,7 +61,9 @@ void VM_Version::initialize() {
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intx cache_line_size = Dcache_lineSize(0);
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intx cache_line_size = Dcache_lineSize(0);
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#ifdef COMPILER2
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MaxVectorSize = 8;
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MaxVectorSize = 8;
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#endif
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if (has_PrefetchRaw()) {
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if (has_PrefetchRaw()) {
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if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { // not preset
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if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { // not preset
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@ -217,6 +219,7 @@ void VM_Version::initialize() {
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FLAG_SET_DEFAULT(UseSHA, false);
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FLAG_SET_DEFAULT(UseSHA, false);
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}
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}
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#ifdef COMPILER2
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if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
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if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
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FLAG_SET_DEFAULT(UseMultiplyToLenIntrinsic, true);
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FLAG_SET_DEFAULT(UseMultiplyToLenIntrinsic, true);
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}
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}
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@ -226,6 +229,7 @@ void VM_Version::initialize() {
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if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
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if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
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FLAG_SET_DEFAULT(UseMontgomerySquareIntrinsic, true);
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FLAG_SET_DEFAULT(UseMontgomerySquareIntrinsic, true);
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}
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}
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#endif
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if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
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if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
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FLAG_SET_DEFAULT(UsePopCountInstruction, true);
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FLAG_SET_DEFAULT(UsePopCountInstruction, true);
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}
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}
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@ -1,6 +1,6 @@
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/*
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/*
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* Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016, 2018 SAP SE. All rights reserved.
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* Copyright (c) 2016, 2019 SAP SE. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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*
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* This code is free software; you can redistribute it and/or modify it
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* This code is free software; you can redistribute it and/or modify it
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@ -426,6 +426,7 @@ JVM_handle_linux_signal(int sig,
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stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::IMPLICIT_NULL);
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stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::IMPLICIT_NULL);
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}
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}
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#ifdef COMPILER2
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// SIGTRAP-based implicit range check in compiled code.
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// SIGTRAP-based implicit range check in compiled code.
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else if (sig == SIGFPE && TrapBasedRangeChecks &&
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else if (sig == SIGFPE && TrapBasedRangeChecks &&
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(trap_pc != NULL) &&
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(trap_pc != NULL) &&
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@ -435,6 +436,7 @@ JVM_handle_linux_signal(int sig,
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}
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}
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stub = SharedRuntime::continuation_for_implicit_exception(thread, trap_pc, SharedRuntime::IMPLICIT_NULL);
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stub = SharedRuntime::continuation_for_implicit_exception(thread, trap_pc, SharedRuntime::IMPLICIT_NULL);
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}
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}
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#endif
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else if (sig == SIGFPE && info->si_code == FPE_INTDIV) {
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else if (sig == SIGFPE && info->si_code == FPE_INTDIV) {
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stub = SharedRuntime::continuation_for_implicit_exception(thread, trap_pc, SharedRuntime::IMPLICIT_DIVIDE_BY_ZERO);
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stub = SharedRuntime::continuation_for_implicit_exception(thread, trap_pc, SharedRuntime::IMPLICIT_DIVIDE_BY_ZERO);
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