8295166: IGV: dump graph at more locations
Reviewed-by: thartmann, rcastanedalo, chagedorn
This commit is contained in:
parent
9e48b90c7f
commit
701bc3bbbe
@ -365,10 +365,10 @@
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"Level of detail of the ideal graph printout. " \
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"System-wide value, -1=printing is disabled, " \
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"0=print nothing except IGVPrintLevel directives, " \
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"5=all details printed. " \
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"6=all details printed. " \
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"Level of detail of printouts can be set on a per-method level " \
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"as well by using CompileCommand=option.") \
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range(-1, 5) \
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range(-1, 6) \
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\
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notproduct(intx, PrintIdealGraphPort, 4444, \
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"Ideal graph printer to network port") \
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@ -1041,6 +1041,10 @@ void Compile::Init(bool aliasing) {
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Copy::zero_to_bytes(_trap_hist, sizeof(_trap_hist));
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set_decompile_count(0);
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#ifndef PRODUCT
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Copy::zero_to_bytes(_igv_phase_iter, sizeof(_igv_phase_iter));
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#endif
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set_do_freq_based_layout(_directive->BlockLayoutByFrequencyOption);
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_loop_opts_cnt = LoopOptsCount;
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set_do_inlining(Inline);
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@ -2397,6 +2401,7 @@ void Compile::Optimize() {
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if (failing()) return;
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// Conditional Constant Propagation;
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print_method(PHASE_BEFORE_CCP1, 2);
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PhaseCCP ccp( &igvn );
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assert( true, "Break here to ccp.dump_nodes_and_types(_root,999,1)");
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{
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@ -2972,6 +2977,8 @@ void Compile::Code_Gen() {
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if (failing()) {
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return;
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}
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print_method(PHASE_REGISTER_ALLOCATION, 2);
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}
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// Prior to register allocation we kept empty basic blocks in case the
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@ -2989,6 +2996,7 @@ void Compile::Code_Gen() {
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cfg.fixup_flow();
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cfg.remove_unreachable_blocks();
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cfg.verify_dominator_tree();
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print_method(PHASE_BLOCK_ORDERING, 3);
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}
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// Apply peephole optimizations
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@ -2996,12 +3004,14 @@ void Compile::Code_Gen() {
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TracePhase tp("peephole", &timers[_t_peephole]);
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PhasePeephole peep( _regalloc, cfg);
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peep.do_transform();
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print_method(PHASE_PEEPHOLE, 3);
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}
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// Do late expand if CPU requires this.
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if (Matcher::require_postalloc_expand) {
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TracePhase tp("postalloc_expand", &timers[_t_postalloc_expand]);
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cfg.postalloc_expand(_regalloc);
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print_method(PHASE_POSTALLOC_EXPAND, 3);
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}
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// Convert Nodes to instruction bits in a buffer
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@ -5102,6 +5112,10 @@ void Compile::print_method(CompilerPhaseType cpt, int level, Node* n) {
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ResourceMark rm;
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stringStream ss;
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ss.print_raw(CompilerPhaseTypeHelper::to_description(cpt));
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int iter = ++_igv_phase_iter[cpt];
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if (iter > 1) {
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ss.print(" %d", iter);
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}
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if (n != nullptr) {
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ss.print(": %d %s ", n->_idx, NodeClassNames[n->Opcode()]);
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}
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@ -343,6 +343,7 @@ class Compile : public Phase {
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bool _print_intrinsics; // True if we should print intrinsics for this compilation
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#ifndef PRODUCT
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uint _igv_idx; // Counter for IGV node identifiers
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uint _igv_phase_iter[PHASE_NUM_TYPES]; // Counters for IGV phase iterations
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bool _trace_opto_output;
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bool _parsed_irreducible_loop; // True if ciTypeFlow detected irreducible loops during parsing
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#endif
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@ -531,6 +532,7 @@ private:
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#ifndef PRODUCT
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IdealGraphPrinter* igv_printer() { return _igv_printer; }
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void reset_igv_phase_iter(CompilerPhaseType cpt) { _igv_phase_iter[cpt] = 0; }
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#endif
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void log_late_inline(CallGenerator* cg);
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@ -1180,6 +1180,7 @@ bool PhaseIdealLoop::loop_predication_impl_helper(IdealLoopTree* loop, IfProjNod
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}
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BoolNode* bol = test->as_Bool();
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if (invar.is_invariant(bol)) {
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C->print_method(PHASE_BEFORE_LOOP_PREDICATION_IC, 4, iff);
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// Invariant test
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new_predicate_proj = create_new_if_for_predicate(parse_predicate_proj, nullptr,
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reason,
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@ -1197,6 +1198,9 @@ bool PhaseIdealLoop::loop_predication_impl_helper(IdealLoopTree* loop, IfProjNod
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IfNode* new_predicate_iff = new_predicate_proj->in(0)->as_If();
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_igvn.hash_delete(new_predicate_iff);
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new_predicate_iff->set_req(1, new_predicate_bol);
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C->print_method(PHASE_AFTER_LOOP_PREDICATION_IC, 4, new_predicate_proj->in(0));
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#ifndef PRODUCT
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if (TraceLoopPredicate) {
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tty->print("Predicate invariant if%s: %d ", negated ? " negated" : "", new_predicate_iff->_idx);
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@ -1207,6 +1211,7 @@ bool PhaseIdealLoop::loop_predication_impl_helper(IdealLoopTree* loop, IfProjNod
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}
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#endif
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} else if (cl != nullptr && loop->is_range_check_if(if_success_proj, this, invar DEBUG_ONLY(COMMA parse_predicate_proj))) {
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C->print_method(PHASE_BEFORE_LOOP_PREDICATION_RC, 4, iff);
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// Range check for counted loops
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assert(if_success_proj->is_IfTrue(), "trap must be on false projection for a range check");
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const Node* cmp = bol->in(1)->as_Cmp();
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@ -1270,6 +1275,8 @@ bool PhaseIdealLoop::loop_predication_impl_helper(IdealLoopTree* loop, IfProjNod
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new_predicate_proj = add_template_assertion_predicate(iff, loop, if_success_proj, parse_predicate_proj, upper_bound_proj, scale,
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offset, init, limit, stride, rng, overflow, reason);
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C->print_method(PHASE_AFTER_LOOP_PREDICATION_RC, 4, new_predicate_proj->in(0));
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#ifndef PRODUCT
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if (TraceLoopOpts && !TraceLoopPredicate) {
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tty->print("Predicate RC ");
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@ -703,6 +703,9 @@ void PhaseIdealLoop::do_peeling(IdealLoopTree *loop, Node_List &old_new) {
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}
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#endif
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LoopNode* head = loop->_head->as_Loop();
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C->print_method(PHASE_BEFORE_LOOP_PEELING, 4, head);
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bool counted_loop = head->is_CountedLoop();
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if (counted_loop) {
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CountedLoopNode *cl = head->as_CountedLoop();
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@ -795,6 +798,8 @@ void PhaseIdealLoop::do_peeling(IdealLoopTree *loop, Node_List &old_new) {
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peeled_dom_test_elim(loop,old_new);
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loop->record_for_igvn();
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C->print_method(PHASE_AFTER_LOOP_PEELING, 4, new_head);
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}
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//------------------------------policy_maximally_unroll------------------------
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@ -1629,6 +1634,8 @@ void PhaseIdealLoop::insert_pre_post_loops(IdealLoopTree *loop, Node_List &old_n
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CountedLoopEndNode *main_end = main_head->loopexit();
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assert(main_end->outcnt() == 2, "1 true, 1 false path only");
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C->print_method(PHASE_BEFORE_PRE_MAIN_POST, 4, main_head);
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Node *pre_header= main_head->in(LoopNode::EntryControl);
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Node *init = main_head->init_trip();
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Node *incr = main_end ->incr();
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@ -1825,6 +1832,8 @@ void PhaseIdealLoop::insert_pre_post_loops(IdealLoopTree *loop, Node_List &old_n
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// finds some, but we _know_ they are all useless.
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peeled_dom_test_elim(loop,old_new);
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loop->record_for_igvn();
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C->print_method(PHASE_AFTER_PRE_MAIN_POST, 4, main_head);
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}
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//------------------------------insert_vector_post_loop------------------------
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@ -2127,6 +2136,9 @@ void PhaseIdealLoop::do_unroll(IdealLoopTree *loop, Node_List &old_new, bool adj
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assert(LoopUnrollLimit, "");
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CountedLoopNode *loop_head = loop->_head->as_CountedLoop();
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CountedLoopEndNode *loop_end = loop_head->loopexit();
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C->print_method(PHASE_BEFORE_LOOP_UNROLLING, 4, loop_head);
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#ifndef PRODUCT
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if (PrintOpto && VerifyLoopOptimizations) {
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tty->print("Unrolling ");
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@ -2374,6 +2386,8 @@ void PhaseIdealLoop::do_unroll(IdealLoopTree *loop, Node_List &old_new, bool adj
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}
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}
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#endif
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C->print_method(PHASE_AFTER_LOOP_UNROLLING, 4, clone_head);
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}
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//------------------------------do_maximally_unroll----------------------------
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@ -3003,6 +3017,8 @@ void PhaseIdealLoop::do_range_check(IdealLoopTree *loop, Node_List &old_new) {
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// stride_con and scale_con can be negative which will flip about the
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// sense of the test.
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C->print_method(PHASE_BEFORE_RANGE_CHECK_ELIMINATION, 4, iff);
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// Perform the limit computations in jlong to avoid overflow
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jlong lscale_con = scale_con;
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Node* int_offset = offset;
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@ -3103,6 +3119,9 @@ void PhaseIdealLoop::do_range_check(IdealLoopTree *loop, Node_List &old_new) {
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--imax;
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}
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}
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C->print_method(PHASE_AFTER_RANGE_CHECK_ELIMINATION, 4, cl);
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} // End of is IF
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}
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if (loop_entry != cl->skip_strip_mined()->in(LoopNode::EntryControl)) {
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@ -134,6 +134,8 @@ void PhaseIdealLoop::do_unswitching(IdealLoopTree *loop, Node_List &old_new) {
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}
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#endif
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C->print_method(PHASE_BEFORE_LOOP_UNSWITCHING, 4, head);
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// Need to revert back to normal loop
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if (head->is_CountedLoop() && !head->as_CountedLoop()->is_normal_loop()) {
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head->as_CountedLoop()->set_normal_loop();
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@ -200,6 +202,8 @@ void PhaseIdealLoop::do_unswitching(IdealLoopTree *loop, Node_List &old_new) {
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}
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#endif
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C->print_method(PHASE_AFTER_LOOP_UNSWITCHING, 4, head_clone);
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C->set_major_progress();
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}
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@ -1446,7 +1446,12 @@ void PhaseIdealLoop::split_if_with_blocks_post(Node *n) {
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}
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// Now split the IF
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C->print_method(PHASE_BEFORE_SPLIT_IF, 4, iff);
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if ((PrintOpto && VerifyLoopOptimizations) || TraceLoopOpts) {
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tty->print_cr("Split-If");
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}
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do_split_if(iff);
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C->print_method(PHASE_AFTER_SPLIT_IF, 4, iff);
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return;
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}
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@ -3625,6 +3630,9 @@ bool PhaseIdealLoop::partial_peel( IdealLoopTree *loop, Node_List &old_new ) {
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}
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}
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#endif
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C->print_method(PHASE_BEFORE_PARTIAL_PEELING, 4, head);
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VectorSet peel;
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VectorSet not_peel;
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Node_List peel_list;
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@ -3919,6 +3927,9 @@ bool PhaseIdealLoop::partial_peel( IdealLoopTree *loop, Node_List &old_new ) {
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}
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}
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#endif
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C->print_method(PHASE_AFTER_PARTIAL_PEELING, 4, new_head_clone);
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return true;
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}
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@ -2779,7 +2779,7 @@ void Parse::do_one_bytecode() {
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}
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#ifndef PRODUCT
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constexpr int perBytecode = 5;
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constexpr int perBytecode = 6;
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if (C->should_print_igv(perBytecode)) {
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IdealGraphPrinter* printer = C->igv_printer();
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char buffer[256];
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@ -894,7 +894,7 @@ void PhaseIterGVN::verify_step(Node* n) {
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void PhaseIterGVN::trace_PhaseIterGVN(Node* n, Node* nn, const Type* oldtype) {
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const Type* newtype = type_or_null(n);
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if (nn != n || oldtype != newtype) {
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C->print_method(PHASE_AFTER_ITER_GVN_STEP, 4, n);
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C->print_method(PHASE_AFTER_ITER_GVN_STEP, 5, n);
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}
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if (TraceIterativeGVN) {
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uint wlsize = _worklist.size();
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@ -1025,6 +1025,7 @@ void PhaseIterGVN::trace_PhaseIterGVN_verbose(Node* n, int num_processed) {
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void PhaseIterGVN::optimize() {
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DEBUG_ONLY(uint num_processed = 0;)
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NOT_PRODUCT(init_verifyPhaseIterGVN();)
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NOT_PRODUCT(C->reset_igv_phase_iter(PHASE_AFTER_ITER_GVN_STEP);)
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C->print_method(PHASE_BEFORE_ITER_GVN, 3);
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if (StressIGVN) {
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shuffle_worklist();
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@ -28,51 +28,77 @@
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#include "utilities/bitMap.inline.hpp"
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#define COMPILER_PHASES(flags) \
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flags(BEFORE_STRINGOPTS, "Before StringOpts") \
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flags(AFTER_STRINGOPTS, "After StringOpts") \
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flags(BEFORE_REMOVEUSELESS, "Before RemoveUseless") \
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flags(AFTER_PARSING, "After Parsing") \
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flags(BEFORE_ITER_GVN, "Before Iter GVN") \
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flags(ITER_GVN1, "Iter GVN 1") \
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flags(AFTER_ITER_GVN_STEP, "After Iter GVN Step") \
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flags(AFTER_ITER_GVN, "After Iter GVN") \
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flags(INCREMENTAL_INLINE_STEP, "Incremental Inline Step") \
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flags(INCREMENTAL_INLINE_CLEANUP, "Incremental Inline Cleanup") \
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flags(INCREMENTAL_INLINE, "Incremental Inline") \
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flags(INCREMENTAL_BOXING_INLINE, "Incremental Boxing Inline") \
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flags(EXPAND_VUNBOX, "Expand VectorUnbox") \
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flags(SCALARIZE_VBOX, "Scalarize VectorBox") \
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flags(INLINE_VECTOR_REBOX, "Inline Vector Rebox Calls") \
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flags(EXPAND_VBOX, "Expand VectorBox") \
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flags(ELIMINATE_VBOX_ALLOC, "Eliminate VectorBoxAllocate") \
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flags(ITER_GVN_BEFORE_EA, "Iter GVN before EA") \
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flags(ITER_GVN_AFTER_VECTOR, "Iter GVN after vector box elimination") \
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flags(BEFORE_BEAUTIFY_LOOPS, "Before beautify loops") \
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flags(AFTER_BEAUTIFY_LOOPS, "After beautify loops") \
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flags(BEFORE_CLOOPS, "Before CountedLoop") \
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flags(AFTER_CLOOPS, "After CountedLoop") \
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flags(PHASEIDEAL_BEFORE_EA, "PhaseIdealLoop before EA") \
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flags(AFTER_EA, "After Escape Analysis") \
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flags(ITER_GVN_AFTER_EA, "Iter GVN after EA") \
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flags(ITER_GVN_AFTER_ELIMINATION, "Iter GVN after eliminating allocations and locks") \
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flags(PHASEIDEALLOOP1, "PhaseIdealLoop 1") \
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flags(PHASEIDEALLOOP2, "PhaseIdealLoop 2") \
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flags(PHASEIDEALLOOP3, "PhaseIdealLoop 3") \
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flags(CCP1, "PhaseCCP 1") \
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flags(ITER_GVN2, "Iter GVN 2") \
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flags(PHASEIDEALLOOP_ITERATIONS, "PhaseIdealLoop iterations") \
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flags(MACRO_EXPANSION, "Macro expand") \
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flags(BARRIER_EXPANSION, "Barrier expand") \
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flags(OPTIMIZE_FINISHED, "Optimize finished") \
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flags(BEFORE_MATCHING, "Before matching") \
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flags(MATCHING, "After matching") \
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flags(GLOBAL_CODE_MOTION, "Global code motion") \
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flags(MACH_ANALYSIS, "After mach analysis") \
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flags(FINAL_CODE, "Final Code") \
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flags(END, "End") \
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flags(FAILURE, "Failure") \
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flags(ALL, "All") \
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flags(DEBUG, "Debug")
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flags(BEFORE_STRINGOPTS, "Before StringOpts") \
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flags(AFTER_STRINGOPTS, "After StringOpts") \
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flags(BEFORE_REMOVEUSELESS, "Before RemoveUseless") \
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flags(AFTER_PARSING, "After Parsing") \
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flags(BEFORE_ITER_GVN, "Before Iter GVN") \
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flags(ITER_GVN1, "Iter GVN 1") \
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flags(AFTER_ITER_GVN_STEP, "After Iter GVN Step") \
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flags(AFTER_ITER_GVN, "After Iter GVN") \
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flags(INCREMENTAL_INLINE_STEP, "Incremental Inline Step") \
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flags(INCREMENTAL_INLINE_CLEANUP, "Incremental Inline Cleanup") \
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flags(INCREMENTAL_INLINE, "Incremental Inline") \
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flags(INCREMENTAL_BOXING_INLINE, "Incremental Boxing Inline") \
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flags(EXPAND_VUNBOX, "Expand VectorUnbox") \
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flags(SCALARIZE_VBOX, "Scalarize VectorBox") \
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flags(INLINE_VECTOR_REBOX, "Inline Vector Rebox Calls") \
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flags(EXPAND_VBOX, "Expand VectorBox") \
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flags(ELIMINATE_VBOX_ALLOC, "Eliminate VectorBoxAllocate") \
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flags(ITER_GVN_BEFORE_EA, "Iter GVN before EA") \
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flags(ITER_GVN_AFTER_VECTOR, "Iter GVN after vector box elimination") \
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flags(BEFORE_BEAUTIFY_LOOPS, "Before beautify loops") \
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flags(AFTER_BEAUTIFY_LOOPS, "After beautify loops") \
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flags(BEFORE_LOOP_UNROLLING, "Before Loop Unrolling") \
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flags(AFTER_LOOP_UNROLLING, "After Loop Unrolling") \
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flags(BEFORE_SPLIT_IF, "Before Split-If") \
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flags(AFTER_SPLIT_IF, "After Split-If") \
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flags(BEFORE_LOOP_PREDICATION_IC, "Before Loop Predication IC") \
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flags(AFTER_LOOP_PREDICATION_IC, "After Loop Predication IC") \
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flags(BEFORE_LOOP_PREDICATION_RC, "Before Loop Predication RC") \
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flags(AFTER_LOOP_PREDICATION_RC, "After Loop Predication RC") \
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flags(BEFORE_PARTIAL_PEELING, "Before Partial Peeling") \
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flags(AFTER_PARTIAL_PEELING, "After Partial Peeling") \
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flags(BEFORE_LOOP_PEELING, "Before Loop Peeling") \
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flags(AFTER_LOOP_PEELING, "After Loop Peeling") \
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flags(BEFORE_LOOP_UNSWITCHING, "Before Loop Unswitching") \
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flags(AFTER_LOOP_UNSWITCHING, "After Loop Unswitching") \
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flags(BEFORE_RANGE_CHECK_ELIMINATION, "Before Range Check Elimination") \
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flags(AFTER_RANGE_CHECK_ELIMINATION, "After Range Check Elimination") \
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flags(BEFORE_PRE_MAIN_POST, "Before Pre/Main/Post Loops") \
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flags(AFTER_PRE_MAIN_POST, "After Pre/Main/Post Loops") \
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flags(SUPERWORD1_BEFORE_SCHEDULE, "Superword 1, Before Schedule") \
|
||||
flags(SUPERWORD2_BEFORE_OUTPUT, "Superword 2, Before Output") \
|
||||
flags(SUPERWORD3_AFTER_OUTPUT, "Superword 3, After Output") \
|
||||
flags(BEFORE_CLOOPS, "Before CountedLoop") \
|
||||
flags(AFTER_CLOOPS, "After CountedLoop") \
|
||||
flags(PHASEIDEAL_BEFORE_EA, "PhaseIdealLoop before EA") \
|
||||
flags(AFTER_EA, "After Escape Analysis") \
|
||||
flags(ITER_GVN_AFTER_EA, "Iter GVN after EA") \
|
||||
flags(ITER_GVN_AFTER_ELIMINATION, "Iter GVN after eliminating allocations and locks") \
|
||||
flags(PHASEIDEALLOOP1, "PhaseIdealLoop 1") \
|
||||
flags(PHASEIDEALLOOP2, "PhaseIdealLoop 2") \
|
||||
flags(PHASEIDEALLOOP3, "PhaseIdealLoop 3") \
|
||||
flags(BEFORE_CCP1, "Before PhaseCCP 1") \
|
||||
flags(CCP1, "PhaseCCP 1") \
|
||||
flags(ITER_GVN2, "Iter GVN 2") \
|
||||
flags(PHASEIDEALLOOP_ITERATIONS, "PhaseIdealLoop iterations") \
|
||||
flags(MACRO_EXPANSION, "Macro expand") \
|
||||
flags(BARRIER_EXPANSION, "Barrier expand") \
|
||||
flags(OPTIMIZE_FINISHED, "Optimize finished") \
|
||||
flags(BEFORE_MATCHING, "Before matching") \
|
||||
flags(MATCHING, "After matching") \
|
||||
flags(GLOBAL_CODE_MOTION, "Global code motion") \
|
||||
flags(REGISTER_ALLOCATION, "Register Allocation") \
|
||||
flags(BLOCK_ORDERING, "Block Ordering") \
|
||||
flags(PEEPHOLE, "Peephole") \
|
||||
flags(POSTALLOC_EXPAND, "Post-Allocation Expand") \
|
||||
flags(MACH_ANALYSIS, "After mach analysis") \
|
||||
flags(FINAL_CODE, "Final Code") \
|
||||
flags(END, "End") \
|
||||
flags(FAILURE, "Failure") \
|
||||
flags(ALL, "All") \
|
||||
flags(DEBUG, "Debug")
|
||||
|
||||
#define table_entry(name, description) PHASE_##name,
|
||||
enum CompilerPhaseType {
|
||||
|
@ -591,12 +591,6 @@ void PhaseIdealLoop::handle_use( Node *use, Node *def, small_cache *cache, Node
|
||||
// Found an If getting its condition-code input from a Phi in the same block.
|
||||
// Split thru the Region.
|
||||
void PhaseIdealLoop::do_split_if(Node* iff, RegionNode** new_false_region, RegionNode** new_true_region) {
|
||||
if (PrintOpto && VerifyLoopOptimizations) {
|
||||
tty->print_cr("Split-if");
|
||||
}
|
||||
if (TraceLoopOpts) {
|
||||
tty->print_cr("SplitIf");
|
||||
}
|
||||
|
||||
C->set_major_progress();
|
||||
RegionNode *region = iff->in(0)->as_Region();
|
||||
|
@ -2381,6 +2381,9 @@ void SuperWord::schedule() {
|
||||
}
|
||||
#endif
|
||||
|
||||
CountedLoopNode* cl = lpt()->_head->as_CountedLoop();
|
||||
_phase->C->print_method(PHASE_SUPERWORD1_BEFORE_SCHEDULE, 4, cl);
|
||||
|
||||
// (4) Use the memops_schedule to re-order the memops in all slices.
|
||||
schedule_reorder_memops(memops_schedule);
|
||||
}
|
||||
@ -2488,6 +2491,7 @@ bool SuperWord::output() {
|
||||
lpt()->dump_head();
|
||||
}
|
||||
#endif
|
||||
_phase->C->print_method(PHASE_SUPERWORD2_BEFORE_OUTPUT, 4, cl);
|
||||
|
||||
// Ensure main loop's initial value is properly aligned
|
||||
// (iv_initial_value + min_iv_offset) % vector_width_in_bytes() == 0
|
||||
@ -2808,6 +2812,8 @@ bool SuperWord::output() {
|
||||
}
|
||||
}
|
||||
|
||||
_phase->C->print_method(PHASE_SUPERWORD3_AFTER_OUTPUT, 4, cl);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
|
@ -28,10 +28,11 @@ Ideal graphs are dumped at the following points:
|
||||
* `N=0`: no output (default)
|
||||
* `N=1`: after parsing, before matching, and final code (also for failed
|
||||
compilations, if available)
|
||||
* `N=2`: additionally, after every major phase (including loop opts)
|
||||
* `N=2`: additionally, after every major phase
|
||||
* `N=3`: additionally, after every minor phase
|
||||
* `N=4`: additionally, after every effective IGVN step (slow)
|
||||
* `N=5`: additionally, after parsing every bytecode (very slow)
|
||||
* `N=4`: additionally, after every loop optimization
|
||||
* `N=5`: additionally, after every effective IGVN step (slow)
|
||||
* `N=6`: additionally, after parsing every bytecode (very slow)
|
||||
|
||||
By default the JVM expects that it will connect to a visualizer on the local
|
||||
host on port 4444. This can be configured using the options
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2022, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2022, 2023, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -60,6 +60,27 @@ public enum CompilePhase {
|
||||
ITER_GVN_AFTER_VECTOR("Iter GVN after vector box elimination"),
|
||||
BEFORE_BEAUTIFY_LOOPS("Before beautify loops"),
|
||||
AFTER_BEAUTIFY_LOOPS("After beautify loops"),
|
||||
BEFORE_LOOP_UNROLLING("Before Loop Unrolling"),
|
||||
AFTER_LOOP_UNROLLING("After Loop Unrolling"),
|
||||
BEFORE_SPLIT_IF("Before Split-If"),
|
||||
AFTER_SPLIT_IF("After Split-If"),
|
||||
BEFORE_LOOP_PREDICATION_IC("Before Loop Predication IC"),
|
||||
AFTER_LOOP_PREDICATION_IC("After Loop Predication IC"),
|
||||
BEFORE_LOOP_PREDICATION_RC("Before Loop Predication RC"),
|
||||
AFTER_LOOP_PREDICATION_RC("After Loop Predication RC"),
|
||||
BEFORE_PARTIAL_PEELING("Before Partial Peeling"),
|
||||
AFTER_PARTIAL_PEELING("After Partial Peeling"),
|
||||
BEFORE_LOOP_PEELING("Before Loop Peeling"),
|
||||
AFTER_LOOP_PEELING("After Loop Peeling"),
|
||||
BEFORE_LOOP_UNSWITCHING("Before Loop Unswitching"),
|
||||
AFTER_LOOP_UNSWITCHING("After Loop Unswitching"),
|
||||
BEFORE_RANGE_CHECK_ELIMINATION("Before Range Check Elimination"),
|
||||
AFTER_RANGE_CHECK_ELIMINATION("After Range Check Elimination"),
|
||||
BEFORE_PRE_MAIN_POST("Before Pre/Main/Post Loops"),
|
||||
AFTER_PRE_MAIN_POST("After Pre/Main/Post Loops"),
|
||||
SUPERWORD1_BEFORE_SCHEDULE("Superword 1, Before Schedule"),
|
||||
SUPERWORD2_BEFORE_OUTPUT("Superword 2, Before Output"),
|
||||
SUPERWORD3_AFTER_OUTPUT("Superword 3, After Output"),
|
||||
// Match on very first BEFORE_CLOOPS phase (there could be multiple phases for multiple loops in the code).
|
||||
BEFORE_CLOOPS("Before CountedLoop", RegexType.IDEAL_INDEPENDENT, ActionOnRepeat.KEEP_FIRST),
|
||||
AFTER_CLOOPS("After CountedLoop"),
|
||||
@ -70,6 +91,7 @@ public enum CompilePhase {
|
||||
PHASEIDEALLOOP1("PhaseIdealLoop 1"),
|
||||
PHASEIDEALLOOP2("PhaseIdealLoop 2"),
|
||||
PHASEIDEALLOOP3("PhaseIdealLoop 3"),
|
||||
BEFORE_CCP1("Before PhaseCCP 1"),
|
||||
CCP1("PhaseCCP 1"),
|
||||
ITER_GVN2("Iter GVN 2"),
|
||||
PHASEIDEALLOOP_ITERATIONS("PhaseIdealLoop iterations"),
|
||||
@ -79,8 +101,12 @@ public enum CompilePhase {
|
||||
PRINT_IDEAL("PrintIdeal"),
|
||||
BEFORE_MATCHING("Before matching"),
|
||||
MATCHING("After matching", RegexType.MACH),
|
||||
MACH_ANALYSIS("After mach analysis", RegexType.MACH),
|
||||
GLOBAL_CODE_MOTION("Global code motion", RegexType.MACH),
|
||||
REGISTER_ALLOCATION("Register Allocation", RegexType.MACH),
|
||||
BLOCK_ORDERING("Block Ordering", RegexType.MACH),
|
||||
PEEPHOLE("Peephole", RegexType.MACH),
|
||||
POSTALLOC_EXPAND("Post-Allocation Expand", RegexType.MACH),
|
||||
MACH_ANALYSIS("After mach analysis", RegexType.MACH),
|
||||
FINAL_CODE("Final Code", RegexType.MACH),
|
||||
END("End"),
|
||||
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2013, 2022, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2013, 2023, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -78,7 +78,7 @@ public class TestCompilerPhase {
|
||||
System.out.println("Event:" + event);
|
||||
Events.assertField(event, "phase").notEmpty();
|
||||
Events.assertField(event, "compileId").atLeast(0);
|
||||
Events.assertField(event, "phaseLevel").atLeast((short)0).atMost((short)4);
|
||||
Events.assertField(event, "phaseLevel").atLeast((short)0).atMost((short)5);
|
||||
Events.assertEventThread(event);
|
||||
}
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user