8209691: Allow MemBar on single memory slice

Reviewed-by: kvn, vlivanov
This commit is contained in:
Roland Westrelin 2018-08-22 10:29:17 +02:00
parent d91630f948
commit 7135605c6f
8 changed files with 31 additions and 26 deletions

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@ -641,22 +641,6 @@ bool InstructForm::needs_anti_dependence_check(FormDict &globals) const {
}
bool InstructForm::is_wide_memory_kill(FormDict &globals) const {
if( _matrule == NULL ) return false;
if( !_matrule->_opType ) return false;
if( strcmp(_matrule->_opType,"MemBarRelease") == 0 ) return true;
if( strcmp(_matrule->_opType,"MemBarAcquire") == 0 ) return true;
if( strcmp(_matrule->_opType,"MemBarReleaseLock") == 0 ) return true;
if( strcmp(_matrule->_opType,"MemBarAcquireLock") == 0 ) return true;
if( strcmp(_matrule->_opType,"MemBarStoreStore") == 0 ) return true;
if( strcmp(_matrule->_opType,"MemBarVolatile") == 0 ) return true;
if( strcmp(_matrule->_opType,"StoreFence") == 0 ) return true;
if( strcmp(_matrule->_opType,"LoadFence") == 0 ) return true;
return false;
}
int InstructForm::memory_operand(FormDict &globals) const {
// Machine independent loads must be checked for anti-dependences
// Check if instruction has a USE of a memory operand class, or a def.
@ -1171,6 +1155,9 @@ const char *InstructForm::mach_base_class(FormDict &globals) const {
else if (is_ideal_nop()) {
return "MachNopNode";
}
else if( is_ideal_membar()) {
return "MachMemBarNode";
}
else if (is_ideal_jump()) {
return "MachJumpNode";
}
@ -4116,7 +4103,8 @@ bool MatchRule::is_ideal_membar() const {
!strcmp(_opType,"StoreFence") ||
!strcmp(_opType,"MemBarVolatile") ||
!strcmp(_opType,"MemBarCPUOrder") ||
!strcmp(_opType,"MemBarStoreStore");
!strcmp(_opType,"MemBarStoreStore") ||
!strcmp(_opType,"OnSpinWait");
}
bool MatchRule::is_ideal_loadPC() const {

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@ -191,7 +191,6 @@ public:
// loads from memory, so must check for anti-dependence
virtual bool needs_anti_dependence_check(FormDict &globals) const;
virtual int memory_operand(FormDict &globals) const;
bool is_wide_memory_kill(FormDict &globals) const;
enum memory_operand_type {
NO_MEMORY_OPERAND = -1,

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@ -3263,10 +3263,6 @@ void ArchDesc::defineClasses(FILE *fp) {
// Analyze machine instructions that either USE or DEF memory.
int memory_operand = instr->memory_operand(_globalNames);
// Some guys kill all of memory
if ( instr->is_wide_memory_kill(_globalNames) ) {
memory_operand = InstructForm::MANY_MEMORY_OPERANDS;
}
if ( memory_operand != InstructForm::NO_MEMORY_OPERAND ) {
if( memory_operand == InstructForm::MANY_MEMORY_OPERANDS ) {

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@ -2002,10 +2002,6 @@ void ArchDesc::declareClasses(FILE *fp) {
// Analyze machine instructions that either USE or DEF memory.
int memory_operand = instr->memory_operand(_globalNames);
// Some guys kill all of memory
if ( instr->is_wide_memory_kill(_globalNames) ) {
memory_operand = InstructForm::MANY_MEMORY_OPERANDS;
}
if ( memory_operand != InstructForm::NO_MEMORY_OPERAND ) {
if( memory_operand == InstructForm::MANY_MEMORY_OPERANDS ) {
fprintf(fp," virtual const TypePtr *adr_type() const;\n");

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@ -811,6 +811,13 @@ JVMState *MachHaltNode::jvms() const {
return &jvms_for_throw;
}
uint MachMemBarNode::size_of() const { return sizeof(*this); }
const TypePtr *MachMemBarNode::adr_type() const {
return _adr_type;
}
//=============================================================================
#ifndef PRODUCT
void labelOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {

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@ -1000,6 +1000,19 @@ public:
virtual JVMState* jvms() const;
};
class MachMemBarNode : public MachNode {
virtual uint size_of() const; // Size is bigger
public:
const TypePtr* _adr_type; // memory effects
MachMemBarNode() : MachNode() {
init_class_id(Class_MachMemBar);
_adr_type = TypePtr::BOTTOM; // the default: all of memory
}
void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
virtual const TypePtr *adr_type() const;
};
//------------------------------MachTempNode-----------------------------------
// Node used by the adlc to construct inputs to represent temporary registers

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@ -1002,6 +1002,9 @@ Node *Matcher::xform( Node *n, int max_stack ) {
m = n->is_SafePoint() ? match_sfpt(n->as_SafePoint()):match_tree(n);
if (C->failing()) return NULL;
if (m == NULL) { Matcher::soft_match_failure(); return NULL; }
if (n->is_MemBar()) {
m->as_MachMemBar()->set_adr_type(n->adr_type());
}
} else { // Nothing the matcher cares about
if (n->is_Proj() && n->in(0) != NULL && n->in(0)->is_Multi()) { // Projections?
// Convert to machine-dependent projection

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@ -107,6 +107,7 @@ class MachSafePointNode;
class MachSpillCopyNode;
class MachTempNode;
class MachMergeNode;
class MachMemBarNode;
class Matcher;
class MemBarNode;
class MemBarStoreStoreNode;
@ -659,6 +660,7 @@ public:
DEFINE_CLASS_ID(MachConstant, Mach, 5)
DEFINE_CLASS_ID(MachJump, MachConstant, 0)
DEFINE_CLASS_ID(MachMerge, Mach, 6)
DEFINE_CLASS_ID(MachMemBar, Mach, 7)
DEFINE_CLASS_ID(Type, Node, 2)
DEFINE_CLASS_ID(Phi, Type, 0)
@ -852,6 +854,7 @@ public:
DEFINE_CLASS_QUERY(MachSafePoint)
DEFINE_CLASS_QUERY(MachSpillCopy)
DEFINE_CLASS_QUERY(MachTemp)
DEFINE_CLASS_QUERY(MachMemBar)
DEFINE_CLASS_QUERY(MachMerge)
DEFINE_CLASS_QUERY(Mem)
DEFINE_CLASS_QUERY(MemBar)