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8293351: Add second tmp register to aarch64 BarrierSetAssembler::load_at

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Reviewed-by: aph, tschatzl, fyang
This commit is contained in:
Axel Boldt-Christmas 2022-09-13 11:21:47 +00:00 committed by Stefan Karlsson
parent 37234c856d
commit 725f41ffd4
14 changed files with 102 additions and 97 deletions

53
src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp

@ -99,7 +99,8 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
Register obj,
Register pre_val,
Register thread,
Register tmp,
Register tmp1,
Register tmp2,
bool tosca_live,
bool expand_call) {
// If expand_call is true then we expand the call_VM_leaf macro
@ -111,8 +112,8 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
Label done;
Label runtime;
assert_different_registers(obj, pre_val, tmp, rscratch1);
assert(pre_val != noreg && tmp != noreg, "expecting a register");
assert_different_registers(obj, pre_val, tmp1, tmp2);
assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
Address index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()));
@ -120,12 +121,12 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
// Is marking active?
if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
__ ldrw(tmp, in_progress);
__ ldrw(tmp1, in_progress);
} else {
assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
__ ldrb(tmp, in_progress);
__ ldrb(tmp1, in_progress);
}
__ cbzw(tmp, done);
__ cbzw(tmp1, done);
// Do we need to load the previous value?
if (obj != noreg) {
@ -139,17 +140,17 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
// Is index == 0?
// (The index field is typed as size_t.)
__ ldr(tmp, index); // tmp := *index_adr
__ cbz(tmp, runtime); // tmp == 0?
__ ldr(tmp1, index); // tmp := *index_adr
__ cbz(tmp1, runtime); // tmp == 0?
// If yes, goto runtime
__ sub(tmp, tmp, wordSize); // tmp := tmp - wordSize
__ str(tmp, index); // *index_adr := tmp
__ ldr(rscratch1, buffer);
__ add(tmp, tmp, rscratch1); // tmp := tmp + *buffer_adr
__ sub(tmp1, tmp1, wordSize); // tmp := tmp - wordSize
__ str(tmp1, index); // *index_adr := tmp
__ ldr(tmp2, buffer);
__ add(tmp1, tmp1, tmp2); // tmp := tmp + *buffer_adr
// Record the previous value
__ str(pre_val, Address(tmp, 0));
__ str(pre_val, Address(tmp1, 0));
__ b(done);
__ bind(runtime);
@ -185,12 +186,12 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
Register store_addr,
Register new_val,
Register thread,
Register tmp,
Register tmp1,
Register tmp2) {
assert(thread == rthread, "must be");
assert_different_registers(store_addr, new_val, thread, tmp, tmp2,
assert_different_registers(store_addr, new_val, thread, tmp1, tmp2,
rscratch1);
assert(store_addr != noreg && new_val != noreg && tmp != noreg
assert(store_addr != noreg && new_val != noreg && tmp1 != noreg
&& tmp2 != noreg, "expecting a register");
Address queue_index(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset()));
@ -205,9 +206,9 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
// Does store cross heap regions?
__ eor(tmp, store_addr, new_val);
__ lsr(tmp, tmp, HeapRegion::LogOfHRGrainBytes);
__ cbz(tmp, done);
__ eor(tmp1, store_addr, new_val);
__ lsr(tmp1, tmp1, HeapRegion::LogOfHRGrainBytes);
__ cbz(tmp1, done);
// crosses regions, storing NULL?
@ -215,7 +216,7 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
// storing region crossing non-NULL, is card already dirty?
const Register card_addr = tmp;
const Register card_addr = tmp1;
__ lsr(card_addr, store_addr, CardTable::card_shift());
@ -258,12 +259,12 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
}
void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
Register dst, Address src, Register tmp1, Register tmp_thread) {
Register dst, Address src, Register tmp1, Register tmp2) {
bool on_oop = is_reference_type(type);
bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
bool on_reference = on_weak || on_phantom;
ModRefBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread);
ModRefBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
if (on_oop && on_reference) {
// LR is live. It must be saved around calls.
__ enter(/*strip_ret_addr*/true); // barrier may call runtime
@ -273,7 +274,8 @@ void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorator
noreg /* obj */,
dst /* pre_val */,
rthread /* thread */,
tmp1 /* tmp */,
tmp1 /* tmp1 */,
tmp2 /* tmp2 */,
true /* tosca_live */,
true /* expand_call */);
__ leave();
@ -295,7 +297,8 @@ void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet deco
tmp3 /* obj */,
tmp2 /* pre_val */,
rthread /* thread */,
tmp1 /* tmp */,
tmp1 /* tmp1 */,
rscratch2 /* tmp2 */,
val != noreg /* tosca_live */,
false /* expand_call */);
@ -313,7 +316,7 @@ void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet deco
tmp3 /* store_adr */,
new_val /* new_val */,
rthread /* thread */,
tmp1 /* tmp */,
tmp1 /* tmp1 */,
tmp2 /* tmp2 */);
}

7
src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.hpp

@ -45,7 +45,8 @@ protected:
Register obj,
Register pre_val,
Register thread,
Register tmp,
Register tmp1,
Register tmp2,
bool tosca_live,
bool expand_call);
@ -53,7 +54,7 @@ protected:
Register store_addr,
Register new_val,
Register thread,
Register tmp,
Register tmp1,
Register tmp2);
virtual void oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
@ -69,7 +70,7 @@ public:
#endif
void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
Register dst, Address src, Register tmp1, Register tmp_thread);
Register dst, Address src, Register tmp1, Register tmp2);
};
#endif // CPU_AARCH64_GC_G1_G1BARRIERSETASSEMBLER_AARCH64_HPP

9
src/hotspot/cpu/aarch64/gc/shared/barrierSetAssembler_aarch64.cpp

@ -39,7 +39,7 @@
#define __ masm->
void BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
Register dst, Address src, Register tmp1, Register tmp_thread) {
Register dst, Address src, Register tmp1, Register tmp2) {
// LR is live. It must be saved around calls.
@ -285,13 +285,12 @@ void BarrierSetAssembler::c2i_entry_barrier(MacroAssembler* masm) {
__ cbnz(rscratch2, method_live);
// Is it a weak but alive CLD?
__ stp(r10, r11, Address(__ pre(sp, -2 * wordSize)));
__ push(RegSet::of(r10), sp);
__ ldr(r10, Address(rscratch1, ClassLoaderData::holder_offset()));
// Uses rscratch1 & rscratch2, so we must pass new temporaries.
__ resolve_weak_handle(r10, r11);
__ resolve_weak_handle(r10, rscratch1, rscratch2);
__ mov(rscratch1, r10);
__ ldp(r10, r11, Address(__ post(sp, 2 * wordSize)));
__ pop(RegSet::of(r10), sp);
__ cbnz(rscratch1, method_live);
__ bind(bad_call);

2
src/hotspot/cpu/aarch64/gc/shared/barrierSetAssembler_aarch64.hpp

@ -49,7 +49,7 @@ public:
virtual void arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
Register start, Register end, Register tmp, RegSet saved_regs) {}
virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
Register dst, Address src, Register tmp1, Register tmp_thread);
Register dst, Address src, Register tmp1, Register tmp2);
virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
Address dst, Register val, Register tmp1, Register tmp2, Register tmp3);

42
src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.cpp

@ -85,7 +85,7 @@ void ShenandoahBarrierSetAssembler::shenandoah_write_barrier_pre(MacroAssembler*
bool tosca_live,
bool expand_call) {
if (ShenandoahSATBBarrier) {
satb_write_barrier_pre(masm, obj, pre_val, thread, tmp, tosca_live, expand_call);
satb_write_barrier_pre(masm, obj, pre_val, thread, tmp, rscratch1, tosca_live, expand_call);
}
}
@ -93,7 +93,8 @@ void ShenandoahBarrierSetAssembler::satb_write_barrier_pre(MacroAssembler* masm,
Register obj,
Register pre_val,
Register thread,
Register tmp,
Register tmp1,
Register tmp2,
bool tosca_live,
bool expand_call) {
// If expand_call is true then we expand the call_VM_leaf macro
@ -105,8 +106,8 @@ void ShenandoahBarrierSetAssembler::satb_write_barrier_pre(MacroAssembler* masm,
Label done;
Label runtime;
assert_different_registers(obj, pre_val, tmp, rscratch1);
assert(pre_val != noreg && tmp != noreg, "expecting a register");
assert_different_registers(obj, pre_val, tmp1, tmp2);
assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
Address in_progress(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_active_offset()));
Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
@ -114,12 +115,12 @@ void ShenandoahBarrierSetAssembler::satb_write_barrier_pre(MacroAssembler* masm,
// Is marking active?
if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
__ ldrw(tmp, in_progress);
__ ldrw(tmp1, in_progress);
} else {
assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
__ ldrb(tmp, in_progress);
__ ldrb(tmp1, in_progress);
}
__ cbzw(tmp, done);
__ cbzw(tmp1, done);
// Do we need to load the previous value?
if (obj != noreg) {
@ -133,17 +134,17 @@ void ShenandoahBarrierSetAssembler::satb_write_barrier_pre(MacroAssembler* masm,
// Is index == 0?
// (The index field is typed as size_t.)
__ ldr(tmp, index); // tmp := *index_adr
__ cbz(tmp, runtime); // tmp == 0?
__ ldr(tmp1, index); // tmp := *index_adr
__ cbz(tmp1, runtime); // tmp == 0?
// If yes, goto runtime
__ sub(tmp, tmp, wordSize); // tmp := tmp - wordSize
__ str(tmp, index); // *index_adr := tmp
__ ldr(rscratch1, buffer);
__ add(tmp, tmp, rscratch1); // tmp := tmp + *buffer_adr
__ sub(tmp1, tmp1, wordSize); // tmp := tmp - wordSize
__ str(tmp1, index); // *index_adr := tmp
__ ldr(tmp2, buffer);
__ add(tmp1, tmp1, tmp2); // tmp := tmp + *buffer_adr
// Record the previous value
__ str(pre_val, Address(tmp, 0));
__ str(pre_val, Address(tmp1, 0));
__ b(done);
__ bind(runtime);
@ -307,7 +308,7 @@ void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm,
void ShenandoahBarrierSetAssembler::iu_barrier(MacroAssembler* masm, Register dst, Register tmp) {
if (ShenandoahIUBarrier) {
__ push_call_clobbered_registers();
satb_write_barrier_pre(masm, noreg, dst, rthread, tmp, true, false);
satb_write_barrier_pre(masm, noreg, dst, rthread, tmp, rscratch1, true, false);
__ pop_call_clobbered_registers();
}
}
@ -328,10 +329,10 @@ void ShenandoahBarrierSetAssembler::iu_barrier(MacroAssembler* masm, Register ds
// dst: rscratch1 (might use rscratch1 as temporary output register to avoid clobbering src)
//
void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
Register dst, Address src, Register tmp1, Register tmp_thread) {
Register dst, Address src, Register tmp1, Register tmp2) {
// 1: non-reference load, no additional barrier is needed
if (!is_reference_type(type)) {
BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread);
BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
return;
}
@ -345,7 +346,7 @@ void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet d
}
assert_different_registers(dst, src.base(), src.index());
BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread);
BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
load_reference_barrier(masm, dst, src, decorators);
@ -354,7 +355,7 @@ void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet d
dst = result_dst;
}
} else {
BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread);
BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
}
// 3: apply keep-alive barrier if needed
@ -365,7 +366,8 @@ void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet d
noreg /* obj */,
dst /* pre_val */,
rthread /* thread */,
tmp1 /* tmp */,
tmp1 /* tmp1 */,
tmp2 /* tmp2 */,
true /* tosca_live */,
true /* expand_call */);
__ pop_call_clobbered_registers();

5
src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.hpp

@ -43,7 +43,8 @@ private:
Register obj,
Register pre_val,
Register thread,
Register tmp,
Register tmp1,
Register tmp2,
bool tosca_live,
bool expand_call);
void shenandoah_write_barrier_pre(MacroAssembler* masm,
@ -74,7 +75,7 @@ public:
virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
Register src, Register dst, Register count, RegSet saved_regs);
virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
Register dst, Address src, Register tmp1, Register tmp_thread);
Register dst, Address src, Register tmp1, Register tmp2);
virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
Address dst, Register val, Register tmp1, Register tmp2, Register tmp3);
virtual void try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,

2
src/hotspot/cpu/aarch64/interp_masm_aarch64.cpp

@ -278,7 +278,7 @@ void InterpreterMacroAssembler::load_resolved_reference_at_index(
// load pointer for resolved_references[] objArray
ldr(result, Address(result, ConstantPool::cache_offset_in_bytes()));
ldr(result, Address(result, ConstantPoolCache::resolved_references_offset_in_bytes()));
resolve_oop_handle(result, tmp);
resolve_oop_handle(result, tmp, rscratch2);
// Add in the index
add(index, index, arrayOopDesc::base_offset_in_bytes(T_OBJECT) >> LogBytesPerHeapOop);
load_heap_oop(result, Address(result, index, Address::uxtw(LogBytesPerHeapOop)));

37
src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp

@ -2479,7 +2479,7 @@ void MacroAssembler::verify_heapbase(const char* msg) {
}
#endif
void MacroAssembler::resolve_jobject(Register value, Register thread, Register tmp) {
void MacroAssembler::resolve_jobject(Register value, Register tmp1, Register tmp2) {
Label done, not_weak;
cbz(value, done); // Use NULL as-is.
@ -2488,13 +2488,13 @@ void MacroAssembler::resolve_jobject(Register value, Register thread, Register t
// Resolve jweak.
access_load_at(T_OBJECT, IN_NATIVE | ON_PHANTOM_OOP_REF, value,
Address(value, -JNIHandles::weak_tag_value), tmp, thread);
Address(value, -JNIHandles::weak_tag_value), tmp1, tmp2);
verify_oop(value);
b(done);
bind(not_weak);
// Resolve (untagged) jobject.
access_load_at(T_OBJECT, IN_NATIVE, value, Address(value, 0), tmp, thread);
access_load_at(T_OBJECT, IN_NATIVE, value, Address(value, 0), tmp1, tmp2);
verify_oop(value);
bind(done);
}
@ -4056,34 +4056,33 @@ void MacroAssembler::load_klass(Register dst, Register src) {
}
// ((OopHandle)result).resolve();
void MacroAssembler::resolve_oop_handle(Register result, Register tmp) {
void MacroAssembler::resolve_oop_handle(Register result, Register tmp1, Register tmp2) {
// OopHandle::resolve is an indirection.
access_load_at(T_OBJECT, IN_NATIVE, result, Address(result, 0), tmp, noreg);
access_load_at(T_OBJECT, IN_NATIVE, result, Address(result, 0), tmp1, tmp2);
}
// ((WeakHandle)result).resolve();
void MacroAssembler::resolve_weak_handle(Register rresult, Register rtmp) {
assert_different_registers(rresult, rtmp);
void MacroAssembler::resolve_weak_handle(Register result, Register tmp1, Register tmp2) {
assert_different_registers(result, tmp1, tmp2);
Label resolved;
// A null weak handle resolves to null.
cbz(rresult, resolved);
cbz(result, resolved);
// Only 64 bit platforms support GCs that require a tmp register
// Only IN_HEAP loads require a thread_tmp register
// WeakHandle::resolve is an indirection like jweak.
access_load_at(T_OBJECT, IN_NATIVE | ON_PHANTOM_OOP_REF,
rresult, Address(rresult), rtmp, /*tmp_thread*/noreg);
result, Address(result), tmp1, tmp2);
bind(resolved);
}
void MacroAssembler::load_mirror(Register dst, Register method, Register tmp) {
void MacroAssembler::load_mirror(Register dst, Register method, Register tmp1, Register tmp2) {
const int mirror_offset = in_bytes(Klass::java_mirror_offset());
ldr(dst, Address(rmethod, Method::const_offset()));
ldr(dst, Address(dst, ConstMethod::constants_offset()));
ldr(dst, Address(dst, ConstantPool::pool_holder_offset_in_bytes()));
ldr(dst, Address(dst, mirror_offset));
resolve_oop_handle(dst, tmp);
resolve_oop_handle(dst, tmp1, tmp2);
}
void MacroAssembler::cmp_klass(Register oop, Register trial_klass, Register tmp) {
@ -4405,14 +4404,14 @@ void MacroAssembler::set_narrow_klass(Register dst, Klass* k) {
void MacroAssembler::access_load_at(BasicType type, DecoratorSet decorators,
Register dst, Address src,
Register tmp1, Register thread_tmp) {
Register tmp1, Register tmp2) {
BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
decorators = AccessInternal::decorator_fixup(decorators);
bool as_raw = (decorators & AS_RAW) != 0;
if (as_raw) {
bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, thread_tmp);
bs->BarrierSetAssembler::load_at(this, decorators, type, dst, src, tmp1, tmp2);
} else {
bs->load_at(this, decorators, type, dst, src, tmp1, thread_tmp);
bs->load_at(this, decorators, type, dst, src, tmp1, tmp2);
}
}
@ -4430,13 +4429,13 @@ void MacroAssembler::access_store_at(BasicType type, DecoratorSet decorators,
}
void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1,
Register thread_tmp, DecoratorSet decorators) {
access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, thread_tmp);
Register tmp2, DecoratorSet decorators) {
access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, tmp2);
}
void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1,
Register thread_tmp, DecoratorSet decorators) {
access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, thread_tmp);
Register tmp2, DecoratorSet decorators) {
access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, tmp2);
}
void MacroAssembler::store_heap_oop(Address dst, Register src, Register tmp1,

14
src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp

@ -830,7 +830,7 @@ public:
void store_check(Register obj); // store check for obj - register is destroyed afterwards
void store_check(Register obj, Address dst); // same as above, dst is exact store location (reg. is destroyed)
void resolve_jobject(Register value, Register thread, Register tmp);
void resolve_jobject(Register value, Register tmp1, Register tmp2);
// C 'boolean' to Java boolean: x == 0 ? 0 : 1
void c2bool(Register x);
@ -843,21 +843,21 @@ public:
void store_klass(Register dst, Register src);
void cmp_klass(Register oop, Register trial_klass, Register tmp);
void resolve_weak_handle(Register result, Register tmp);
void resolve_oop_handle(Register result, Register tmp = r5);
void load_mirror(Register dst, Register method, Register tmp = r5);
void resolve_weak_handle(Register result, Register tmp1, Register tmp2);
void resolve_oop_handle(Register result, Register tmp1, Register tmp2);
void load_mirror(Register dst, Register method, Register tmp1, Register tmp2);
void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
Register tmp1, Register tmp_thread);
Register tmp1, Register tmp2);
void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register src,
Register tmp1, Register tmp2, Register tmp3);
void load_heap_oop(Register dst, Address src, Register tmp1 = noreg,
Register thread_tmp = noreg, DecoratorSet decorators = 0);
Register tmp2 = noreg, DecoratorSet decorators = 0);
void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg,
Register thread_tmp = noreg, DecoratorSet decorators = 0);
Register tmp2 = noreg, DecoratorSet decorators = 0);
void store_heap_oop(Address dst, Register src, Register tmp1 = noreg,
Register tmp2 = noreg, Register tmp3 = noreg, DecoratorSet decorators = 0);

2
src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp

@ -1887,7 +1887,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
// Unbox oop result, e.g. JNIHandles::resolve result.
if (is_reference_type(ret_type)) {
__ resolve_jobject(r0, rthread, rscratch2);
__ resolve_jobject(r0, r1, r2);
}
if (CheckJNICalls) {

6
src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp

@ -6778,13 +6778,13 @@ class StubGenerator: public StubCodeGenerator {
}
// The handle is dereferenced through a load barrier.
static void jfr_epilogue(MacroAssembler* _masm, Register thread) {
static void jfr_epilogue(MacroAssembler* _masm) {
__ reset_last_Java_frame(true);
Label null_jobject;
__ cbz(r0, null_jobject);
DecoratorSet decorators = ACCESS_READ | IN_NATIVE;
BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
bs->load_at(_masm, decorators, T_OBJECT, r0, Address(r0, 0), c_rarg0, thread);
bs->load_at(_masm, decorators, T_OBJECT, r0, Address(r0, 0), rscratch1, rscratch2);
__ bind(null_jobject);
}
@ -6813,7 +6813,7 @@ class StubGenerator: public StubCodeGenerator {
address the_pc = __ pc();
jfr_prologue(the_pc, _masm, rthread);
__ call_VM_leaf(CAST_FROM_FN_PTR(address, JfrIntrinsicSupport::write_checkpoint), 1);
jfr_epilogue(_masm, rthread);
jfr_epilogue(_masm);
__ leave();
__ ret(lr);

10
src/hotspot/cpu/aarch64/templateInterpreterGenerator_aarch64.cpp

@ -749,7 +749,7 @@ void TemplateInterpreterGenerator::lock_method() {
// get receiver (assume this is frequent case)
__ ldr(r0, Address(rlocals, Interpreter::local_offset_in_bytes(0)));
__ br(Assembler::EQ, done);
__ load_mirror(r0, rmethod);
__ load_mirror(r0, rmethod, r5, rscratch2);
#ifdef ASSERT
{
@ -825,7 +825,7 @@ void TemplateInterpreterGenerator::generate_fixed_frame(bool native_call) {
__ stp(zr, r19_sender_sp, Address(sp, 8 * wordSize));
// Get mirror
__ load_mirror(r10, rmethod);
__ load_mirror(r10, rmethod, r5, rscratch2);
if (! native_call) {
__ ldr(rscratch1, Address(rmethod, Method::const_offset()));
__ ldrh(rscratch1, Address(rscratch1, ConstMethod::max_stack_offset()));
@ -895,7 +895,7 @@ address TemplateInterpreterGenerator::generate_Reference_get_entry(void) {
// Load the value of the referent field.
const Address field_address(local_0, referent_offset);
BarrierSetAssembler *bs = BarrierSet::barrier_set()->barrier_set_assembler();
bs->load_at(_masm, IN_HEAP | ON_WEAK_OOP_REF, T_OBJECT, local_0, field_address, /*tmp1*/ rscratch2, /*tmp2*/ rscratch1);
bs->load_at(_masm, IN_HEAP | ON_WEAK_OOP_REF, T_OBJECT, local_0, field_address, /*tmp1*/ rscratch1, /*tmp2*/ rscratch2);
// areturn
__ andr(sp, r19_sender_sp, -16); // done with stack
@ -1267,7 +1267,7 @@ address TemplateInterpreterGenerator::generate_native_entry(bool synchronized) {
__ ldrw(t, Address(rmethod, Method::access_flags_offset()));
__ tbz(t, exact_log2(JVM_ACC_STATIC), L);
// get mirror
__ load_mirror(t, rmethod);
__ load_mirror(t, rmethod, r10, rscratch2);
// copy mirror into activation frame
__ str(t, Address(rfp, frame::interpreter_frame_oop_temp_offset * wordSize));
// pass handle to mirror
@ -1405,7 +1405,7 @@ address TemplateInterpreterGenerator::generate_native_entry(bool synchronized) {
__ br(Assembler::NE, no_oop);
// Unbox oop result, e.g. JNIHandles::resolve result.
__ pop(ltos);
__ resolve_jobject(r0, rthread, t);
__ resolve_jobject(r0, t, rscratch2);
__ str(r0, Address(rfp, frame::interpreter_frame_oop_temp_offset*wordSize));
// keep stack depth as expected by pushing oop which will eventually be discarded
__ push(ltos);

8
src/hotspot/cpu/aarch64/templateTable_aarch64.cpp

@ -146,14 +146,14 @@ static void do_oop_store(InterpreterMacroAssembler* _masm,
Register val,
DecoratorSet decorators) {
assert(val == noreg || val == r0, "parameter is just for looks");
__ store_heap_oop(dst, val, r10, r1, r3, decorators);
__ store_heap_oop(dst, val, r10, r11, r3, decorators);
}
static void do_oop_load(InterpreterMacroAssembler* _masm,
Address src,
Register dst,
DecoratorSet decorators) {
__ load_heap_oop(dst, src, r10, r1, decorators);
__ load_heap_oop(dst, src, r10, r11, decorators);
}
Address TemplateTable::at_bcp(int offset) {
@ -411,7 +411,7 @@ void TemplateTable::fast_aldc(bool wide)
// Stash null_sentinel address to get its value later
__ movptr(rarg, (uintptr_t)Universe::the_null_sentinel_addr());
__ ldr(tmp, Address(rarg));
__ resolve_oop_handle(tmp);
__ resolve_oop_handle(tmp, r5, rscratch2);
__ cmpoop(result, tmp);
__ br(Assembler::NE, notNull);
__ mov(result, 0); // NULL object reference
@ -2316,7 +2316,7 @@ void TemplateTable::load_field_cp_cache_entry(Register obj,
ConstantPoolCacheEntry::f1_offset())));
const int mirror_offset = in_bytes(Klass::java_mirror_offset());
__ ldr(obj, Address(obj, mirror_offset));
__ resolve_oop_handle(obj);
__ resolve_oop_handle(obj, r5, rscratch2);
}
}

2
src/hotspot/cpu/aarch64/upcallLinker_aarch64.cpp

@ -225,7 +225,7 @@ address UpcallLinker::make_upcall_stub(jobject receiver, Method* entry,
__ block_comment("{ receiver ");
__ movptr(shuffle_reg, (intptr_t)receiver);
__ resolve_jobject(shuffle_reg, rthread, rscratch2);
__ resolve_jobject(shuffle_reg, rscratch1, rscratch2);
__ mov(j_rarg0, shuffle_reg);
__ block_comment("} receiver ");