8234610: MaxVectorSize set wrongly when UseAVX=3 is specified after JDK-8221092
Reviewed-by: kvn, vlivanov
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b7251c4eb4
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@ -367,26 +367,29 @@ class VM_Version_StubGenerator: public StubCodeGenerator {
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//
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intx saved_useavx = UseAVX;
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intx saved_usesse = UseSSE;
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// check _cpuid_info.sef_cpuid7_ebx.bits.avx512f
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__ lea(rsi, Address(rbp, in_bytes(VM_Version::sef_cpuid7_offset())));
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__ movl(rax, 0x10000);
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__ andl(rax, Address(rsi, 4)); // xcr0 bits sse | ymm
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__ cmpl(rax, 0x10000);
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__ jccb(Assembler::notEqual, legacy_setup); // jump if EVEX is not supported
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// check _cpuid_info.xem_xcr0_eax.bits.opmask
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// check _cpuid_info.xem_xcr0_eax.bits.zmm512
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// check _cpuid_info.xem_xcr0_eax.bits.zmm32
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__ movl(rax, 0xE0);
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__ andl(rax, Address(rbp, in_bytes(VM_Version::xem_xcr0_offset()))); // xcr0 bits sse | ymm
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__ cmpl(rax, 0xE0);
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__ jccb(Assembler::notEqual, legacy_setup); // jump if EVEX is not supported
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__ lea(rsi, Address(rbp, in_bytes(VM_Version::std_cpuid1_offset())));
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__ movl(rax, Address(rsi, 0));
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__ cmpl(rax, 0x50654); // If it is Skylake
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__ jcc(Assembler::equal, legacy_setup);
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// If UseAVX is unitialized or is set by the user to include EVEX
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if (use_evex) {
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// check _cpuid_info.sef_cpuid7_ebx.bits.avx512f
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__ lea(rsi, Address(rbp, in_bytes(VM_Version::sef_cpuid7_offset())));
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__ movl(rax, 0x10000);
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__ andl(rax, Address(rsi, 4)); // xcr0 bits sse | ymm
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__ cmpl(rax, 0x10000);
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__ jccb(Assembler::notEqual, legacy_setup); // jump if EVEX is not supported
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// check _cpuid_info.xem_xcr0_eax.bits.opmask
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// check _cpuid_info.xem_xcr0_eax.bits.zmm512
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// check _cpuid_info.xem_xcr0_eax.bits.zmm32
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__ movl(rax, 0xE0);
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__ andl(rax, Address(rbp, in_bytes(VM_Version::xem_xcr0_offset()))); // xcr0 bits sse | ymm
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__ cmpl(rax, 0xE0);
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__ jccb(Assembler::notEqual, legacy_setup); // jump if EVEX is not supported
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if (FLAG_IS_DEFAULT(UseAVX)) {
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__ lea(rsi, Address(rbp, in_bytes(VM_Version::std_cpuid1_offset())));
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__ movl(rax, Address(rsi, 0));
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__ cmpl(rax, 0x50654); // If it is Skylake
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__ jcc(Assembler::equal, legacy_setup);
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}
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// EVEX setup: run in lowest evex mode
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VM_Version::set_evex_cpuFeatures(); // Enable temporary to pass asserts
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UseAVX = 3;
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@ -455,27 +458,28 @@ class VM_Version_StubGenerator: public StubCodeGenerator {
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VM_Version::set_cpuinfo_cont_addr(__ pc());
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// Returns here after signal. Save xmm0 to check it later.
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// check _cpuid_info.sef_cpuid7_ebx.bits.avx512f
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__ lea(rsi, Address(rbp, in_bytes(VM_Version::sef_cpuid7_offset())));
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__ movl(rax, 0x10000);
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__ andl(rax, Address(rsi, 4));
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__ cmpl(rax, 0x10000);
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__ jcc(Assembler::notEqual, legacy_save_restore);
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// check _cpuid_info.xem_xcr0_eax.bits.opmask
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// check _cpuid_info.xem_xcr0_eax.bits.zmm512
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// check _cpuid_info.xem_xcr0_eax.bits.zmm32
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__ movl(rax, 0xE0);
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__ andl(rax, Address(rbp, in_bytes(VM_Version::xem_xcr0_offset()))); // xcr0 bits sse | ymm
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__ cmpl(rax, 0xE0);
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__ jcc(Assembler::notEqual, legacy_save_restore);
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__ lea(rsi, Address(rbp, in_bytes(VM_Version::std_cpuid1_offset())));
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__ movl(rax, Address(rsi, 0));
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__ cmpl(rax, 0x50654); // If it is Skylake
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__ jcc(Assembler::equal, legacy_save_restore);
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// If UseAVX is unitialized or is set by the user to include EVEX
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if (use_evex) {
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// check _cpuid_info.sef_cpuid7_ebx.bits.avx512f
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__ lea(rsi, Address(rbp, in_bytes(VM_Version::sef_cpuid7_offset())));
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__ movl(rax, 0x10000);
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__ andl(rax, Address(rsi, 4));
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__ cmpl(rax, 0x10000);
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__ jcc(Assembler::notEqual, legacy_save_restore);
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// check _cpuid_info.xem_xcr0_eax.bits.opmask
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// check _cpuid_info.xem_xcr0_eax.bits.zmm512
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// check _cpuid_info.xem_xcr0_eax.bits.zmm32
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__ movl(rax, 0xE0);
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__ andl(rax, Address(rbp, in_bytes(VM_Version::xem_xcr0_offset()))); // xcr0 bits sse | ymm
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__ cmpl(rax, 0xE0);
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__ jcc(Assembler::notEqual, legacy_save_restore);
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if (FLAG_IS_DEFAULT(UseAVX)) {
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__ lea(rsi, Address(rbp, in_bytes(VM_Version::std_cpuid1_offset())));
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__ movl(rax, Address(rsi, 0));
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__ cmpl(rax, 0x50654); // If it is Skylake
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__ jcc(Assembler::equal, legacy_save_restore);
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}
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// EVEX check: run in lowest evex mode
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VM_Version::set_evex_cpuFeatures(); // Enable temporary to pass asserts
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UseAVX = 3;
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