8331126: [s390x] secondary_super_cache does not scale well
Reviewed-by: lucy, aph, mdoerr
This commit is contained in:
Amit Kumar
parent
156f0b4332
commit
7ac531181c
@ -1,6 +1,7 @@
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/*
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* Copyright (c) 2016, 2024, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016, 2024 SAP SE. All rights reserved.
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* Copyright 2024 IBM Corporation. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -3152,6 +3153,301 @@ void MacroAssembler::check_klass_subtype(Register sub_klass,
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BLOCK_COMMENT("} check_klass_subtype");
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}
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// scans r_count pointer sized words at [r_addr] for occurrence of r_value,
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// generic (r_count must be >0)
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// iff found: CC eq, r_result == 0
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void MacroAssembler::repne_scan(Register r_addr, Register r_value, Register r_count, Register r_result) {
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NearLabel L_loop, L_exit;
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BLOCK_COMMENT("repne_scan {");
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#ifdef ASSERT
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z_chi(r_count, 0);
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asm_assert(bcondHigh, "count must be positive", 11);
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#endif
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clear_reg(r_result, true /* whole_reg */, false /* set_cc */); // sets r_result=0, let's hope that search will be successful
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bind(L_loop);
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z_cg(r_value, Address(r_addr));
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z_bre(L_exit); // branch on success
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z_la(r_addr, wordSize, r_addr);
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z_brct(r_count, L_loop);
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// z_brct above doesn't change CC.
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// If we reach here, then the value in r_value is not present. Set r_result to 1.
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z_lghi(r_result, 1);
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bind(L_exit);
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BLOCK_COMMENT("} repne_scan");
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}
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// Ensure that the inline code and the stub are using the same registers.
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#define LOOKUP_SECONDARY_SUPERS_TABLE_REGISTERS \
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do { \
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assert(r_super_klass == Z_ARG1 && \
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r_array_base == Z_ARG5 && \
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r_array_length == Z_ARG4 && \
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(r_array_index == Z_ARG3 || r_array_index == noreg) && \
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(r_sub_klass == Z_ARG2 || r_sub_klass == noreg) && \
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(r_bitmap == Z_R10 || r_bitmap == noreg) && \
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(r_result == Z_R11 || r_result == noreg), "registers must match s390.ad"); \
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} while(0)
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// Note: this method also kills Z_R1_scratch register on machines older than z15
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void MacroAssembler::lookup_secondary_supers_table(Register r_sub_klass,
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Register r_super_klass,
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Register r_temp1,
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Register r_temp2,
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Register r_temp3,
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Register r_temp4,
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Register r_result,
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u1 super_klass_slot) {
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NearLabel L_done, L_failure;
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BLOCK_COMMENT("lookup_secondary_supers_table {");
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const Register
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r_array_base = r_temp1,
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r_array_length = r_temp2,
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r_array_index = r_temp3,
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r_bitmap = r_temp4;
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LOOKUP_SECONDARY_SUPERS_TABLE_REGISTERS;
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z_lg(r_bitmap, Address(r_sub_klass, Klass::bitmap_offset()));
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// First check the bitmap to see if super_klass might be present. If
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// the bit is zero, we are certain that super_klass is not one of
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// the secondary supers.
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u1 bit = super_klass_slot;
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int shift_count = Klass::SECONDARY_SUPERS_TABLE_MASK - bit;
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z_sllg(r_array_index, r_bitmap, shift_count); // take the bit to 63rd location
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// Initialize r_result with 0 (indicating success). If searching fails, r_result will be loaded
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// with 1 (failure) at the end of this method.
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clear_reg(r_result, true /* whole_reg */, false /* set_cc */); // r_result = 0
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// We test the MSB of r_array_index, i.e., its sign bit
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testbit(r_array_index, 63);
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z_bfalse(L_failure); // if not set, then jump!!!
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// We will consult the secondary-super array.
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z_lg(r_array_base, Address(r_sub_klass, Klass::secondary_supers_offset()));
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// The value i in r_array_index is >= 1, so even though r_array_base
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// points to the length, we don't need to adjust it to point to the
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// data.
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assert(Array<Klass*>::base_offset_in_bytes() == wordSize, "Adjust this code");
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// Get the first array index that can contain super_klass.
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if (bit != 0) {
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pop_count_long(r_array_index, r_array_index, Z_R1_scratch); // kills Z_R1_scratch on machines older than z15
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// NB! r_array_index is off by 1. It is compensated by keeping r_array_base off by 1 word.
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z_sllg(r_array_index, r_array_index, LogBytesPerWord); // scale
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} else {
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// Actually use index 0, but r_array_base and r_array_index are off by 1 word
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// such that the sum is precise.
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z_lghi(r_array_index, BytesPerWord); // for slow path (scaled)
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}
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z_cg(r_super_klass, Address(r_array_base, r_array_index));
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branch_optimized(bcondEqual, L_done); // found a match; success
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// Is there another entry to check? Consult the bitmap.
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testbit(r_bitmap, (bit + 1) & Klass::SECONDARY_SUPERS_TABLE_MASK);
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z_bfalse(L_failure);
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// Linear probe. Rotate the bitmap so that the next bit to test is
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// in Bit 2 for the look-ahead check in the slow path.
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if (bit != 0) {
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z_rllg(r_bitmap, r_bitmap, 64-bit); // rotate right
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}
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// Calls into the stub generated by lookup_secondary_supers_table_slow_path.
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// Arguments: r_super_klass, r_array_base, r_array_index, r_bitmap.
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// Kills: r_array_length.
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// Returns: r_result
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call_stub(StubRoutines::lookup_secondary_supers_table_slow_path_stub());
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z_bru(L_done); // pass whatever result we got from a slow path
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bind(L_failure);
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// TODO: use load immediate on condition and z_bru above will not be required
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z_lghi(r_result, 1);
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bind(L_done);
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BLOCK_COMMENT("} lookup_secondary_supers_table");
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if (VerifySecondarySupers) {
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verify_secondary_supers_table(r_sub_klass, r_super_klass, r_result,
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r_temp1, r_temp2, r_temp3);
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}
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}
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// Called by code generated by check_klass_subtype_slow_path
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// above. This is called when there is a collision in the hashed
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// lookup in the secondary supers array.
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void MacroAssembler::lookup_secondary_supers_table_slow_path(Register r_super_klass,
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Register r_array_base,
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Register r_array_index,
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Register r_bitmap,
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Register r_result,
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Register r_temp1) {
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assert_different_registers(r_super_klass, r_array_base, r_array_index, r_bitmap, r_result, r_temp1);
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const Register
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r_array_length = r_temp1,
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r_sub_klass = noreg;
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LOOKUP_SECONDARY_SUPERS_TABLE_REGISTERS;
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BLOCK_COMMENT("lookup_secondary_supers_table_slow_path {");
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NearLabel L_done, L_failure;
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// Load the array length.
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z_llgf(r_array_length, Address(r_array_base, Array<Klass*>::length_offset_in_bytes()));
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// And adjust the array base to point to the data.
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// NB!
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// Effectively increments the current slot index by 1.
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assert(Array<Klass*>::base_offset_in_bytes() == wordSize, "");
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add2reg(r_array_base, Array<Klass*>::base_offset_in_bytes());
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// Linear probe
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NearLabel L_huge;
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// The bitmap is full to bursting.
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z_cghi(r_bitmap, Klass::SECONDARY_SUPERS_BITMAP_FULL);
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z_bre(L_huge);
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// NB! Our caller has checked bits 0 and 1 in the bitmap. The
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// current slot (at secondary_supers[r_array_index]) has not yet
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// been inspected, and r_array_index may be out of bounds if we
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// wrapped around the end of the array.
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{ // This is conventional linear probing, but instead of terminating
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// when a null entry is found in the table, we maintain a bitmap
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// in which a 0 indicates missing entries.
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// The check above guarantees there are 0s in the bitmap, so the loop
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// eventually terminates.
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#ifdef ASSERT
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// r_result is set to 0 by lookup_secondary_supers_table.
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// clear_reg(r_result, true /* whole_reg */, false /* set_cc */);
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z_cghi(r_result, 0);
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asm_assert(bcondEqual, "r_result required to be 0, used by z_locgr", 44);
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// We should only reach here after having found a bit in the bitmap.
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z_ltgr(r_array_length, r_array_length);
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asm_assert(bcondHigh, "array_length > 0, should hold", 22);
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#endif // ASSERT
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// Compute limit in r_array_length
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add2reg(r_array_length, -1);
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z_sllg(r_array_length, r_array_length, LogBytesPerWord);
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NearLabel L_loop;
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bind(L_loop);
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// Check for wraparound.
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z_cgr(r_array_index, r_array_length);
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z_locgr(r_array_index, r_result, bcondHigh); // r_result is containing 0
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z_cg(r_super_klass, Address(r_array_base, r_array_index));
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z_bre(L_done); // success
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// look-ahead check: if Bit 2 is 0, we're done
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testbit(r_bitmap, 2);
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z_bfalse(L_failure);
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z_rllg(r_bitmap, r_bitmap, 64-1); // rotate right
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add2reg(r_array_index, BytesPerWord);
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z_bru(L_loop);
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}
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{ // Degenerate case: more than 64 secondary supers.
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// FIXME: We could do something smarter here, maybe a vectorized
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// comparison or a binary search, but is that worth any added
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// complexity?
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bind(L_huge);
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repne_scan(r_array_base, r_super_klass, r_array_length, r_result);
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z_bru(L_done); // forward the result we got from repne_scan
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}
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bind(L_failure);
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z_lghi(r_result, 1);
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bind(L_done);
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BLOCK_COMMENT("} lookup_secondary_supers_table_slow_path");
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}
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// Make sure that the hashed lookup and a linear scan agree.
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void MacroAssembler::verify_secondary_supers_table(Register r_sub_klass,
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Register r_super_klass,
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Register r_result /* expected */,
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Register r_temp1,
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Register r_temp2,
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Register r_temp3) {
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assert_different_registers(r_sub_klass, r_super_klass, r_result, r_temp1, r_temp2, r_temp3);
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const Register
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r_array_base = r_temp1,
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r_array_length = r_temp2,
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r_array_index = r_temp3,
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r_bitmap = noreg; // unused
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const Register r_one = Z_R0_scratch;
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z_lghi(r_one, 1); // for locgr down there, to a load result for failure
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LOOKUP_SECONDARY_SUPERS_TABLE_REGISTERS;
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BLOCK_COMMENT("verify_secondary_supers_table {");
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Label L_passed, L_failure;
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// We will consult the secondary-super array.
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z_lg(r_array_base, Address(r_sub_klass, in_bytes(Klass::secondary_supers_offset())));
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// Load the array length.
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z_llgf(r_array_length, Address(r_array_base, Array<Klass*>::length_offset_in_bytes()));
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// And adjust the array base to point to the data.
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z_aghi(r_array_base, Array<Klass*>::base_offset_in_bytes());
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const Register r_linear_result = r_array_index; // reuse
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z_chi(r_array_length, 0);
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z_locgr(r_linear_result, r_one, bcondNotHigh); // load failure if array_length <= 0
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z_brc(bcondNotHigh, L_failure);
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repne_scan(r_array_base, r_super_klass, r_array_length, r_linear_result);
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bind(L_failure);
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z_cr(r_result, r_linear_result);
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z_bre(L_passed);
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assert_different_registers(Z_ARG1, r_sub_klass, r_linear_result, r_result);
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lgr_if_needed(Z_ARG1, r_super_klass);
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assert_different_registers(Z_ARG2, r_linear_result, r_result);
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lgr_if_needed(Z_ARG2, r_sub_klass);
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assert_different_registers(Z_ARG3, r_result);
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z_lgr(Z_ARG3, r_linear_result);
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z_lgr(Z_ARG4, r_result);
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const char* msg = "mismatch";
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load_const_optimized(Z_ARG5, (address)msg);
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call_VM_leaf(CAST_FROM_FN_PTR(address, Klass::on_secondary_supers_verification_failure));
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should_not_reach_here();
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bind(L_passed);
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BLOCK_COMMENT("} verify_secondary_supers_table");
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}
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void MacroAssembler::clinit_barrier(Register klass, Register thread, Label* L_fast_path, Label* L_slow_path) {
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assert(L_fast_path != nullptr || L_slow_path != nullptr, "at least one is required");
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@ -708,6 +708,31 @@ class MacroAssembler: public Assembler {
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Label* L_success,
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Label* L_failure);
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void repne_scan(Register r_addr, Register r_value, Register r_count, Register r_scratch);
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void lookup_secondary_supers_table(Register r_sub_klass,
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Register r_super_klass,
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Register r_temp1,
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Register r_temp2,
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Register r_temp3,
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Register r_temp4,
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Register r_result,
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u1 super_klass_slot);
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void lookup_secondary_supers_table_slow_path(Register r_super_klass,
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Register r_array_base,
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Register r_array_index,
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Register r_bitmap,
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Register r_result,
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Register r_temp1);
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void verify_secondary_supers_table(Register r_sub_klass,
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Register r_super_klass,
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Register r_result /* expected */,
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Register r_temp1,
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Register r_temp2,
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Register r_temp3);
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// Simplified, combined version, good for typical uses.
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// Falls through on failure.
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void check_klass_subtype(Register sub_klass,
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@ -356,6 +356,8 @@ reg_class z_rarg3_ptr_reg(Z_R4_H,Z_R4);
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reg_class z_rarg4_ptr_reg(Z_R5_H,Z_R5);
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reg_class z_rarg5_ptr_reg(Z_R6_H,Z_R6);
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reg_class z_thread_ptr_reg(Z_R8_H,Z_R8);
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reg_class z_r10_ptr_reg(Z_R10_H, Z_R10);
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reg_class z_r11_ptr_reg(Z_R11_H, Z_R11);
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reg_class z_ptr_reg(
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/*Z_R0_H,Z_R0*/ // R0
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@ -2985,6 +2987,8 @@ operand iRegP() %{
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match(rarg5RegP);
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match(revenRegP);
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match(roddRegP);
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match(r10TempRegP);
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match(r11TempRegP);
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format %{ %}
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interface(REG_INTER);
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%}
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@ -2997,6 +3001,20 @@ operand threadRegP() %{
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interface(REG_INTER);
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%}
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operand r10TempRegP() %{
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constraint(ALLOC_IN_RC(z_r10_ptr_reg));
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match(iRegP);
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format %{ %}
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interface(REG_INTER);
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%}
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operand r11TempRegP() %{
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constraint(ALLOC_IN_RC(z_r11_ptr_reg));
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match(iRegP);
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format %{ %}
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interface(REG_INTER);
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%}
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operand noArg_iRegP() %{
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constraint(ALLOC_IN_RC(z_no_arg_ptr_reg));
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match(iRegP);
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@ -9560,6 +9578,32 @@ instruct partialSubtypeCheck(rarg1RegP index, rarg2RegP sub, rarg3RegP super, fl
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ins_pipe(pipe_class_dummy);
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%}
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instruct partialSubtypeCheckConstSuper(rarg2RegP sub, rarg1RegP super, immP super_con,
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r11TempRegP result, rarg5RegP temp1, rarg4RegP temp2,
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rarg3RegP temp3, r10TempRegP temp4, flagsReg pcc) %{
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match(Set result (PartialSubtypeCheck sub (Binary super super_con)));
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predicate(UseSecondarySupersTable);
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effect(KILL pcc, TEMP temp1, TEMP temp2, TEMP temp3, TEMP temp4);
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ins_cost(7 * DEFAULT_COST); // needs to be less than competing nodes
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format %{ "partialSubtypeCheck $result, $sub, $super, $super_con" %}
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ins_encode %{
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u1 super_klass_slot = ((Klass*)$super_con$$constant)->hash_slot();
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if (InlineSecondarySupersTest) {
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__ lookup_secondary_supers_table($sub$$Register, $super$$Register,
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$temp1$$Register, $temp2$$Register, $temp3$$Register,
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$temp4$$Register, $result$$Register, super_klass_slot);
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} else {
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AddressLiteral stub_address(StubRoutines::lookup_secondary_supers_table_stub(super_klass_slot));
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__ load_const_optimized(Z_ARG4, stub_address);
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__ z_basr(Z_R14, Z_ARG4);
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}
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%}
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ins_pipe(pipe_class_dummy);
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%}
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instruct partialSubtypeCheck_vs_zero(flagsReg pcc, rarg2RegP sub, rarg3RegP super, immP0 zero,
|
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rarg1RegP index, rarg4RegP scratch1, rarg5RegP scratch2) %{
|
||||
match(Set pcc (CmpI (PartialSubtypeCheck sub super) zero));
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* Copyright (c) 2016, 2024, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2016, 2023 SAP SE. All rights reserved.
|
||||
* Copyright (c) 2016, 2024 SAP SE. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -705,6 +705,50 @@ class StubGenerator: public StubCodeGenerator {
|
||||
return start;
|
||||
}
|
||||
|
||||
address generate_lookup_secondary_supers_table_stub(u1 super_klass_index) {
|
||||
StubCodeMark mark(this, "StubRoutines", "lookup_secondary_supers_table");
|
||||
|
||||
const Register
|
||||
r_super_klass = Z_ARG1,
|
||||
r_sub_klass = Z_ARG2,
|
||||
r_array_index = Z_ARG3,
|
||||
r_array_length = Z_ARG4,
|
||||
r_array_base = Z_ARG5,
|
||||
r_bitmap = Z_R10,
|
||||
r_result = Z_R11;
|
||||
address start = __ pc();
|
||||
|
||||
__ lookup_secondary_supers_table(r_sub_klass, r_super_klass,
|
||||
r_array_base, r_array_length, r_array_index,
|
||||
r_bitmap, r_result, super_klass_index);
|
||||
|
||||
__ z_br(Z_R14);
|
||||
|
||||
return start;
|
||||
}
|
||||
|
||||
// Slow path implementation for UseSecondarySupersTable.
|
||||
address generate_lookup_secondary_supers_table_slow_path_stub() {
|
||||
StubCodeMark mark(this, "StubRoutines", "lookup_secondary_supers_table_slow_path");
|
||||
|
||||
address start = __ pc();
|
||||
|
||||
const Register
|
||||
r_super_klass = Z_ARG1,
|
||||
r_array_base = Z_ARG5,
|
||||
r_temp1 = Z_ARG4,
|
||||
r_array_index = Z_ARG3,
|
||||
r_bitmap = Z_R10,
|
||||
r_result = Z_R11;
|
||||
|
||||
__ lookup_secondary_supers_table_slow_path(r_super_klass, r_array_base,
|
||||
r_array_index, r_bitmap, r_result, r_temp1);
|
||||
|
||||
__ z_br(Z_R14);
|
||||
|
||||
return start;
|
||||
}
|
||||
|
||||
#if !defined(PRODUCT)
|
||||
// Wrapper which calls oopDesc::is_oop_or_null()
|
||||
// Only called by MacroAssembler::verify_oop
|
||||
@ -3247,6 +3291,14 @@ class StubGenerator: public StubCodeGenerator {
|
||||
StubRoutines::_montgomerySquare
|
||||
= CAST_FROM_FN_PTR(address, SharedRuntime::montgomery_square);
|
||||
}
|
||||
if (UseSecondarySupersTable) {
|
||||
StubRoutines::_lookup_secondary_supers_table_slow_path_stub = generate_lookup_secondary_supers_table_slow_path_stub();
|
||||
if (!InlineSecondarySupersTest) {
|
||||
for (int slot = 0; slot < Klass::SECONDARY_SUPERS_TABLE_SIZE; slot++) {
|
||||
StubRoutines::_lookup_secondary_supers_table_stubs[slot] = generate_lookup_secondary_supers_table_stub(slot);
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
#endif // COMPILER2_OR_JVMCI
|
||||
}
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* Copyright (c) 2016, 2023, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2016, 2023 SAP SE. All rights reserved.
|
||||
* Copyright (c) 2016, 2024, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2016, 2024 SAP SE. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -272,6 +272,13 @@ void VM_Version::initialize() {
|
||||
FLAG_SET_DEFAULT(UseSHA, false);
|
||||
}
|
||||
|
||||
if (UseSecondarySupersTable && VM_Version::get_model_index() < 5 /* z196/z11 */) {
|
||||
if (!FLAG_IS_DEFAULT(UseSecondarySupersTable)) {
|
||||
warning("UseSecondarySupersTable requires z196 or later.");
|
||||
}
|
||||
FLAG_SET_DEFAULT(UseSecondarySupersTable, false);
|
||||
}
|
||||
|
||||
#ifdef COMPILER2
|
||||
if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
|
||||
FLAG_SET_DEFAULT(UseMultiplyToLenIntrinsic, true);
|
||||
|
||||
@ -413,6 +413,8 @@ class VM_Version: public Abstract_VM_Version {
|
||||
// s390 supports fast class initialization checks
|
||||
static bool supports_fast_class_init_checks() { return true; }
|
||||
|
||||
constexpr static bool supports_secondary_supers_table() { return true; }
|
||||
|
||||
constexpr static bool supports_recursive_lightweight_locking() { return true; }
|
||||
|
||||
// CPU feature query functions
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user