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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -49,11 +49,11 @@ class ResourceArea: public Arena {
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debug_only(static int _warned;) // to suppress multiple warnings
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public:
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ResourceArea() : Arena(mtThread) {
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ResourceArea(MEMFLAGS flags = mtThread) : Arena(flags) {
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debug_only(_nesting = 0;)
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}
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ResourceArea(size_t init_size) : Arena(mtThread, init_size) {
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ResourceArea(size_t init_size, MEMFLAGS flags = mtThread) : Arena(flags, init_size) {
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debug_only(_nesting = 0;);
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}
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@ -348,8 +348,8 @@ void PhaseChaitin::Register_Allocate() {
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_alternate = 0;
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_matcher._allocation_started = true;
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ResourceArea split_arena; // Arena for Split local resources
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ResourceArea live_arena; // Arena for liveness & IFG info
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ResourceArea split_arena(mtCompiler); // Arena for Split local resources
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ResourceArea live_arena(mtCompiler); // Arena for liveness & IFG info
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ResourceMark rm(&live_arena);
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// Need live-ness for the IFG; need the IFG for coalescing. If the
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@ -1424,7 +1424,7 @@ void PhaseCFG::global_code_motion() {
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// Enabling the scheduler for register pressure plus finding blocks of size to schedule for it
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// is key to enabling this feature.
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PhaseChaitin regalloc(C->unique(), *this, _matcher, true);
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ResourceArea live_arena; // Arena for liveness
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ResourceArea live_arena(mtCompiler); // Arena for liveness
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ResourceMark rm_live(&live_arena);
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PhaseLive live(*this, regalloc._lrg_map.names(), &live_arena, true);
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PhaseIFG ifg(&live_arena);
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@ -69,7 +69,7 @@ Matcher::Matcher()
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_register_save_type(register_save_type),
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_ruleName(ruleName),
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_allocation_started(false),
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_states_arena(Chunk::medium_size),
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_states_arena(Chunk::medium_size, mtCompiler),
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_visited(&_states_arena),
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_shared(&_states_arena),
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_dontcare(&_states_arena) {
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