8319705: RISC-V: signumF/D intrinsics fails compiler/intrinsics/math/TestSignumIntrinsic.java
Reviewed-by: fyang, vkempik
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f939542104
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@ -1658,25 +1658,20 @@ void C2_MacroAssembler::round_double_mode(FloatRegister dst, FloatRegister src,
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// otherwise return +/- 1.0 using sign of input.
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// otherwise return +/- 1.0 using sign of input.
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// one - gives us a floating-point 1.0 (got from matching rule)
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// one - gives us a floating-point 1.0 (got from matching rule)
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// bool is_double - specifies single or double precision operations will be used.
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// bool is_double - specifies single or double precision operations will be used.
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void C2_MacroAssembler::signum_fp(FloatRegister dst, FloatRegister src, FloatRegister one, bool is_double) {
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void C2_MacroAssembler::signum_fp(FloatRegister dst, FloatRegister one, bool is_double) {
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Register tmp1 = t0;
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Label done;
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Label done;
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is_double ? fclass_d(tmp1, src)
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is_double ? fclass_d(t0, dst)
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: fclass_s(tmp1, src);
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: fclass_s(t0, dst);
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is_double ? fmv_d(dst, src)
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: fmv_s(dst, src);
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// check if input is -0, +0, signaling NaN or quiet NaN
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// check if input is -0, +0, signaling NaN or quiet NaN
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andi(tmp1, tmp1, fclass_mask::zero | fclass_mask::nan);
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andi(t0, t0, fclass_mask::zero | fclass_mask::nan);
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bnez(tmp1, done);
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bnez(t0, done);
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// use floating-point 1.0 with a sign of input
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// use floating-point 1.0 with a sign of input
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is_double ? fsgnj_d(dst, one, src)
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is_double ? fsgnj_d(dst, one, dst)
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: fsgnj_s(dst, one, src);
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: fsgnj_s(dst, one, dst);
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bind(done);
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bind(done);
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}
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}
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@ -157,8 +157,7 @@
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void round_double_mode(FloatRegister dst, FloatRegister src, int round_mode,
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void round_double_mode(FloatRegister dst, FloatRegister src, int round_mode,
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Register tmp1, Register tmp2, Register tmp3);
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Register tmp1, Register tmp2, Register tmp3);
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void signum_fp(FloatRegister dst, FloatRegister src, FloatRegister one,
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void signum_fp(FloatRegister dst, FloatRegister one, bool is_double);
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bool is_double);
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// intrinsic methods implemented by rvv instructions
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// intrinsic methods implemented by rvv instructions
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void string_equals_v(Register r1, Register r2,
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void string_equals_v(Register r1, Register r2,
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@ -7601,22 +7601,20 @@ instruct copySignF_reg(fRegF dst, fRegF src1, fRegF src2) %{
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ins_pipe(fp_dop_reg_reg_s);
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ins_pipe(fp_dop_reg_reg_s);
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%}
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%}
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instruct signumD_reg(fRegD dst, fRegD src, immD zero, fRegD one) %{
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instruct signumD_reg(fRegD dst, immD zero, fRegD one) %{
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match(Set dst (SignumD src (Binary zero one)));
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match(Set dst (SignumD dst (Binary zero one)));
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format %{ "signumD $dst, $src" %}
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format %{ "signumD $dst, $dst" %}
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ins_encode %{
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ins_encode %{
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__ signum_fp(as_FloatRegister($dst$$reg), as_FloatRegister($src$$reg),
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__ signum_fp(as_FloatRegister($dst$$reg), as_FloatRegister($one$$reg), true /* is_double */);
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as_FloatRegister($one$$reg), true /* is_double */);
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%}
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%}
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ins_pipe(pipe_class_default);
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ins_pipe(pipe_class_default);
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%}
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%}
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instruct signumF_reg(fRegF dst, fRegF src, immF zero, fRegF one) %{
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instruct signumF_reg(fRegF dst, immF zero, fRegF one) %{
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match(Set dst (SignumF src (Binary zero one)));
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match(Set dst (SignumF dst (Binary zero one)));
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format %{ "signumF $dst, $src" %}
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format %{ "signumF $dst, $dst" %}
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ins_encode %{
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ins_encode %{
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__ signum_fp(as_FloatRegister($dst$$reg), as_FloatRegister($src$$reg),
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__ signum_fp(as_FloatRegister($dst$$reg), as_FloatRegister($one$$reg), false /* is_double */);
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as_FloatRegister($one$$reg), false /* is_double */);
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%}
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%}
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ins_pipe(pipe_class_default);
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ins_pipe(pipe_class_default);
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%}
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%}
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@ -35,6 +35,10 @@
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* -XX:+IgnoreUnrecognizedVMOptions -XX:+UnlockDiagnosticVMOptions
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* -XX:+IgnoreUnrecognizedVMOptions -XX:+UnlockDiagnosticVMOptions
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* -XX:-UseSignumIntrinsic -XX:+UseCopySignIntrinsic
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* -XX:-UseSignumIntrinsic -XX:+UseCopySignIntrinsic
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* compiler.intrinsics.math.TestSignumIntrinsic
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* compiler.intrinsics.math.TestSignumIntrinsic
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* @run main/othervm
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* -XX:+IgnoreUnrecognizedVMOptions -XX:+UnlockDiagnosticVMOptions
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* -Xcomp -XX:+UseSignumIntrinsic
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* compiler.intrinsics.math.TestSignumIntrinsic
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*/
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*/
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package compiler.intrinsics.math;
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package compiler.intrinsics.math;
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