8209667: Explicit barriers for C1/LIR
Reviewed-by: eosterlund, roland
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b1ce2c0fe8
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83d1dd7d9a
src/hotspot
cpu
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@ -941,6 +941,10 @@ void LIRGenerator::do_update_CRC32(Intrinsic* x) {
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index = tmp;
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}
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if (is_updateBytes) {
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base_op = access_resolve(ACCESS_READ, base_op);
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}
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if (offset) {
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LIR_Opr tmp = new_pointer_register();
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__ add(base_op, LIR_OprFact::intConst(offset), tmp);
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@ -1019,6 +1023,10 @@ void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
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index = tmp;
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}
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if (is_updateBytes) {
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base_op = access_resolve(ACCESS_READ, base_op);
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}
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if (offset) {
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LIR_Opr tmp = new_pointer_register();
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__ add(base_op, LIR_OprFact::intConst(offset), tmp);
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@ -997,6 +997,10 @@ void LIRGenerator::do_update_CRC32(Intrinsic* x) {
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}
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#endif
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if (is_updateBytes) {
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base_op = access_resolve(IS_NOT_NULL | ACCESS_READ, base_op);
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}
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LIR_Address* a = new LIR_Address(base_op,
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index,
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offset,
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@ -1054,7 +1058,7 @@ void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
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constant_aOffset = result_aOffset->as_jlong();
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result_aOffset = LIR_OprFact::illegalOpr;
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}
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LIR_Opr result_a = a.result();
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LIR_Opr result_a = access_resolve(ACCESS_READ, a.result());
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long constant_bOffset = 0;
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LIR_Opr result_bOffset = bOffset.result();
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@ -1062,7 +1066,7 @@ void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
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constant_bOffset = result_bOffset->as_jlong();
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result_bOffset = LIR_OprFact::illegalOpr;
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}
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LIR_Opr result_b = b.result();
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LIR_Opr result_b = access_resolve(ACCESS_READ, b.result());
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#ifndef _LP64
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result_a = new_register(T_INT);
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@ -1690,6 +1690,15 @@ LIR_Opr LIRGenerator::access_atomic_add_at(DecoratorSet decorators, BasicType ty
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}
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}
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LIR_Opr LIRGenerator::access_resolve(DecoratorSet decorators, LIR_Opr obj) {
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// Use stronger ACCESS_WRITE|ACCESS_READ by default.
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if ((decorators & (ACCESS_READ | ACCESS_WRITE)) == 0) {
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decorators |= ACCESS_READ | ACCESS_WRITE;
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}
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return _barrier_set->resolve(this, decorators, obj);
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}
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void LIRGenerator::do_LoadField(LoadField* x) {
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bool needs_patching = x->needs_patching();
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bool is_volatile = x->field()->is_volatile();
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@ -1767,11 +1776,12 @@ void LIRGenerator::do_NIOCheckIndex(Intrinsic* x) {
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if (GenerateRangeChecks) {
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CodeEmitInfo* info = state_for(x);
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CodeStub* stub = new RangeCheckStub(info, index.result());
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LIR_Opr buf_obj = access_resolve(IS_NOT_NULL | ACCESS_READ, buf.result());
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if (index.result()->is_constant()) {
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cmp_mem_int(lir_cond_belowEqual, buf.result(), java_nio_Buffer::limit_offset(), index.result()->as_jint(), info);
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cmp_mem_int(lir_cond_belowEqual, buf_obj, java_nio_Buffer::limit_offset(), index.result()->as_jint(), info);
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__ branch(lir_cond_belowEqual, T_INT, stub);
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} else {
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cmp_reg_mem(lir_cond_aboveEqual, index.result(), buf.result(),
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cmp_reg_mem(lir_cond_aboveEqual, index.result(), buf_obj,
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java_nio_Buffer::limit_offset(), T_INT, info);
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__ branch(lir_cond_aboveEqual, T_INT, stub);
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}
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@ -300,6 +300,8 @@ class LIRGenerator: public InstructionVisitor, public BlockClosure {
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LIR_Opr access_atomic_add_at(DecoratorSet decorators, BasicType type,
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LIRItem& base, LIRItem& offset, LIRItem& value);
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LIR_Opr access_resolve(DecoratorSet decorators, LIR_Opr obj);
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// These need to guarantee JMM volatile semantics are preserved on each platform
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// and requires one implementation per architecture.
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LIR_Opr atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value);
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@ -334,3 +334,7 @@ void BarrierSetC1::generate_referent_check(LIRAccess& access, LabelObj* cont) {
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}
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}
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}
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LIR_Opr BarrierSetC1::resolve(LIRGenerator* gen, DecoratorSet decorators, LIR_Opr obj) {
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return obj;
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}
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@ -134,6 +134,8 @@ public:
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virtual LIR_Opr atomic_xchg_at(LIRAccess& access, LIRItem& value);
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virtual LIR_Opr atomic_add_at(LIRAccess& access, LIRItem& value);
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virtual LIR_Opr resolve(LIRGenerator* gen, DecoratorSet decorators, LIR_Opr obj);
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virtual void generate_c1_runtime_stubs(BufferBlob* buffer_blob) {}
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};
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