From 870e67d5207f7bab3faebcc5a0ceb7dd475a2028 Mon Sep 17 00:00:00 2001 From: Richard Reingruber Date: Mon, 13 Jul 2020 10:33:14 +0200 Subject: [PATCH] 8247695: PPC/S390: compiler/intrinsics/math/TestFpMinMaxIntrinsics.java fails Reviewed-by: goetz, lucy --- src/hotspot/cpu/ppc/ppc.ad | 13 +++++++++++++ src/hotspot/cpu/s390/s390.ad | 13 ++++++++++++- 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/src/hotspot/cpu/ppc/ppc.ad b/src/hotspot/cpu/ppc/ppc.ad index d97449c16f6..3c6f2c789c1 100644 --- a/src/hotspot/cpu/ppc/ppc.ad +++ b/src/hotspot/cpu/ppc/ppc.ad @@ -9203,6 +9203,19 @@ instruct signmask64L_regL(iRegLdst dst, iRegLsrc src) %{ ins_pipe(pipe_class_default); %} +instruct absL_reg_Ex(iRegLdst dst, iRegLsrc src) %{ + match(Set dst (AbsL src)); + ins_cost(DEFAULT_COST*3); + + expand %{ + iRegLdst tmp1; + iRegLdst tmp2; + signmask64L_regL(tmp1, src); + xorL_reg_reg(tmp2, tmp1, src); + subL_reg_reg(dst, tmp2, tmp1); + %} +%} + // Long negation instruct negL_reg_reg(iRegLdst dst, immL_0 zero, iRegLsrc src2) %{ match(Set dst (SubL zero src2)); diff --git a/src/hotspot/cpu/s390/s390.ad b/src/hotspot/cpu/s390/s390.ad index fa4422f435e..14c15183d0d 100644 --- a/src/hotspot/cpu/s390/s390.ad +++ b/src/hotspot/cpu/s390/s390.ad @@ -1,6 +1,6 @@ // // Copyright (c) 2017, 2020, Oracle and/or its affiliates. All rights reserved. -// Copyright (c) 2017, 2019 SAP SE. All rights reserved. +// Copyright (c) 2017, 2020 SAP SE. All rights reserved. // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This code is free software; you can redistribute it and/or modify it @@ -9050,6 +9050,17 @@ instruct absI_reg(iRegI dst, iRegI src, flagsReg cr) %{ ins_pipe(pipe_class_dummy); %} +instruct absL_reg(iRegL dst, iRegL src, flagsReg cr) %{ + match(Set dst (AbsL src)); + effect(KILL cr); + ins_cost(DEFAULT_COST_LOW); + // TODO: s390 port size(FIXED_SIZE); + format %{ "LPGR $dst, $src" %} + opcode(LPGR_ZOPC); + ins_encode(z_rreform(dst, src)); + ins_pipe(pipe_class_dummy); +%} + instruct negabsI_reg(iRegI dst, iRegI src, immI_0 zero, flagsReg cr) %{ match(Set dst (SubI zero (AbsI src))); effect(KILL cr);