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8291947: riscv: fail to build after JDK-8290840

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Reviewed-by: fyang, fjiang
This commit is contained in:
Yadong Wang 2022-08-05 09:12:29 +00:00 committed by Fei Yang
parent dd7f2d912b
commit 88c96dd3eb
1 changed files with 1 additions and 20 deletions
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21
src/hotspot/cpu/riscv/icache_riscv.cpp
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@ -29,27 +29,8 @@
#define __ _masm->
// SYSCALL_RISCV_FLUSH_ICACHE is used to flush instruction cache. The "fence.i" instruction
// only work on the current hart, so kernel provides the icache flush syscall to flush icache
// on each hart. You can pass a flag to determine a global or local icache flush.
static void icache_flush(long int start, long int end)
{
const int SYSCALL_RISCV_FLUSH_ICACHE = 259;
register long int __a7 asm ("a7") = SYSCALL_RISCV_FLUSH_ICACHE;
register long int __a0 asm ("a0") = start;
register long int __a1 asm ("a1") = end;
// the flush can be applied to either all threads or only the current.
// 0 means a global icache flush, and the icache flush will be applied
// to other harts concurrently executing.
register long int __a2 asm ("a2") = 0;
__asm__ volatile ("ecall\n\t"
: "+r" (__a0)
: "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a7)
: "memory");
}
static int icache_flush(address addr, int lines, int magic) {
icache_flush((long int) addr, (long int) (addr + (lines << ICache::log2_line_size)));
__builtin___clear_cache(addr, addr + (lines << ICache::log2_line_size));
return magic;
}