8342884: RISC-V: verify float <--> float16 conversion
Reviewed-by: fyang, luhenry
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3c5db12bbe
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94317dbcf2
@ -112,11 +112,11 @@ define_pd_global(intx, InlineSmallCode, 1000);
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product(bool, UseZicbom, false, EXPERIMENTAL, "Use Zicbom instructions") \
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product(bool, UseZicbop, false, EXPERIMENTAL, "Use Zicbop instructions") \
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product(bool, UseZicboz, false, EXPERIMENTAL, "Use Zicboz instructions") \
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product(bool, UseZtso, false, EXPERIMENTAL, "Assume Ztso memory model") \
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product(bool, UseZihintpause, false, EXPERIMENTAL, \
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"Use Zihintpause instructions") \
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product(bool, UseZtso, false, EXPERIMENTAL, "Assume Ztso memory model") \
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product(bool, UseZvbb, false, EXPERIMENTAL, "Use Zvbb instructions") \
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product(bool, UseZvfh, false, EXPERIMENTAL, "Use Zvfh instructions") \
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product(bool, UseZvfh, false, "Use Zvfh instructions") \
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product(bool, UseZvkn, false, EXPERIMENTAL, \
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"Use Zvkn group extension, Zvkned, Zvknhb, Zvkb, Zvkt") \
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product(bool, UseRVVForBigIntegerShiftIntrinsics, true, \
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@ -178,6 +178,9 @@ void RiscvHwprobe::add_features_from_query_result() {
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if (is_set(RISCV_HWPROBE_KEY_IMA_EXT_0, RISCV_HWPROBE_EXT_ZFH)) {
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VM_Version::ext_Zfh.enable_feature();
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}
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if (is_set(RISCV_HWPROBE_KEY_IMA_EXT_0, RISCV_HWPROBE_EXT_ZVFH)) {
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VM_Version::ext_Zvfh.enable_feature();
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}
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if (is_valid(RISCV_HWPROBE_KEY_CPUPERF_0)) {
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VM_Version::unaligned_access.enable_feature(
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query[RISCV_HWPROBE_KEY_CPUPERF_0].value & RISCV_HWPROBE_MISALIGNED_MASK);
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