stan/jdk-24
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7085137: -XX:+VerifyOops is broken

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Replace set() with patchable_set() to generate 8 instructions always.

Reviewed-by: iveresov, never, roland
This commit is contained in:
Vladimir Kozlov 2011-08-31 09:48:21 -07:00
parent 05b60b3662
commit 9c87ea9062
2 changed files with 9 additions and 4 deletions
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12
hotspot/src/cpu/sparc/vm/assembler_sparc.cpp
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@ -1794,7 +1794,8 @@ void MacroAssembler::_verify_oop(Register reg, const char* msg, const char * fil
mov(reg,O0); // Move arg into O0; arg might be in O7 which is about to be crushed mov(reg,O0); // Move arg into O0; arg might be in O7 which is about to be crushed
stx(O7,SP,frame::register_save_words*wordSize+STACK_BIAS+7*8); stx(O7,SP,frame::register_save_words*wordSize+STACK_BIAS+7*8);
set((intptr_t)real_msg, O1); // Size of set() should stay the same
patchable_set((intptr_t)real_msg, O1);
// Load address to call to into O7 // Load address to call to into O7
load_ptr_contents(a, O7); load_ptr_contents(a, O7);
// Register call to verify_oop_subroutine // Register call to verify_oop_subroutine
@ -1831,7 +1832,8 @@ void MacroAssembler::_verify_oop_addr(Address addr, const char* msg, const char
ld_ptr(addr.base(), addr.disp() + 8*8, O0); // Load arg into O0; arg might be in O7 which is about to be crushed ld_ptr(addr.base(), addr.disp() + 8*8, O0); // Load arg into O0; arg might be in O7 which is about to be crushed
stx(O7,SP,frame::register_save_words*wordSize+STACK_BIAS+7*8); stx(O7,SP,frame::register_save_words*wordSize+STACK_BIAS+7*8);
set((intptr_t)real_msg, O1); // Size of set() should stay the same
patchable_set((intptr_t)real_msg, O1);
// Load address to call to into O7 // Load address to call to into O7
load_ptr_contents(a, O7); load_ptr_contents(a, O7);
// Register call to verify_oop_subroutine // Register call to verify_oop_subroutine
@ -1976,7 +1978,8 @@ void MacroAssembler::stop(const char* msg) {
save_frame(::round_to(sizeof(RegistersForDebugging) / BytesPerWord, 2)); save_frame(::round_to(sizeof(RegistersForDebugging) / BytesPerWord, 2));
// stop_subroutine expects message pointer in I1. // stop_subroutine expects message pointer in I1.
set((intptr_t)msg, O1); // Size of set() should stay the same
patchable_set((intptr_t)msg, O1);
// factor long stop-sequence into subroutine to save space // factor long stop-sequence into subroutine to save space
assert(StubRoutines::Sparc::stop_subroutine_entry_address(), "hasn't been generated yet"); assert(StubRoutines::Sparc::stop_subroutine_entry_address(), "hasn't been generated yet");
@ -1998,7 +2001,8 @@ void MacroAssembler::warn(const char* msg) {
save_frame(::round_to(sizeof(RegistersForDebugging) / BytesPerWord, 2)); save_frame(::round_to(sizeof(RegistersForDebugging) / BytesPerWord, 2));
RegistersForDebugging::save_registers(this); RegistersForDebugging::save_registers(this);
mov(O0, L0); mov(O0, L0);
set((intptr_t)msg, O0); // Size of set() should stay the same
patchable_set((intptr_t)msg, O0);
call( CAST_FROM_FN_PTR(address, warning) ); call( CAST_FROM_FN_PTR(address, warning) );
delayed()->nop(); delayed()->nop();
// ret(); // ret();

1
hotspot/src/cpu/sparc/vm/sparc.ad
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@ -840,6 +840,7 @@ void emit_form3_mem_reg(CodeBuffer &cbuf, const MachNode* n, int primary, int te
!(n->ideal_Opcode()==Op_ConvI2D && ld_op==Op_LoadF) && !(n->ideal_Opcode()==Op_ConvI2D && ld_op==Op_LoadF) &&
!(n->ideal_Opcode()==Op_PrefetchRead && ld_op==Op_LoadI) && !(n->ideal_Opcode()==Op_PrefetchRead && ld_op==Op_LoadI) &&
!(n->ideal_Opcode()==Op_PrefetchWrite && ld_op==Op_LoadI) && !(n->ideal_Opcode()==Op_PrefetchWrite && ld_op==Op_LoadI) &&
!(n->ideal_Opcode()==Op_PrefetchAllocation && ld_op==Op_LoadI) &&
!(n->ideal_Opcode()==Op_Load2I && ld_op==Op_LoadD) && !(n->ideal_Opcode()==Op_Load2I && ld_op==Op_LoadD) &&
!(n->ideal_Opcode()==Op_Load4C && ld_op==Op_LoadD) && !(n->ideal_Opcode()==Op_Load4C && ld_op==Op_LoadD) &&
!(n->ideal_Opcode()==Op_Load4S && ld_op==Op_LoadD) && !(n->ideal_Opcode()==Op_Load4S && ld_op==Op_LoadD) &&