8293035: Cleanup MacroAssembler::movoop code patching logic aarch64 riscv
Reviewed-by: eosterlund, fyang
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c42478b723
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9e3176bd09
@ -3368,7 +3368,7 @@ encode %{
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} else {
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relocInfo::relocType rtype = $src->constant_reloc();
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if (rtype == relocInfo::oop_type) {
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__ movoop(dst_reg, (jobject)con, /*immediate*/true);
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__ movoop(dst_reg, (jobject)con);
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} else if (rtype == relocInfo::metadata_type) {
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__ mov_metadata(dst_reg, (Metadata*)con);
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} else {
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@ -331,7 +331,7 @@ void LIR_Assembler::jobject2reg(jobject o, Register reg) {
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if (o == NULL) {
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__ mov(reg, zr);
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} else {
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__ movoop(reg, o, /*immediate*/true);
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__ movoop(reg, o);
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}
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}
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@ -72,6 +72,12 @@ public:
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virtual void nmethod_entry_barrier(MacroAssembler* masm, Label* slow_path, Label* continuation, Label* guard);
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virtual void c2i_entry_barrier(MacroAssembler* masm);
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virtual bool supports_instruction_patching() {
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NMethodPatchingType patching_type = nmethod_patching_type();
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return patching_type == NMethodPatchingType::conc_instruction_and_data_patch ||
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patching_type == NMethodPatchingType::stw_instruction_and_data_patch;
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}
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static address patching_epoch_addr();
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static void clear_patching_epoch();
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static void increment_patching_epoch();
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@ -4440,11 +4440,8 @@ Address MacroAssembler::allocate_metadata_address(Metadata* obj) {
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return Address((address)obj, rspec);
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}
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// Move an oop into a register. immediate is true if we want
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// immediate instructions and nmethod entry barriers are not enabled.
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// i.e. we are not going to patch this instruction while the code is being
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// executed by another thread.
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void MacroAssembler::movoop(Register dst, jobject obj, bool immediate) {
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// Move an oop into a register.
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void MacroAssembler::movoop(Register dst, jobject obj) {
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int oop_index;
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if (obj == NULL) {
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oop_index = oop_recorder()->allocate_oop_index(obj);
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@ -4459,15 +4456,12 @@ void MacroAssembler::movoop(Register dst, jobject obj, bool immediate) {
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}
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RelocationHolder rspec = oop_Relocation::spec(oop_index);
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// nmethod entry barrier necessitate using the constant pool. They have to be
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// ordered with respected to oop accesses.
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// Using immediate literals would necessitate ISBs.
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BarrierSet* bs = BarrierSet::barrier_set();
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if ((bs->barrier_set_nmethod() != NULL && bs->barrier_set_assembler()->nmethod_patching_type() == NMethodPatchingType::conc_data_patch) || !immediate) {
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if (BarrierSet::barrier_set()->barrier_set_assembler()->supports_instruction_patching()) {
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mov(dst, Address((address)obj, rspec));
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} else {
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address dummy = address(uintptr_t(pc()) & -wordSize); // A nearby aligned address
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ldr_constant(dst, Address(dummy, rspec));
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} else
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mov(dst, Address((address)obj, rspec));
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}
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}
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@ -1223,7 +1223,7 @@ public:
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Address allocate_metadata_address(Metadata* obj);
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Address constant_oop_address(jobject obj);
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void movoop(Register dst, jobject obj, bool immediate = false);
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void movoop(Register dst, jobject obj);
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// CRC32 code for java.util.zip.CRC32::updateBytes() intrinsic.
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void kernel_crc32(Register crc, Register buf, Register len,
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@ -1554,8 +1554,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
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// load oop into a register
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__ movoop(c_rarg1,
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JNIHandles::make_local(method->method_holder()->java_mirror()),
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/*immediate*/true);
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JNIHandles::make_local(method->method_holder()->java_mirror()));
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// Now handlize the static class mirror it's known not-null.
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__ str(c_rarg1, Address(sp, klass_offset));
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@ -291,7 +291,7 @@ void LIR_Assembler::jobject2reg(jobject o, Register reg) {
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if (o == NULL) {
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__ mv(reg, zr);
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} else {
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__ movoop(reg, o, /* immediate */ true);
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__ movoop(reg, o);
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}
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}
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@ -74,6 +74,12 @@ public:
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virtual void nmethod_entry_barrier(MacroAssembler* masm, Label* slow_path, Label* continuation, Label* guard);
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virtual void c2i_entry_barrier(MacroAssembler* masm);
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virtual bool supports_instruction_patching() {
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NMethodPatchingType patching_type = nmethod_patching_type();
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return patching_type == NMethodPatchingType::conc_instruction_and_data_patch ||
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patching_type == NMethodPatchingType::stw_instruction_and_data_patch;
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}
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static address patching_epoch_addr();
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static void clear_patching_epoch();
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static void increment_patching_epoch();
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@ -1648,11 +1648,8 @@ void MacroAssembler::cmp_klass(Register oop, Register trial_klass, Register tmp,
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beq(trial_klass, tmp, L);
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}
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// Move an oop into a register. immediate is true if we want
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// immediate instructions and nmethod entry barriers are not enabled.
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// i.e. we are not going to patch this instruction while the code is being
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// executed by another thread.
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void MacroAssembler::movoop(Register dst, jobject obj, bool immediate) {
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// Move an oop into a register.
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void MacroAssembler::movoop(Register dst, jobject obj) {
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int oop_index;
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if (obj == NULL) {
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oop_index = oop_recorder()->allocate_oop_index(obj);
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@ -1667,15 +1664,12 @@ void MacroAssembler::movoop(Register dst, jobject obj, bool immediate) {
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}
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RelocationHolder rspec = oop_Relocation::spec(oop_index);
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// nmethod entry barrier necessitate using the constant pool. They have to be
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// ordered with respected to oop access.
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// Using immediate literals would necessitate fence.i.
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BarrierSet* bs = BarrierSet::barrier_set();
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if ((bs->barrier_set_nmethod() != NULL && bs->barrier_set_assembler()->nmethod_patching_type() == NMethodPatchingType::conc_data_patch) || !immediate) {
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if (BarrierSet::barrier_set()->barrier_set_assembler()->supports_instruction_patching()) {
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mv(dst, Address((address)obj, rspec));
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} else {
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address dummy = address(uintptr_t(pc()) & -wordSize); // A nearby aligned address
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ld_constant(dst, Address(dummy, rspec));
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} else
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mv(dst, Address((address)obj, rspec));
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}
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}
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// Move a metadata address into a register.
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@ -175,7 +175,7 @@ class MacroAssembler: public Assembler {
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void resolve_oop_handle(Register result, Register tmp = x15);
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void resolve_jobject(Register value, Register thread, Register tmp);
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void movoop(Register dst, jobject obj, bool immediate = false);
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void movoop(Register dst, jobject obj);
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void mov_metadata(Register dst, Metadata* obj);
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void bang_stack_size(Register size, Register tmp);
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void set_narrow_oop(Register dst, jobject obj);
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@ -41,7 +41,7 @@ void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) {
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switch (type()) {
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case relocInfo::oop_type: {
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oop_Relocation *reloc = (oop_Relocation *)this;
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// in movoop when BarrierSet::barrier_set()->barrier_set_nmethod() != NULL || !immediate
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// in movoop when BarrierSet::barrier_set()->barrier_set_nmethod() != NULL
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if (NativeInstruction::is_load_pc_relative_at(addr())) {
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address constptr = (address)code()->oop_addr_at(reloc->oop_index());
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bytes = MacroAssembler::pd_patch_instruction_size(addr(), constptr);
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@ -2114,7 +2114,7 @@ encode %{
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} else {
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relocInfo::relocType rtype = $src->constant_reloc();
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if (rtype == relocInfo::oop_type) {
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__ movoop(dst_reg, (jobject)con, /*immediate*/true);
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__ movoop(dst_reg, (jobject)con);
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} else if (rtype == relocInfo::metadata_type) {
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__ mov_metadata(dst_reg, (Metadata*)con);
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} else {
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@ -1455,8 +1455,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
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// load oop into a register
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__ movoop(c_rarg1,
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JNIHandles::make_local(method->method_holder()->java_mirror()),
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/*immediate*/true);
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JNIHandles::make_local(method->method_holder()->java_mirror()));
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// Now handlize the static class mirror it's known not-null.
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__ sd(c_rarg1, Address(sp, klass_offset));
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