This commit is contained in:
Chris Hegarty 2013-07-15 11:04:53 +01:00
commit 9ee9b15f88
2117 changed files with 70710 additions and 34735 deletions

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@ -216,3 +216,7 @@ f09ab0c416185e3cba371e81bcb6a16060c90f44 jdk8-b90
2fd6acba737b01e705e1f7c33588c922a3787f13 jdk8-b92
b72ae39e1329fefae50d4690db4fde43f3841a95 jdk8-b93
0d804e3b955dce406af6a79ac1cc35c696aff7fb jdk8-b94
49fe9c8049132647ad38837a877dd473e6c9b0e5 jdk8-b95
ea73f01b9053e7165e7ba80f242bafecbc6af712 jdk8-b96
0a85476a0b9cb876d5666d45097dac68bef3fce1 jdk8-b97
711eb4aa87de68de78250e0549980936bab53d54 jdk8-b98

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@ -216,3 +216,7 @@ cb51fb4789ac0b8be4056482077ddfb8f3bd3805 jdk8-b91
3a36c926a7aafa9d4a892a45ef3678e87ad8359b jdk8-b92
27c51c6e31c1ef36afa0e6efb031f9b13f26c12b jdk8-b93
50d2bde060f2a9bbbe4da0c8986e20aca61f2e2e jdk8-b94
785d07fe38901ecc1b7e0145e53e1c3da9361fee jdk8-b95
c156084add486f941c12d886a0b1b2854795d557 jdk8-b96
a1c1e8bf71f354f3aec0214cf13d6668811e021d jdk8-b97
0d0c983a817bbe8518a5ff201306334a8de267f2 jdk8-b98

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@ -68,12 +68,15 @@ else
# First, find out the valid targets
# Run the makefile with an arbitraty SPEC using -p -q (quiet dry-run and dump rules) to find
# available PHONY targets. Use this list as valid targets to pass on to the repeated calls.
all_phony_targets=$(filter-out $(global_targets), $(strip $(shell \
$(MAKE) -p -q -f common/makefiles SPEC=$(firstword $(SPEC)) | \
all_phony_targets=$(filter-out $(global_targets) bundles-only, $(strip $(shell \
$(MAKE) -p -q -f common/makefiles/Main.gmk SPEC=$(firstword $(SPEC)) | \
grep ^.PHONY: | head -n 1 | cut -d " " -f 2-)))
$(all_phony_targets):
@$(foreach spec,$(SPEC),($(MAKE) -f NewMakefile.gmk SPEC=$(spec) $(VERBOSE) VERBOSE=$(VERBOSE) LOG_LEVEL=$(LOG_LEVEL) $@) &&) true
$(all_phony_targets):
$(foreach spec,$(SPEC),($(MAKE) -f NewMakefile.gmk SPEC=$(spec) \
$(VERBOSE) VERBOSE=$(VERBOSE) LOG_LEVEL=$(LOG_LEVEL) $@) &&) true
.PHONY: $(all_phony_targets)
endif
endif

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@ -355,12 +355,24 @@
</li>
<li>
Install a
<a name="bootjdk">Bootstrap JDK</a>
<br>
<a name="bootjdk">Bootstrap JDK</a>.
All OpenJDK builds require access to a previously released
JDK, this is often called a bootstrap JDK.
Currently, for this JDK release we require
JDK 7 Update 7 or newer.
JDK called the <i>bootstrap JDK</i> or <i>boot JDK.</i>
The general rule is that the bootstrap JDK
must be an instance of the previous major
release of the JDK. In addition, there may be
a requirement to use a release at or beyond a
particular update level.
<br>&nbsp;<br>
<b><i>Building JDK 8 requires use of a version
of JDK 7 that is at Update 7 or newer. JDK 8
developers should not use JDK 8 as the boot
JDK, to ensure that JDK 8 dependencies are
not introduced into the parts of the system
that are built with JDK 7.</i></b>
<br>&nbsp;<br>
The JDK 7 binaries can be downloaded from Oracle's
<a href="http://www.oracle.com/technetwork/java/javase/downloads/index.html"
target="_blank">JDK 7 download site</a>.

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@ -43,6 +43,16 @@ AC_DEFUN([ADD_JVM_ARG_IF_OK],
fi
])
# Appends a string to a path variable, only adding the : when needed.
AC_DEFUN([BASIC_APPEND_TO_PATH],
[
if test "x[$]$1" = x; then
$1="$2"
else
$1="[$]$1:$2"
fi
])
# This will make sure the given variable points to a full and proper
# path. This means:
# 1) There will be no spaces in the path. On posix platforms,
@ -351,7 +361,9 @@ fi
AC_SUBST(SYS_ROOT)
AC_ARG_WITH([tools-dir], [AS_HELP_STRING([--with-tools-dir],
[search this directory for compilers and tools (for cross-compiling)])], [TOOLS_DIR=$with_tools_dir])
[search this directory for compilers and tools (for cross-compiling)])],
[TOOLS_DIR=$with_tools_dir]
)
AC_ARG_WITH([devkit], [AS_HELP_STRING([--with-devkit],
[use this directory as base for tools-dir and sys-root (for cross-compiling)])],
@ -359,17 +371,14 @@ AC_ARG_WITH([devkit], [AS_HELP_STRING([--with-devkit],
if test "x$with_sys_root" != x; then
AC_MSG_ERROR([Cannot specify both --with-devkit and --with-sys-root at the same time])
fi
if test "x$with_tools_dir" != x; then
AC_MSG_ERROR([Cannot specify both --with-devkit and --with-tools-dir at the same time])
fi
TOOLS_DIR=$with_devkit/bin
BASIC_FIXUP_PATH([with_devkit])
BASIC_APPEND_TO_PATH([TOOLS_DIR],$with_devkit/bin)
if test -d "$with_devkit/$host_alias/libc"; then
SYS_ROOT=$with_devkit/$host_alias/libc
elif test -d "$with_devkit/$host/sys-root"; then
SYS_ROOT=$with_devkit/$host/sys-root
fi
])
])
AC_DEFUN_ONCE([BASIC_SETUP_OUTPUT_DIR],
@ -612,6 +621,14 @@ AC_PATH_PROGS(READELF, [readelf greadelf])
AC_PATH_PROG(HG, hg)
AC_PATH_PROG(STAT, stat)
AC_PATH_PROG(TIME, time)
# Check if it's GNU time
IS_GNU_TIME=`$TIME --version 2>&1 | $GREP 'GNU time'`
if test "x$IS_GNU_TIME" != x; then
IS_GNU_TIME=yes
else
IS_GNU_TIME=no
fi
AC_SUBST(IS_GNU_TIME)
if test "x$OPENJDK_TARGET_OS" = "xwindows"; then
BASIC_REQUIRE_PROG(COMM, comm)

File diff suppressed because it is too large Load Diff

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@ -510,6 +510,7 @@ TAR:=@TAR@
TAIL:=@TAIL@
TEE:=@TEE@
TIME:=@TIME@
IS_GNU_TIME:=@IS_GNU_TIME@
TR:=@TR@
TOUCH:=@TOUCH@
UNIQ:=@UNIQ@

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@ -47,7 +47,7 @@ AC_DEFUN([TOOLCHAIN_CHECK_COMPILER_VERSION],
elif test "x$OPENJDK_TARGET_OS" = xwindows; then
# First line typically looks something like:
# Microsoft (R) 32-bit C/C++ Optimizing Compiler Version 16.00.30319.01 for 80x86
COMPILER_VERSION_TEST=`$COMPILER 2>&1 | $HEAD -n 1`
COMPILER_VERSION_TEST=`$COMPILER 2>&1 | $HEAD -n 1 | $TR -d '\r'`
COMPILER_VERSION=`$ECHO $COMPILER_VERSION_TEST | $SED -n "s/^.*Version \(@<:@1-9@:>@@<:@0-9.@:>@*\) .*/\1/p"`
COMPILER_VENDOR="Microsoft CL.EXE"
COMPILER_CPU_TEST=`$ECHO $COMPILER_VERSION_TEST | $SED -n "s/^.* for \(.*\)$/\1/p"`
@ -226,15 +226,6 @@ BDEPS_CHECK_MODULE(DEVKIT, devkit, xxx,
],
[])
if test "x$SYS_ROOT" != "x/" ; then
CFLAGS="--sysroot=$SYS_ROOT $CFLAGS"
CXXFLAGS="--sysroot=$SYS_ROOT $CXXFLAGS"
OBJCFLAGS="--sysroot=$SYS_ROOT $OBJCFLAGS"
OBJCXXFLAGS="--sysroot=$SYS_ROOT $OBJCFLAGS"
CPPFLAGS="--sysroot=$SYS_ROOT $CPPFLAGS"
LDFLAGS="--sysroot=$SYS_ROOT $LDFLAGS"
fi
# Store the CFLAGS etal passed to the configure script.
ORG_CFLAGS="$CFLAGS"
ORG_CXXFLAGS="$CXXFLAGS"
@ -378,17 +369,20 @@ AS_IF([test "x$OPENJDK_TARGET_OS" = xwindows], [
AS_IF([test "x$VARIANT" = xOPT], [
RC_FLAGS="$RC_FLAGS -d NDEBUG"
])
JDK_UPDATE_VERSION_NOTNULL=$JDK_UPDATE_VERSION
AS_IF([test "x$JDK_UPDATE_VERSION" = x], [
JDK_UPDATE_VERSION_NOTNULL=0
])
RC_FLAGS="$RC_FLAGS -d \"JDK_BUILD_ID=$FULL_VERSION\""
RC_FLAGS="$RC_FLAGS -d \"JDK_COMPANY=$COMPANY_NAME\""
RC_FLAGS="$RC_FLAGS -d \"JDK_COMPONENT=$PRODUCT_NAME $JDK_RC_PLATFORM_NAME binary\""
RC_FLAGS="$RC_FLAGS -d \"JDK_VER=$JDK_MINOR_VERSION.$JDK_MICRO_VERSION.$JDK_UPDATE_VERSION_NOTNULL.$COOKED_BUILD_NUMBER\""
RC_FLAGS="$RC_FLAGS -d \"JDK_COPYRIGHT=Copyright \xA9 $COPYRIGHT_YEAR\""
RC_FLAGS="$RC_FLAGS -d \"JDK_NAME=$PRODUCT_NAME $JDK_RC_PLATFORM_NAME $JDK_MINOR_VERSION $JDK_UPDATE_META_TAG\""
RC_FLAGS="$RC_FLAGS -d \"JDK_FVER=$JDK_MINOR_VERSION,$JDK_MICRO_VERSION,$JDK_UPDATE_VERSION_NOTNULL,$COOKED_BUILD_NUMBER\""
# The version variables used to create RC_FLAGS may be overridden
# in a custom configure script, or possibly the command line.
# Let those variables be expanded at make time in spec.gmk.
# The \$ are escaped to the shell, and the $(...) variables
# are evaluated by make.
RC_FLAGS="$RC_FLAGS \
-d \"JDK_BUILD_ID=\$(FULL_VERSION)\" \
-d \"JDK_COMPANY=\$(COMPANY_NAME)\" \
-d \"JDK_COMPONENT=\$(PRODUCT_NAME) \$(JDK_RC_PLATFORM_NAME) binary\" \
-d \"JDK_VER=\$(JDK_MINOR_VERSION).\$(JDK_MICRO_VERSION).\$(if \$(JDK_UPDATE_VERSION),\$(JDK_UPDATE_VERSION),0).\$(COOKED_BUILD_NUMBER)\" \
-d \"JDK_COPYRIGHT=Copyright \xA9 $COPYRIGHT_YEAR\" \
-d \"JDK_NAME=\$(PRODUCT_NAME) \$(JDK_RC_PLATFORM_NAME) \$(JDK_MINOR_VERSION) \$(JDK_UPDATE_META_TAG)\" \
-d \"JDK_FVER=\$(JDK_MINOR_VERSION),\$(JDK_MICRO_VERSION),\$(if \$(JDK_UPDATE_VERSION),\$(JDK_UPDATE_VERSION),0),\$(COOKED_BUILD_NUMBER)\""
# lib.exe is used to create static libraries.
AC_CHECK_PROG([WINAR], [lib],[lib],,,)

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@ -208,6 +208,8 @@ AC_DEFUN([TOOLCHAIN_SETUP_VISUAL_STUDIO_ENV],
# Remove any trailing \ from INCLUDE and LIB to avoid trouble in spec.gmk.
VS_INCLUDE=`$ECHO "$INCLUDE" | $SED 's/\\\\$//'`
VS_LIB=`$ECHO "$LIB" | $SED 's/\\\\$//'`
# Remove any paths containing # (typically F#) as that messes up make
PATH=`$ECHO "$PATH" | $SED 's/[[^:#]]*#[^:]*://g'`
VS_PATH="$PATH"
AC_SUBST(VS_INCLUDE)
AC_SUBST(VS_LIB)

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@ -155,7 +155,7 @@ define SetupArchive
# lines, but not here for use in make dependencies.
$1_DEPS+=$$(subst \,,$$(foreach src,$$($1_SRCS),$$(addprefix $$(src)/,$$($1_EXTRA_FILES))))
ifeq (,$$($1_SKIP_METAINF))
$1_DEPS+=$$(call CacheFind $$(wildcard $$(addsuffix /META-INF,$$($1_SRCS))))
$1_DEPS+=$$(call CacheFind,$$(wildcard $$(addsuffix /META-INF,$$($1_SRCS))))
endif
endif
@ -255,12 +255,21 @@ define SetupZipArchive
$(call LogSetupMacroEntry,SetupZipArchive($1),$2,$3,$4,$5,$6,$7,$8,$9,$(10),$(11),$(12),$(13),$(14),$(15))
$(if $(16),$(error Internal makefile error: Too many arguments to SetupZipArchive, please update JavaCompilation.gmk))
# To avoid running find over too large sets of files, which causes make to crash
# on some configurations (cygwin), use INCLUDES and INCLUDE_FILES to build a set
# of directories to run find in, if available.
ifneq ($$($1_INCLUDES)$$($1_INCLUDE_FILES),)
$1_FIND_LIST := $$(wildcard $$(foreach i,$$($1_SRC),\
$$(addprefix $$i/,$$($1_INCLUDES) $$($1_INCLUDE_FILES))))
else
$1_FIND_LIST := $$($1_SRC)
endif
# Find all files in the source tree.
$1_ALL_SRCS := $$(call not-containing,_the.,\
$$(filter $$(addprefix %,$$($1_SUFFIXES)),$$(call CacheFind $$($1_SRC))))
$$(filter $$(addprefix %,$$($1_SUFFIXES)),$$(call CacheFind,$$($1_FIND_LIST))))
ifneq ($$($1_INCLUDES),)
$1_SRC_INCLUDES := $$(foreach i,$$($1_SRC),$$(addprefix $$i/,$$(addsuffix /%,$$($1_INCLUDES))))
ifneq ($$($1_SUFFIXES),)
$1_ZIP_INCLUDES := $$(foreach s,$$($1_SUFFIXES),\
$$(addprefix -i$(SPACE)$(DQUOTE),$$(addsuffix /*$$s$(DQUOTE),$$($1_INCLUDES))))
@ -269,12 +278,8 @@ define SetupZipArchive
endif
endif
ifneq ($$($1_INCLUDE_FILES),)
$1_SRC_INCLUDES += $$(foreach i,$$($1_SRC),$$(addprefix $$i/,$$($1_INCLUDE_FILES)))
$1_ZIP_INCLUDES += $$(addprefix -i$(SPACE),$$($1_INCLUDE_FILES))
endif
ifneq ($$($1_SRC_INCLUDES),)
$1_ALL_SRCS := $$(filter $$($1_SRC_INCLUDES),$$($1_ALL_SRCS))
endif
ifneq ($$($1_EXCLUDES),)
$1_SRC_EXCLUDES := $$(foreach i,$$($1_SRC),$$(addprefix $$i/,$$(addsuffix /%,$$($1_EXCLUDES))))
$1_ZIP_EXCLUDES := $$(addprefix -x$(SPACE)$(DQUOTE),$$(addsuffix /*$(DQUOTE),$$($1_EXCLUDES)))

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@ -183,7 +183,7 @@ bootcycle-images-only: start-make
test: images test-only
test-only: start-make
@$(call TargetEnter)
@($(CD) $(SRC_ROOT)/test && $(BUILD_LOG_WRAPPER) $(MAKE) -j1 -k JT_HOME=$(JT_HOME) MAKEFLAGS= PRODUCT_HOME=$(JDK_IMAGE_DIR) JPRT_JAVA_HOME=$(JDK_IMAGE_DIR) ALT_OUTPUTDIR=$(OUTPUT_ROOT) $(TEST)) || true
@($(CD) $(SRC_ROOT)/test && $(BUILD_LOG_WRAPPER) $(MAKE) -j1 -k MAKEFLAGS= JT_HOME=$(JT_HOME) PRODUCT_HOME=$(JDK_IMAGE_DIR) JPRT_JAVA_HOME=$(JDK_IMAGE_DIR) ALT_OUTPUTDIR=$(OUTPUT_ROOT) CONCURRENCY=$(JOBS) $(TEST)) || true
@$(call TargetExit)
# Stores the tips for each repository. This file is be used when constructing the jdk image and can be
@ -192,7 +192,7 @@ source-tips: $(OUTPUT_ROOT)/source_tips
$(OUTPUT_ROOT)/source_tips: FRC
@$(MKDIR) -p $(@D)
@$(RM) $@
@$(if $(HG),$(call GetSourceTips),$(ECHO) "hg not installed" > $@)
@$(call GetSourceTips)
# Remove everything, except the output from configure.

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@ -332,9 +332,11 @@ define SetupLogging
# Shell redefinition trick inspired by http://www.cmcrossroads.com/ask-mr-make/6535-tracing-rule-execution-in-gnu-make
# For each target executed, will print
# Building <TARGET> (from <FIRST PREREQUISITE>) (<ALL NEWER PREREQUISITES> newer)
# but with a limit of 20 on <ALL NEWER PREREQUISITES>, to avoid cluttering logs too much (and causing a crash on Cygwin).
OLD_SHELL:=$$(SHELL)
WRAPPER_SHELL:=$$(OLD_SHELL) $$(SRC_ROOT)/common/bin/shell-tracer.sh $$(if $$(TIME),$$(TIME),-) $$(OUTPUT_ROOT)/build-trace-time.log $$(OLD_SHELL)
# but with a limit of 20 on <ALL NEWER PREREQUISITES>, to avoid cluttering logs too much
# (and causing a crash on Cygwin).
# Default shell seems to always be /bin/sh. Must override with bash to get this to work on Solaris.
# Only use time if it's GNU time which supports format and output file.
WRAPPER_SHELL:=/bin/bash $$(SRC_ROOT)/common/bin/shell-tracer.sh $$(if $$(findstring yes,$$(IS_GNU_TIME)),$$(TIME),-) $$(OUTPUT_ROOT)/build-trace-time.log /bin/bash
SHELL=$$(warning $$(if $$@,Building $$@,Running shell command) $$(if $$<, (from $$<))$$(if $$?, ($$(wordlist 1, 20, $$?) $$(if $$(wordlist 21, 22, $$?), ... [in total $$(words $$?) files]) newer)))$$(WRAPPER_SHELL)
endif
# Never remove warning messages; this is just for completeness

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@ -216,3 +216,7 @@ c8286839d0df04aba819ec4bef12b86babccf30e jdk8-b90
717aa26f8e0a1c0e768aebb3a763aca56db0c83e jdk8-b92
8dc9d7ccbb2d77fd89bc321bb02e67c152aca257 jdk8-b93
22f5d7f261d9d61a953d2d9a53f2e9ce0ca361d1 jdk8-b94
2cf36f43df36137980d9828cec27003ec10daeee jdk8-b95
3357c2776431d51a8de326a85e0f41420e40774f jdk8-b96
469995a8e97424f450c880606d689bf345277b19 jdk8-b97
3370fb6146e47a6cc05a213fc213e12fc0a38d07 jdk8-b98

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@ -351,3 +351,11 @@ b786c04b7be15194febe88dc1f0c9443e737a84b hs25-b35
3c78a14da19d26d6937af5f98b97e2a21c653b04 hs25-b36
1beed1f6f9edefe47ba8ed1355fbd3e7606b8288 jdk8-b94
69689078dff8b21e6df30870464f5d736eebdf72 hs25-b37
5d65c078cd0ac455aa5e58a09844c7acce54b487 jdk8-b95
2cc5a9d1ba66dfdff578918b393c727bd9450210 hs25-b38
e6a4b8c71fa6f225bd989a34de2d0d0a656a8be8 jdk8-b96
2b9380b0bf0b649f40704735773e8956c2d88ba0 hs25-b39
d197d377ab2e016d024e8c86cb06a57bd7eae590 jdk8-b97
c9dd82da51ed34a28f7c6b3245163ee962e94572 hs25-b40
30b5b75c42ac5174b640fbef8aa87527668e8400 jdk8-b98
2b9946e10587f74ef75ae8145bea484df4a2738b hs25-b41

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@ -31,13 +31,19 @@ import java.io.*;
import java.util.*;
public class CLHSDB {
public CLHSDB(JVMDebugger d) {
jvmDebugger = d;
}
public static void main(String[] args) {
new CLHSDB(args).run();
}
private void run() {
// At this point, if pidText != null we are supposed to attach to it.
// Else, if execPath != null, it is the path of a jdk/bin/java
public void run() {
// If jvmDebugger is already set, we have been given a JVMDebugger.
// Otherwise, if pidText != null we are supposed to attach to it.
// Finally, if execPath != null, it is the path of a jdk/bin/java
// and coreFilename is the pathname of a core file we are
// supposed to attach to.
@ -49,7 +55,9 @@ public class CLHSDB {
}
});
if (pidText != null) {
if (jvmDebugger != null) {
attachDebugger(jvmDebugger);
} else if (pidText != null) {
attachDebugger(pidText);
} else if (execPath != null) {
attachDebugger(execPath, coreFilename);
@ -96,6 +104,7 @@ public class CLHSDB {
// Internals only below this point
//
private HotSpotAgent agent;
private JVMDebugger jvmDebugger;
private boolean attached;
// These had to be made data members because they are referenced in inner classes.
private String pidText;
@ -120,7 +129,7 @@ public class CLHSDB {
case (1):
if (args[0].equals("help") || args[0].equals("-help")) {
doUsage();
System.exit(0);
return;
}
// If all numbers, it is a PID to attach to
// Else, it is a pathname to a .../bin/java for a core file.
@ -142,10 +151,15 @@ public class CLHSDB {
default:
System.out.println("HSDB Error: Too many options specified");
doUsage();
System.exit(1);
return;
}
}
private void attachDebugger(JVMDebugger d) {
agent.attach(d);
attached = true;
}
/** NOTE we are in a different thread here than either the main
thread or the Swing/AWT event handler thread, so we must be very
careful when creating or removing widgets */

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@ -101,6 +101,9 @@ import sun.jvm.hotspot.utilities.soql.JSJavaFactoryImpl;
import sun.jvm.hotspot.utilities.soql.JSJavaScriptEngine;
public class CommandProcessor {
volatile boolean quit;
public abstract static class DebuggerInterface {
public abstract HotSpotAgent getAgent();
public abstract boolean isAttached();
@ -1135,7 +1138,7 @@ public class CommandProcessor {
usage();
} else {
debugger.detach();
System.exit(0);
quit = true;
}
}
},
@ -1714,7 +1717,7 @@ public class CommandProcessor {
}
protected void quit() {
debugger.detach();
System.exit(0);
quit = true;
}
protected BufferedReader getInputReader() {
return in;
@ -1781,7 +1784,7 @@ public class CommandProcessor {
public void run(boolean prompt) {
// Process interactive commands.
while (true) {
while (!quit) {
if (prompt) printPrompt();
String ln = null;
try {

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@ -59,8 +59,11 @@ public class HSDB implements ObjectHistogramPanel.Listener, SAListener {
// Internals only below this point
//
private HotSpotAgent agent;
private JVMDebugger jvmDebugger;
private JDesktopPane desktop;
private boolean attached;
private boolean argError;
private JFrame frame;
/** List <JMenuItem> */
private java.util.List attachMenuItems;
/** List <JMenuItem> */
@ -85,6 +88,11 @@ public class HSDB implements ObjectHistogramPanel.Listener, SAListener {
System.out.println(" path-to-corefile: Debug this corefile. The default is 'core'");
System.out.println(" If no arguments are specified, you can select what to do from the GUI.\n");
HotSpotAgent.showUsage();
argError = true;
}
public HSDB(JVMDebugger d) {
jvmDebugger = d;
}
private HSDB(String[] args) {
@ -95,7 +103,6 @@ public class HSDB implements ObjectHistogramPanel.Listener, SAListener {
case (1):
if (args[0].equals("help") || args[0].equals("-help")) {
doUsage();
System.exit(0);
}
// If all numbers, it is a PID to attach to
// Else, it is a pathname to a .../bin/java for a core file.
@ -117,24 +124,29 @@ public class HSDB implements ObjectHistogramPanel.Listener, SAListener {
default:
System.out.println("HSDB Error: Too many options specified");
doUsage();
System.exit(1);
}
}
private void run() {
// At this point, if pidText != null we are supposed to attach to it.
// Else, if execPath != null, it is the path of a jdk/bin/java
// and coreFilename is the pathname of a core file we are
// supposed to attach to.
// close this tool without calling System.exit
protected void closeUI() {
workerThread.shutdown();
frame.dispose();
}
public void run() {
// Don't start the UI if there were bad arguments.
if (argError) {
return;
}
agent = new HotSpotAgent();
workerThread = new WorkerThread();
attachMenuItems = new java.util.ArrayList();
detachMenuItems = new java.util.ArrayList();
JFrame frame = new JFrame("HSDB - HotSpot Debugger");
frame = new JFrame("HSDB - HotSpot Debugger");
frame.setSize(800, 600);
frame.setDefaultCloseOperation(WindowConstants.EXIT_ON_CLOSE);
frame.setDefaultCloseOperation(WindowConstants.DISPOSE_ON_CLOSE);
JMenuBar menuBar = new JMenuBar();
@ -197,7 +209,7 @@ public class HSDB implements ObjectHistogramPanel.Listener, SAListener {
item = createMenuItem("Exit",
new ActionListener() {
public void actionPerformed(ActionEvent e) {
System.exit(0);
closeUI();
}
});
item.setAccelerator(KeyStroke.getKeyStroke(KeyEvent.VK_X, ActionEvent.ALT_MASK));
@ -406,7 +418,15 @@ public class HSDB implements ObjectHistogramPanel.Listener, SAListener {
}
});
if (pidText != null) {
// If jvmDebugger is already set, we have been given a JVMDebugger.
// Otherwise, if pidText != null we are supposed to attach to it.
// Finally, if execPath != null, it is the path of a jdk/bin/java
// and coreFilename is the pathname of a core file we are
// supposed to attach to.
if (jvmDebugger != null) {
attach(jvmDebugger);
} else if (pidText != null) {
attach(pidText);
} else if (execPath != null) {
attach(execPath, coreFilename);
@ -1113,6 +1133,12 @@ public class HSDB implements ObjectHistogramPanel.Listener, SAListener {
});
}
// Attach to existing JVMDebugger, which should be already attached to a core/process.
private void attach(JVMDebugger d) {
attached = true;
showThreadsDialog();
}
/** NOTE we are in a different thread here than either the main
thread or the Swing/AWT event handler thread, so we must be very
careful when creating or removing widgets */

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@ -25,6 +25,8 @@
package sun.jvm.hotspot;
import java.rmi.RemoteException;
import java.lang.reflect.Constructor;
import java.lang.reflect.InvocationTargetException;
import sun.jvm.hotspot.debugger.Debugger;
import sun.jvm.hotspot.debugger.DebuggerException;
@ -63,7 +65,6 @@ public class HotSpotAgent {
private String os;
private String cpu;
private String fileSep;
// The system can work in several ways:
// - Attaching to local process
@ -155,6 +156,14 @@ public class HotSpotAgent {
go();
}
/** This uses a JVMDebugger that is already attached to the core or process */
public synchronized void attach(JVMDebugger d)
throws DebuggerException {
debugger = d;
isServer = false;
go();
}
/** This attaches to a "debug server" on a remote machine; this
remote server has already attached to a process or opened a
core file and is waiting for RMI calls on the Debugger object to
@ -303,28 +312,37 @@ public class HotSpotAgent {
// server, but not client attaching to server)
//
try {
os = PlatformInfo.getOS();
cpu = PlatformInfo.getCPU();
}
catch (UnsupportedPlatformException e) {
throw new DebuggerException(e);
}
fileSep = System.getProperty("file.separator");
// Handle existing or alternate JVMDebugger:
// these will set os, cpu independently of our PlatformInfo implementation.
String alternateDebugger = System.getProperty("sa.altDebugger");
if (debugger != null) {
setupDebuggerExisting();
} else if (alternateDebugger != null) {
setupDebuggerAlternate(alternateDebugger);
if (os.equals("solaris")) {
setupDebuggerSolaris();
} else if (os.equals("win32")) {
setupDebuggerWin32();
} else if (os.equals("linux")) {
setupDebuggerLinux();
} else if (os.equals("bsd")) {
setupDebuggerBsd();
} else if (os.equals("darwin")) {
setupDebuggerDarwin();
} else {
// Add support for more operating systems here
throw new DebuggerException("Operating system " + os + " not yet supported");
// Otherwise, os, cpu are those of our current platform:
try {
os = PlatformInfo.getOS();
cpu = PlatformInfo.getCPU();
} catch (UnsupportedPlatformException e) {
throw new DebuggerException(e);
}
if (os.equals("solaris")) {
setupDebuggerSolaris();
} else if (os.equals("win32")) {
setupDebuggerWin32();
} else if (os.equals("linux")) {
setupDebuggerLinux();
} else if (os.equals("bsd")) {
setupDebuggerBsd();
} else if (os.equals("darwin")) {
setupDebuggerDarwin();
} else {
// Add support for more operating systems here
throw new DebuggerException("Operating system " + os + " not yet supported");
}
}
if (isServer) {
@ -423,6 +441,41 @@ public class HotSpotAgent {
// OS-specific debugger setup/connect routines
//
// Use the existing JVMDebugger, as passed to our constructor.
// Retrieve os and cpu from that debugger, not the current platform.
private void setupDebuggerExisting() {
os = debugger.getOS();
cpu = debugger.getCPU();
setupJVMLibNames(os);
machDesc = debugger.getMachineDescription();
}
// Given a classname, load an alternate implementation of JVMDebugger.
private void setupDebuggerAlternate(String alternateName) {
try {
Class c = Class.forName(alternateName);
Constructor cons = c.getConstructor();
debugger = (JVMDebugger) cons.newInstance();
attachDebugger();
setupDebuggerExisting();
} catch (ClassNotFoundException cnfe) {
throw new DebuggerException("Cannot find alternate SA Debugger: '" + alternateName + "'");
} catch (NoSuchMethodException nsme) {
throw new DebuggerException("Alternate SA Debugger: '" + alternateName + "' has missing constructor.");
} catch (InstantiationException ie) {
throw new DebuggerException("Alternate SA Debugger: '" + alternateName + "' fails to initialise: ", ie);
} catch (IllegalAccessException iae) {
throw new DebuggerException("Alternate SA Debugger: '" + alternateName + "' fails to initialise: ", iae);
} catch (InvocationTargetException iae) {
throw new DebuggerException("Alternate SA Debugger: '" + alternateName + "' fails to initialise: ", iae);
}
System.err.println("Loaded alternate HotSpot SA Debugger: " + alternateName);
}
//
// Solaris
//
@ -466,6 +519,11 @@ public class HotSpotAgent {
debugger = new RemoteDebuggerClient(remote);
machDesc = ((RemoteDebuggerClient) debugger).getMachineDescription();
os = debugger.getOS();
setupJVMLibNames(os);
cpu = debugger.getCPU();
}
private void setupJVMLibNames(String os) {
if (os.equals("solaris")) {
setupJVMLibNamesSolaris();
} else if (os.equals("win32")) {
@ -479,8 +537,6 @@ public class HotSpotAgent {
} else {
throw new RuntimeException("Unknown OS type");
}
cpu = debugger.getCPU();
}
private void setupJVMLibNamesSolaris() {

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@ -26,11 +26,11 @@ package sun.jvm.hotspot.debugger.linux;
import sun.jvm.hotspot.debugger.*;
class LinuxAddress implements Address {
public class LinuxAddress implements Address {
protected LinuxDebugger debugger;
protected long addr;
LinuxAddress(LinuxDebugger debugger, long addr) {
public LinuxAddress(LinuxDebugger debugger, long addr) {
this.debugger = debugger;
this.addr = addr;
}

View File

@ -26,8 +26,8 @@ package sun.jvm.hotspot.debugger.linux;
import sun.jvm.hotspot.debugger.*;
class LinuxOopHandle extends LinuxAddress implements OopHandle {
LinuxOopHandle(LinuxDebugger debugger, long addr) {
public class LinuxOopHandle extends LinuxAddress implements OopHandle {
public LinuxOopHandle(LinuxDebugger debugger, long addr) {
super(debugger, addr);
}

View File

@ -49,7 +49,6 @@ public class ArrayKlass extends Klass {
higherDimension = new MetadataField(type.getAddressField("_higher_dimension"), 0);
lowerDimension = new MetadataField(type.getAddressField("_lower_dimension"), 0);
vtableLen = new CIntField(type.getCIntegerField("_vtable_len"), 0);
allocSize = new CIntField(type.getCIntegerField("_alloc_size"), 0);
componentMirror = new OopField(type.getOopField("_component_mirror"), 0);
javaLangCloneableName = null;
javaLangObjectName = null;
@ -64,7 +63,6 @@ public class ArrayKlass extends Klass {
private static MetadataField higherDimension;
private static MetadataField lowerDimension;
private static CIntField vtableLen;
private static CIntField allocSize;
private static OopField componentMirror;
public Klass getJavaSuper() {
@ -76,7 +74,6 @@ public class ArrayKlass extends Klass {
public Klass getHigherDimension() { return (Klass) higherDimension.getValue(this); }
public Klass getLowerDimension() { return (Klass) lowerDimension.getValue(this); }
public long getVtableLen() { return vtableLen.getValue(this); }
public long getAllocSize() { return allocSize.getValue(this); }
public Oop getComponentMirror() { return componentMirror.getValue(this); }
// constant class names - javaLangCloneable, javaIoSerializable, javaLangObject
@ -147,7 +144,6 @@ public class ArrayKlass extends Klass {
visitor.doMetadata(higherDimension, true);
visitor.doMetadata(lowerDimension, true);
visitor.doCInt(vtableLen, true);
visitor.doCInt(allocSize, true);
visitor.doOop(componentMirror, true);
}
}

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@ -57,7 +57,6 @@ public class Klass extends Metadata implements ClassConstants {
accessFlags = new CIntField(type.getCIntegerField("_access_flags"), 0);
subklass = new MetadataField(type.getAddressField("_subklass"), 0);
nextSibling = new MetadataField(type.getAddressField("_next_sibling"), 0);
allocCount = new CIntField(type.getCIntegerField("_alloc_count"), 0);
LH_INSTANCE_SLOW_PATH_BIT = db.lookupIntConstant("Klass::_lh_instance_slow_path_bit").intValue();
LH_LOG2_ELEMENT_SIZE_SHIFT = db.lookupIntConstant("Klass::_lh_log2_element_size_shift").intValue();
@ -87,7 +86,6 @@ public class Klass extends Metadata implements ClassConstants {
private static CIntField accessFlags;
private static MetadataField subklass;
private static MetadataField nextSibling;
private static CIntField allocCount;
private Address getValue(AddressField field) {
return addr.getAddressAt(field.getOffset());
@ -108,7 +106,6 @@ public class Klass extends Metadata implements ClassConstants {
public AccessFlags getAccessFlagsObj(){ return new AccessFlags(getAccessFlags()); }
public Klass getSubklassKlass() { return (Klass) subklass.getValue(this); }
public Klass getNextSiblingKlass() { return (Klass) nextSibling.getValue(this); }
public long getAllocCount() { return allocCount.getValue(this); }
// computed access flags - takes care of inner classes etc.
// This is closer to actual source level than getAccessFlags() etc.
@ -172,7 +169,6 @@ public class Klass extends Metadata implements ClassConstants {
visitor.doCInt(accessFlags, true);
visitor.doMetadata(subklass, true);
visitor.doMetadata(nextSibling, true);
visitor.doCInt(allocCount, true);
}
public long getObjectSize() {

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@ -246,7 +246,7 @@ public class VM {
}
}
private static final boolean disableDerivedPrinterTableCheck;
private static final boolean disableDerivedPointerTableCheck;
private static final Properties saProps;
static {
@ -256,12 +256,12 @@ public class VM {
url = VM.class.getClassLoader().getResource("sa.properties");
saProps.load(new BufferedInputStream(url.openStream()));
} catch (Exception e) {
throw new RuntimeException("Unable to load properties " +
System.err.println("Unable to load properties " +
(url == null ? "null" : url.toString()) +
": " + e.getMessage());
}
disableDerivedPrinterTableCheck = System.getProperty("sun.jvm.hotspot.runtime.VM.disableDerivedPointerTableCheck") != null;
disableDerivedPointerTableCheck = System.getProperty("sun.jvm.hotspot.runtime.VM.disableDerivedPointerTableCheck") != null;
}
private VM(TypeDataBase db, JVMDebugger debugger, boolean isBigEndian) {
@ -371,7 +371,8 @@ public class VM {
/** This is used by the debugging system */
public static void initialize(TypeDataBase db, JVMDebugger debugger) {
if (soleInstance != null) {
throw new RuntimeException("Attempt to initialize VM twice");
// Using multiple SA Tool classes in the same process creates a call here.
return;
}
soleInstance = new VM(db, debugger, debugger.getMachineDescription().isBigEndian());
@ -683,7 +684,7 @@ public class VM {
/** Returns true if C2 derived pointer table should be used, false otherwise */
public boolean useDerivedPointerTable() {
return !disableDerivedPrinterTableCheck;
return !disableDerivedPointerTableCheck;
}
/** Returns the code cache; should not be used if is core build */

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@ -41,6 +41,14 @@ import sun.jvm.hotspot.utilities.*;
public class ClassLoaderStats extends Tool {
boolean verbose = true;
public ClassLoaderStats() {
super();
}
public ClassLoaderStats(JVMDebugger d) {
super(d);
}
public static void main(String[] args) {
ClassLoaderStats cls = new ClassLoaderStats();
cls.start(args);

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@ -24,6 +24,7 @@
package sun.jvm.hotspot.tools;
import sun.jvm.hotspot.debugger.JVMDebugger;
import sun.jvm.hotspot.tools.*;
import sun.jvm.hotspot.oops.*;
@ -42,6 +43,15 @@ import java.util.Comparator;
* summary of these objects in the form of a histogram.
*/
public class FinalizerInfo extends Tool {
public FinalizerInfo() {
super();
}
public FinalizerInfo(JVMDebugger d) {
super(d);
}
public static void main(String[] args) {
FinalizerInfo finfo = new FinalizerInfo();
finfo.start(args);

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@ -25,10 +25,19 @@
package sun.jvm.hotspot.tools;
import java.io.PrintStream;
import sun.jvm.hotspot.debugger.JVMDebugger;
import sun.jvm.hotspot.runtime.*;
public class FlagDumper extends Tool {
public FlagDumper() {
super();
}
public FlagDumper(JVMDebugger d) {
super(d);
}
public void run() {
VM.Flag[] flags = VM.getVM().getCommandLineFlags();
PrintStream out = System.out;

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@ -25,6 +25,7 @@
package sun.jvm.hotspot.tools;
import sun.jvm.hotspot.utilities.HeapHprofBinWriter;
import sun.jvm.hotspot.debugger.JVMDebugger;
import java.io.IOException;
/*
@ -42,6 +43,11 @@ public class HeapDumper extends Tool {
this.dumpFile = dumpFile;
}
public HeapDumper(String dumpFile, JVMDebugger d) {
super(d);
this.dumpFile = dumpFile;
}
protected void printFlagsUsage() {
System.out.println(" <no option>\tto dump heap to " +
DEFAULT_DUMP_FILE);

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@ -29,12 +29,21 @@ import sun.jvm.hotspot.gc_interface.*;
import sun.jvm.hotspot.gc_implementation.g1.*;
import sun.jvm.hotspot.gc_implementation.parallelScavenge.*;
import sun.jvm.hotspot.gc_implementation.shared.*;
import sun.jvm.hotspot.debugger.JVMDebugger;
import sun.jvm.hotspot.memory.*;
import sun.jvm.hotspot.oops.*;
import sun.jvm.hotspot.runtime.*;
public class HeapSummary extends Tool {
public HeapSummary() {
super();
}
public HeapSummary(JVMDebugger d) {
super(d);
}
public static void main(String[] args) {
HeapSummary hs = new HeapSummary();
hs.start(args);

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@ -25,12 +25,21 @@
package sun.jvm.hotspot.tools;
import sun.jvm.hotspot.runtime.*;
import sun.jvm.hotspot.debugger.JVMDebugger;
public class JInfo extends Tool {
public JInfo() {
super();
}
public JInfo(int m) {
mode = m;
}
public JInfo(JVMDebugger d) {
super(d);
}
protected boolean needsJavaPrefix() {
return false;
}

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@ -25,6 +25,7 @@
package sun.jvm.hotspot.tools;
import java.io.*;
import sun.jvm.hotspot.debugger.JVMDebugger;
import sun.jvm.hotspot.utilities.*;
public class JMap extends Tool {
@ -36,6 +37,10 @@ public class JMap extends Tool {
this(MODE_PMAP);
}
public JMap(JVMDebugger d) {
super(d);
}
protected boolean needsJavaPrefix() {
return false;
}

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@ -25,9 +25,19 @@
package sun.jvm.hotspot.tools;
import java.io.*;
import sun.jvm.hotspot.debugger.JVMDebugger;
import sun.jvm.hotspot.runtime.*;
public class JSnap extends Tool {
public JSnap() {
super();
}
public JSnap(JVMDebugger d) {
super(d);
}
public void run() {
final PrintStream out = System.out;
if (PerfMemory.initialized()) {

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@ -24,6 +24,8 @@
package sun.jvm.hotspot.tools;
import sun.jvm.hotspot.debugger.JVMDebugger;
public class JStack extends Tool {
public JStack(boolean mixedMode, boolean concurrentLocks) {
this.mixedMode = mixedMode;
@ -34,6 +36,10 @@ public class JStack extends Tool {
this(true, true);
}
public JStack(JVMDebugger d) {
super(d);
}
protected boolean needsJavaPrefix() {
return false;
}

View File

@ -33,6 +33,14 @@ import java.io.PrintStream;
an object histogram from a remote or crashed VM. */
public class ObjectHistogram extends Tool {
public ObjectHistogram() {
super();
}
public ObjectHistogram(JVMDebugger d) {
super(d);
}
public void run() {
run(System.out, System.err);
}

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@ -31,6 +31,15 @@ import sun.jvm.hotspot.debugger.cdbg.*;
import sun.jvm.hotspot.runtime.*;
public class PMap extends Tool {
public PMap() {
super();
}
public PMap(JVMDebugger d) {
super(d);
}
public void run() {
run(System.out);
}

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@ -45,6 +45,10 @@ public class PStack extends Tool {
this(true, true);
}
public PStack(JVMDebugger d) {
super(d);
}
public void run() {
run(System.out);
}

View File

@ -45,6 +45,16 @@ public class StackTrace extends Tool {
run(System.out);
}
public StackTrace(JVMDebugger d) {
super(d);
}
public StackTrace(JVMDebugger d, boolean v, boolean concurrentLocks) {
super(d);
this.verbose = v;
this.concurrentLocks = concurrentLocks;
}
public void run(java.io.PrintStream tty) {
// Ready to go with the database...
try {

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@ -27,10 +27,19 @@ package sun.jvm.hotspot.tools;
import java.io.PrintStream;
import java.util.*;
import sun.jvm.hotspot.debugger.JVMDebugger;
import sun.jvm.hotspot.runtime.*;
public class SysPropsDumper extends Tool {
public SysPropsDumper() {
super();
}
public SysPropsDumper(JVMDebugger d) {
super(d);
}
public void run() {
Properties sysProps = VM.getVM().getSystemProperties();
PrintStream out = System.out;

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@ -35,6 +35,7 @@ import sun.jvm.hotspot.debugger.*;
public abstract class Tool implements Runnable {
private HotSpotAgent agent;
private JVMDebugger jvmDebugger;
private int debugeeType;
// debugeeType is one of constants below
@ -42,6 +43,13 @@ public abstract class Tool implements Runnable {
protected static final int DEBUGEE_CORE = 1;
protected static final int DEBUGEE_REMOTE = 2;
public Tool() {
}
public Tool(JVMDebugger d) {
jvmDebugger = d;
}
public String getName() {
return getClass().getName();
}
@ -90,7 +98,6 @@ public abstract class Tool implements Runnable {
protected void usage() {
printUsage();
System.exit(1);
}
/*
@ -106,13 +113,13 @@ public abstract class Tool implements Runnable {
protected void stop() {
if (agent != null) {
agent.detach();
System.exit(0);
}
}
protected void start(String[] args) {
if ((args.length < 1) || (args.length > 2)) {
usage();
return;
}
// Attempt to handle -h or -help or some invalid flag
@ -185,13 +192,31 @@ public abstract class Tool implements Runnable {
}
if (e.getMessage() != null) {
err.print(e.getMessage());
e.printStackTrace();
}
err.println();
System.exit(1);
return;
}
err.println("Debugger attached successfully.");
startInternal();
}
// When using an existing JVMDebugger.
public void start() {
if (jvmDebugger == null) {
throw new RuntimeException("Tool.start() called with no JVMDebugger set.");
}
agent = new HotSpotAgent();
agent.attach(jvmDebugger);
startInternal();
}
// Remains of the start mechanism, common to both start methods.
private void startInternal() {
PrintStream err = System.err;
VM vm = VM.getVM();
if (vm.isCore()) {
err.println("Core build detected.");

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@ -25,6 +25,7 @@
package sun.jvm.hotspot.tools.jcore;
import java.io.*;
import java.lang.reflect.Constructor;
import java.util.jar.JarOutputStream;
import java.util.jar.JarEntry;
import java.util.jar.Manifest;
@ -38,6 +39,16 @@ public class ClassDump extends Tool {
private ClassFilter classFilter;
private String outputDirectory;
private JarOutputStream jarStream;
private String pkgList;
public ClassDump() {
super();
}
public ClassDump(JVMDebugger d, String pkgList) {
super(d);
this.pkgList = pkgList;
}
public void setClassFilter(ClassFilter cf) {
classFilter = cf;
@ -63,6 +74,25 @@ public class ClassDump extends Tool {
public void run() {
// Ready to go with the database...
try {
// The name of the filter always comes from a System property.
// If we have a pkgList, pass it, otherwise let the filter read
// its own System property for the list of classes.
String filterClassName = System.getProperty("sun.jvm.hotspot.tools.jcore.filter",
"sun.jvm.hotspot.tools.jcore.PackageNameFilter");
try {
Class filterClass = Class.forName(filterClassName);
if (pkgList == null) {
classFilter = (ClassFilter) filterClass.newInstance();
} else {
Constructor con = filterClass.getConstructor(String.class);
classFilter = (ClassFilter) con.newInstance(pkgList);
}
} catch(Exception exp) {
System.err.println("Warning: Can not create class filter!");
}
String outputDirectory = System.getProperty("sun.jvm.hotspot.tools.jcore.outputDir", ".");
setOutputDirectory(outputDirectory);
// walk through the system dictionary
SystemDictionary dict = VM.getVM().getSystemDictionary();
@ -139,26 +169,8 @@ public class ClassDump extends Tool {
}
public static void main(String[] args) {
// load class filters
ClassFilter classFilter = null;
String filterClassName = System.getProperty("sun.jvm.hotspot.tools.jcore.filter");
if (filterClassName != null) {
try {
Class filterClass = Class.forName(filterClassName);
classFilter = (ClassFilter) filterClass.newInstance();
} catch(Exception exp) {
System.err.println("Warning: Can not create class filter!");
}
}
String outputDirectory = System.getProperty("sun.jvm.hotspot.tools.jcore.outputDir");
if (outputDirectory == null)
outputDirectory = ".";
ClassDump cd = new ClassDump();
cd.setClassFilter(classFilter);
cd.setOutputDirectory(outputDirectory);
cd.start(args);
cd.stop();
}

View File

@ -24,12 +24,22 @@
package sun.jvm.hotspot.tools.soql;
import sun.jvm.hotspot.debugger.JVMDebugger;
import sun.jvm.hotspot.tools.*;
import sun.jvm.hotspot.utilities.*;
import sun.jvm.hotspot.utilities.soql.*;
/** This is command line JavaScript debugger console */
public class JSDB extends Tool {
public JSDB() {
super();
}
public JSDB(JVMDebugger d) {
super(d);
}
public static void main(String[] args) {
JSDB jsdb = new JSDB();
jsdb.start(args);

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@ -44,6 +44,14 @@ public class SOQL extends Tool {
soql.stop();
}
public SOQL() {
super();
}
public SOQL(JVMDebugger d) {
super(d);
}
protected SOQLEngine soqlEngine;
protected BufferedReader in = new BufferedReader(new InputStreamReader(System.in));
protected PrintStream out = System.out;

View File

@ -7,6 +7,6 @@ else
NM=nm
fi
$NM --defined-only $* | awk '
{ if ($3 ~ /^_ZTV/ || $3 ~ /^gHotSpotVM/) print "\t" $3 ";" }
$NM -Uj $* | awk '
{ if ($3 ~ /^_ZTV/ || $3 ~ /^gHotSpotVM/) print "\t" $3 }
'

View File

@ -1,5 +1,5 @@
#
# Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
# Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
#
# This code is free software; you can redistribute it and/or modify it
@ -368,8 +368,8 @@ ifeq ($(OS_VENDOR), Darwin)
# Standard linker flags
LFLAGS +=
# Darwin doesn't use ELF and doesn't support version scripts
LDNOMAP = true
# The apple linker has its own variant of mapfiles/version-scripts
MAPFLAG = -Xlinker -exported_symbols_list -Xlinker FILENAME
# Use $(SONAMEFLAG:SONAME=soname) to specify the intrinsic name of a shared obj
SONAMEFLAG =

View File

@ -1,7 +1,3 @@
#
# @(#)mapfile-vers-debug 1.18 07/10/25 16:47:35
#
#
# Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
@ -23,273 +19,243 @@
# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
# or visit www.oracle.com if you need additional information or have any
# questions.
#
#
#
# Only used for OSX/Darwin builds
# Define public interface.
# _JNI
_JNI_CreateJavaVM
_JNI_GetCreatedJavaVMs
_JNI_GetDefaultJavaVMInitArgs
SUNWprivate_1.1 {
global:
# JNI
JNI_CreateJavaVM;
JNI_GetCreatedJavaVMs;
JNI_GetDefaultJavaVMInitArgs;
# _JVM
_JVM_Accept
_JVM_ActiveProcessorCount
_JVM_AllocateNewArray
_JVM_AllocateNewObject
_JVM_ArrayCopy
_JVM_AssertionStatusDirectives
_JVM_Available
_JVM_Bind
_JVM_ClassDepth
_JVM_ClassLoaderDepth
_JVM_Clone
_JVM_Close
_JVM_CX8Field
_JVM_CompileClass
_JVM_CompileClasses
_JVM_CompilerCommand
_JVM_Connect
_JVM_ConstantPoolGetClassAt
_JVM_ConstantPoolGetClassAtIfLoaded
_JVM_ConstantPoolGetDoubleAt
_JVM_ConstantPoolGetFieldAt
_JVM_ConstantPoolGetFieldAtIfLoaded
_JVM_ConstantPoolGetFloatAt
_JVM_ConstantPoolGetIntAt
_JVM_ConstantPoolGetLongAt
_JVM_ConstantPoolGetMethodAt
_JVM_ConstantPoolGetMethodAtIfLoaded
_JVM_ConstantPoolGetMemberRefInfoAt
_JVM_ConstantPoolGetSize
_JVM_ConstantPoolGetStringAt
_JVM_ConstantPoolGetUTF8At
_JVM_CountStackFrames
_JVM_CurrentClassLoader
_JVM_CurrentLoadedClass
_JVM_CurrentThread
_JVM_CurrentTimeMillis
_JVM_DefineClass
_JVM_DefineClassWithSource
_JVM_DefineClassWithSourceCond
_JVM_DesiredAssertionStatus
_JVM_DisableCompiler
_JVM_DoPrivileged
_JVM_DTraceGetVersion
_JVM_DTraceActivate
_JVM_DTraceIsProbeEnabled
_JVM_DTraceIsSupported
_JVM_DTraceDispose
_JVM_DumpAllStacks
_JVM_DumpThreads
_JVM_EnableCompiler
_JVM_Exit
_JVM_FillInStackTrace
_JVM_FindClassFromClass
_JVM_FindClassFromClassLoader
_JVM_FindClassFromBootLoader
_JVM_FindLibraryEntry
_JVM_FindLoadedClass
_JVM_FindPrimitiveClass
_JVM_FindSignal
_JVM_FreeMemory
_JVM_GC
_JVM_GetAllThreads
_JVM_GetArrayElement
_JVM_GetArrayLength
_JVM_GetCPClassNameUTF
_JVM_GetCPFieldClassNameUTF
_JVM_GetCPFieldModifiers
_JVM_GetCPFieldNameUTF
_JVM_GetCPFieldSignatureUTF
_JVM_GetCPMethodClassNameUTF
_JVM_GetCPMethodModifiers
_JVM_GetCPMethodNameUTF
_JVM_GetCPMethodSignatureUTF
_JVM_GetCallerClass
_JVM_GetClassAccessFlags
_JVM_GetClassAnnotations
_JVM_GetClassCPEntriesCount
_JVM_GetClassCPTypes
_JVM_GetClassConstantPool
_JVM_GetClassContext
_JVM_GetClassDeclaredConstructors
_JVM_GetClassDeclaredFields
_JVM_GetClassDeclaredMethods
_JVM_GetClassFieldsCount
_JVM_GetClassInterfaces
_JVM_GetClassLoader
_JVM_GetClassMethodsCount
_JVM_GetClassModifiers
_JVM_GetClassName
_JVM_GetClassNameUTF
_JVM_GetClassSignature
_JVM_GetClassSigners
_JVM_GetClassTypeAnnotations
_JVM_GetComponentType
_JVM_GetDeclaredClasses
_JVM_GetDeclaringClass
_JVM_GetEnclosingMethodInfo
_JVM_GetFieldAnnotations
_JVM_GetFieldIxModifiers
_JVM_GetFieldTypeAnnotations
_JVM_GetHostName
_JVM_GetInheritedAccessControlContext
_JVM_GetInterfaceVersion
_JVM_GetLastErrorString
_JVM_GetManagement
_JVM_GetMethodAnnotations
_JVM_GetMethodDefaultAnnotationValue
_JVM_GetMethodIxArgsSize
_JVM_GetMethodIxByteCode
_JVM_GetMethodIxByteCodeLength
_JVM_GetMethodIxExceptionIndexes
_JVM_GetMethodIxExceptionTableEntry
_JVM_GetMethodIxExceptionTableLength
_JVM_GetMethodIxExceptionsCount
_JVM_GetMethodIxLocalsCount
_JVM_GetMethodIxMaxStack
_JVM_GetMethodIxModifiers
_JVM_GetMethodIxNameUTF
_JVM_GetMethodIxSignatureUTF
_JVM_GetMethodParameterAnnotations
_JVM_GetMethodParameters
_JVM_GetMethodTypeAnnotations
_JVM_GetPrimitiveArrayElement
_JVM_GetProtectionDomain
_JVM_GetSockName
_JVM_GetSockOpt
_JVM_GetStackAccessControlContext
_JVM_GetStackTraceDepth
_JVM_GetStackTraceElement
_JVM_GetSystemPackage
_JVM_GetSystemPackages
_JVM_GetThreadStateNames
_JVM_GetThreadStateValues
_JVM_GetVersionInfo
_JVM_Halt
_JVM_HoldsLock
_JVM_IHashCode
_JVM_InitAgentProperties
_JVM_InitProperties
_JVM_InitializeCompiler
_JVM_InitializeSocketLibrary
_JVM_InternString
_JVM_Interrupt
_JVM_InvokeMethod
_JVM_IsArrayClass
_JVM_IsConstructorIx
_JVM_IsInterface
_JVM_IsInterrupted
_JVM_IsNaN
_JVM_IsPrimitiveClass
_JVM_IsSameClassPackage
_JVM_IsSilentCompiler
_JVM_IsSupportedJNIVersion
_JVM_IsThreadAlive
_JVM_IsVMGeneratedMethodIx
_JVM_LatestUserDefinedLoader
_JVM_Listen
_JVM_LoadClass0
_JVM_LoadLibrary
_JVM_Lseek
_JVM_MaxObjectInspectionAge
_JVM_MaxMemory
_JVM_MonitorNotify
_JVM_MonitorNotifyAll
_JVM_MonitorWait
_JVM_NanoTime
_JVM_NativePath
_JVM_NewArray
_JVM_NewInstanceFromConstructor
_JVM_NewMultiArray
_JVM_OnExit
_JVM_Open
_JVM_RaiseSignal
_JVM_RawMonitorCreate
_JVM_RawMonitorDestroy
_JVM_RawMonitorEnter
_JVM_RawMonitorExit
_JVM_Read
_JVM_Recv
_JVM_RecvFrom
_JVM_RegisterSignal
_JVM_ReleaseUTF
_JVM_ResolveClass
_JVM_ResumeThread
_JVM_Send
_JVM_SendTo
_JVM_SetArrayElement
_JVM_SetClassSigners
_JVM_SetLength
_JVM_SetNativeThreadName
_JVM_SetPrimitiveArrayElement
_JVM_SetSockOpt
_JVM_SetThreadPriority
_JVM_Sleep
_JVM_Socket
_JVM_SocketAvailable
_JVM_SocketClose
_JVM_SocketShutdown
_JVM_StartThread
_JVM_StopThread
_JVM_SuspendThread
_JVM_SupportsCX8
_JVM_Sync
_JVM_Timeout
_JVM_TotalMemory
_JVM_TraceInstructions
_JVM_TraceMethodCalls
_JVM_UnloadLibrary
_JVM_Write
_JVM_Yield
_JVM_handle_bsd_signal
# JVM
JVM_Accept;
JVM_ActiveProcessorCount;
JVM_AllocateNewArray;
JVM_AllocateNewObject;
JVM_ArrayCopy;
JVM_AssertionStatusDirectives;
JVM_Available;
JVM_Bind;
JVM_ClassDepth;
JVM_ClassLoaderDepth;
JVM_Clone;
JVM_Close;
JVM_CX8Field;
JVM_CompileClass;
JVM_CompileClasses;
JVM_CompilerCommand;
JVM_Connect;
JVM_ConstantPoolGetClassAt;
JVM_ConstantPoolGetClassAtIfLoaded;
JVM_ConstantPoolGetDoubleAt;
JVM_ConstantPoolGetFieldAt;
JVM_ConstantPoolGetFieldAtIfLoaded;
JVM_ConstantPoolGetFloatAt;
JVM_ConstantPoolGetIntAt;
JVM_ConstantPoolGetLongAt;
JVM_ConstantPoolGetMethodAt;
JVM_ConstantPoolGetMethodAtIfLoaded;
JVM_ConstantPoolGetMemberRefInfoAt;
JVM_ConstantPoolGetSize;
JVM_ConstantPoolGetStringAt;
JVM_ConstantPoolGetUTF8At;
JVM_CountStackFrames;
JVM_CurrentClassLoader;
JVM_CurrentLoadedClass;
JVM_CurrentThread;
JVM_CurrentTimeMillis;
JVM_DefineClass;
JVM_DefineClassWithSource;
JVM_DefineClassWithSourceCond;
JVM_DesiredAssertionStatus;
JVM_DisableCompiler;
JVM_DoPrivileged;
JVM_DTraceGetVersion;
JVM_DTraceActivate;
JVM_DTraceIsProbeEnabled;
JVM_DTraceIsSupported;
JVM_DTraceDispose;
JVM_DumpAllStacks;
JVM_DumpThreads;
JVM_EnableCompiler;
JVM_Exit;
JVM_FillInStackTrace;
JVM_FindClassFromClass;
JVM_FindClassFromClassLoader;
JVM_FindClassFromBootLoader;
JVM_FindLibraryEntry;
JVM_FindLoadedClass;
JVM_FindPrimitiveClass;
JVM_FindSignal;
JVM_FreeMemory;
JVM_GC;
JVM_GetAllThreads;
JVM_GetArrayElement;
JVM_GetArrayLength;
JVM_GetCPClassNameUTF;
JVM_GetCPFieldClassNameUTF;
JVM_GetCPFieldModifiers;
JVM_GetCPFieldNameUTF;
JVM_GetCPFieldSignatureUTF;
JVM_GetCPMethodClassNameUTF;
JVM_GetCPMethodModifiers;
JVM_GetCPMethodNameUTF;
JVM_GetCPMethodSignatureUTF;
JVM_GetCallerClass;
JVM_GetClassAccessFlags;
JVM_GetClassAnnotations;
JVM_GetClassCPEntriesCount;
JVM_GetClassCPTypes;
JVM_GetClassConstantPool;
JVM_GetClassContext;
JVM_GetClassDeclaredConstructors;
JVM_GetClassDeclaredFields;
JVM_GetClassDeclaredMethods;
JVM_GetClassFieldsCount;
JVM_GetClassInterfaces;
JVM_GetClassLoader;
JVM_GetClassMethodsCount;
JVM_GetClassModifiers;
JVM_GetClassName;
JVM_GetClassNameUTF;
JVM_GetClassSignature;
JVM_GetClassSigners;
JVM_GetClassTypeAnnotations;
JVM_GetComponentType;
JVM_GetDeclaredClasses;
JVM_GetDeclaringClass;
JVM_GetEnclosingMethodInfo;
JVM_GetFieldAnnotations;
JVM_GetFieldIxModifiers;
JVM_GetFieldTypeAnnotations;
JVM_GetHostName;
JVM_GetInheritedAccessControlContext;
JVM_GetInterfaceVersion;
JVM_GetLastErrorString;
JVM_GetManagement;
JVM_GetMethodAnnotations;
JVM_GetMethodDefaultAnnotationValue;
JVM_GetMethodIxArgsSize;
JVM_GetMethodIxByteCode;
JVM_GetMethodIxByteCodeLength;
JVM_GetMethodIxExceptionIndexes;
JVM_GetMethodIxExceptionTableEntry;
JVM_GetMethodIxExceptionTableLength;
JVM_GetMethodIxExceptionsCount;
JVM_GetMethodIxLocalsCount;
JVM_GetMethodIxMaxStack;
JVM_GetMethodIxModifiers;
JVM_GetMethodIxNameUTF;
JVM_GetMethodIxSignatureUTF;
JVM_GetMethodParameterAnnotations;
JVM_GetMethodParameters;
JVM_GetMethodTypeAnnotations;
JVM_GetPrimitiveArrayElement;
JVM_GetProtectionDomain;
JVM_GetSockName;
JVM_GetSockOpt;
JVM_GetStackAccessControlContext;
JVM_GetStackTraceDepth;
JVM_GetStackTraceElement;
JVM_GetSystemPackage;
JVM_GetSystemPackages;
JVM_GetThreadStateNames;
JVM_GetThreadStateValues;
JVM_GetVersionInfo;
JVM_Halt;
JVM_HoldsLock;
JVM_IHashCode;
JVM_InitAgentProperties;
JVM_InitProperties;
JVM_InitializeCompiler;
JVM_InitializeSocketLibrary;
JVM_InternString;
JVM_Interrupt;
JVM_InvokeMethod;
JVM_IsArrayClass;
JVM_IsConstructorIx;
JVM_IsInterface;
JVM_IsInterrupted;
JVM_IsNaN;
JVM_IsPrimitiveClass;
JVM_IsSameClassPackage;
JVM_IsSilentCompiler;
JVM_IsSupportedJNIVersion;
JVM_IsThreadAlive;
JVM_IsVMGeneratedMethodIx;
JVM_LatestUserDefinedLoader;
JVM_Listen;
JVM_LoadClass0;
JVM_LoadLibrary;
JVM_Lseek;
JVM_MaxObjectInspectionAge;
JVM_MaxMemory;
JVM_MonitorNotify;
JVM_MonitorNotifyAll;
JVM_MonitorWait;
JVM_NanoTime;
JVM_NativePath;
JVM_NewArray;
JVM_NewInstanceFromConstructor;
JVM_NewMultiArray;
JVM_OnExit;
JVM_Open;
JVM_RaiseSignal;
JVM_RawMonitorCreate;
JVM_RawMonitorDestroy;
JVM_RawMonitorEnter;
JVM_RawMonitorExit;
JVM_Read;
JVM_Recv;
JVM_RecvFrom;
JVM_RegisterSignal;
JVM_ReleaseUTF;
JVM_ResolveClass;
JVM_ResumeThread;
JVM_Send;
JVM_SendTo;
JVM_SetArrayElement;
JVM_SetClassSigners;
JVM_SetLength;
JVM_SetPrimitiveArrayElement;
JVM_SetProtectionDomain;
JVM_SetSockOpt;
JVM_SetThreadPriority;
JVM_Sleep;
JVM_Socket;
JVM_SocketAvailable;
JVM_SocketClose;
JVM_SocketShutdown;
JVM_StartThread;
JVM_StopThread;
JVM_SuspendThread;
JVM_SupportsCX8;
JVM_Sync;
JVM_Timeout;
JVM_TotalMemory;
JVM_TraceInstructions;
JVM_TraceMethodCalls;
JVM_UnloadLibrary;
JVM_Write;
JVM_Yield;
JVM_handle_bsd_signal;
# Old reflection routines
# These do not need to be present in the product build in JDK 1.4
# but their code has not been removed yet because there will not
# be a substantial code savings until JVM_InvokeMethod and
# JVM_NewInstanceFromConstructor can also be removed; see
# reflectionCompat.hpp.
JVM_GetClassConstructor;
JVM_GetClassConstructors;
JVM_GetClassField;
JVM_GetClassFields;
JVM_GetClassMethod;
JVM_GetClassMethods;
JVM_GetField;
JVM_GetPrimitiveField;
JVM_NewInstance;
JVM_SetField;
JVM_SetPrimitiveField;
# debug JVM
JVM_AccessVMBooleanFlag;
JVM_AccessVMIntFlag;
JVM_VMBreakPoint;
# debug _JVM
_JVM_AccessVMBooleanFlag
_JVM_AccessVMIntFlag
_JVM_VMBreakPoint
# miscellaneous functions
jio_fprintf;
jio_printf;
jio_snprintf;
jio_vfprintf;
jio_vsnprintf;
fork1;
numa_warn;
numa_error;
# Needed because there is no JVM interface for this.
sysThreadAvailableStackWithSlack;
_jio_fprintf
_jio_printf
_jio_snprintf
_jio_vfprintf
_jio_vsnprintf
# This is for Forte Analyzer profiling support.
AsyncGetCallTrace;
_AsyncGetCallTrace
# INSERT VTABLE SYMBOLS HERE
local:
*;
};

View File

@ -1,7 +1,3 @@
#
# @(#)mapfile-vers-product 1.19 08/02/12 10:56:37
#
#
# Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
@ -23,268 +19,238 @@
# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
# or visit www.oracle.com if you need additional information or have any
# questions.
#
#
#
# Only used for OSX/Darwin builds
# Define public interface.
# _JNI
_JNI_CreateJavaVM
_JNI_GetCreatedJavaVMs
_JNI_GetDefaultJavaVMInitArgs
SUNWprivate_1.1 {
global:
# JNI
JNI_CreateJavaVM;
JNI_GetCreatedJavaVMs;
JNI_GetDefaultJavaVMInitArgs;
# JVM
JVM_Accept;
JVM_ActiveProcessorCount;
JVM_AllocateNewArray;
JVM_AllocateNewObject;
JVM_ArrayCopy;
JVM_AssertionStatusDirectives;
JVM_Available;
JVM_Bind;
JVM_ClassDepth;
JVM_ClassLoaderDepth;
JVM_Clone;
JVM_Close;
JVM_CX8Field;
JVM_CompileClass;
JVM_CompileClasses;
JVM_CompilerCommand;
JVM_Connect;
JVM_ConstantPoolGetClassAt;
JVM_ConstantPoolGetClassAtIfLoaded;
JVM_ConstantPoolGetDoubleAt;
JVM_ConstantPoolGetFieldAt;
JVM_ConstantPoolGetFieldAtIfLoaded;
JVM_ConstantPoolGetFloatAt;
JVM_ConstantPoolGetIntAt;
JVM_ConstantPoolGetLongAt;
JVM_ConstantPoolGetMethodAt;
JVM_ConstantPoolGetMethodAtIfLoaded;
JVM_ConstantPoolGetMemberRefInfoAt;
JVM_ConstantPoolGetSize;
JVM_ConstantPoolGetStringAt;
JVM_ConstantPoolGetUTF8At;
JVM_CountStackFrames;
JVM_CurrentClassLoader;
JVM_CurrentLoadedClass;
JVM_CurrentThread;
JVM_CurrentTimeMillis;
JVM_DefineClass;
JVM_DefineClassWithSource;
JVM_DefineClassWithSourceCond;
JVM_DesiredAssertionStatus;
JVM_DisableCompiler;
JVM_DoPrivileged;
JVM_DTraceGetVersion;
JVM_DTraceActivate;
JVM_DTraceIsProbeEnabled;
JVM_DTraceIsSupported;
JVM_DTraceDispose;
JVM_DumpAllStacks;
JVM_DumpThreads;
JVM_EnableCompiler;
JVM_Exit;
JVM_FillInStackTrace;
JVM_FindClassFromClass;
JVM_FindClassFromClassLoader;
JVM_FindClassFromBootLoader;
JVM_FindLibraryEntry;
JVM_FindLoadedClass;
JVM_FindPrimitiveClass;
JVM_FindSignal;
JVM_FreeMemory;
JVM_GC;
JVM_GetAllThreads;
JVM_GetArrayElement;
JVM_GetArrayLength;
JVM_GetCPClassNameUTF;
JVM_GetCPFieldClassNameUTF;
JVM_GetCPFieldModifiers;
JVM_GetCPFieldNameUTF;
JVM_GetCPFieldSignatureUTF;
JVM_GetCPMethodClassNameUTF;
JVM_GetCPMethodModifiers;
JVM_GetCPMethodNameUTF;
JVM_GetCPMethodSignatureUTF;
JVM_GetCallerClass;
JVM_GetClassAccessFlags;
JVM_GetClassAnnotations;
JVM_GetClassCPEntriesCount;
JVM_GetClassCPTypes;
JVM_GetClassConstantPool;
JVM_GetClassContext;
JVM_GetClassDeclaredConstructors;
JVM_GetClassDeclaredFields;
JVM_GetClassDeclaredMethods;
JVM_GetClassFieldsCount;
JVM_GetClassInterfaces;
JVM_GetClassLoader;
JVM_GetClassMethodsCount;
JVM_GetClassModifiers;
JVM_GetClassName;
JVM_GetClassNameUTF;
JVM_GetClassSignature;
JVM_GetClassSigners;
JVM_GetClassTypeAnnotations;
JVM_GetComponentType;
JVM_GetDeclaredClasses;
JVM_GetDeclaringClass;
JVM_GetEnclosingMethodInfo;
JVM_GetFieldAnnotations;
JVM_GetFieldIxModifiers;
JVM_GetFieldTypeAnnotations;
JVM_GetHostName;
JVM_GetInheritedAccessControlContext;
JVM_GetInterfaceVersion;
JVM_GetLastErrorString;
JVM_GetManagement;
JVM_GetMethodAnnotations;
JVM_GetMethodDefaultAnnotationValue;
JVM_GetMethodIxArgsSize;
JVM_GetMethodIxByteCode;
JVM_GetMethodIxByteCodeLength;
JVM_GetMethodIxExceptionIndexes;
JVM_GetMethodIxExceptionTableEntry;
JVM_GetMethodIxExceptionTableLength;
JVM_GetMethodIxExceptionsCount;
JVM_GetMethodIxLocalsCount;
JVM_GetMethodIxMaxStack;
JVM_GetMethodIxModifiers;
JVM_GetMethodIxNameUTF;
JVM_GetMethodIxSignatureUTF;
JVM_GetMethodParameterAnnotations;
JVM_GetMethodParameters;
JVM_GetMethodTypeAnnotations;
JVM_GetPrimitiveArrayElement;
JVM_GetProtectionDomain;
JVM_GetSockName;
JVM_GetSockOpt;
JVM_GetStackAccessControlContext;
JVM_GetStackTraceDepth;
JVM_GetStackTraceElement;
JVM_GetSystemPackage;
JVM_GetSystemPackages;
JVM_GetThreadStateNames;
JVM_GetThreadStateValues;
JVM_GetVersionInfo;
JVM_Halt;
JVM_HoldsLock;
JVM_IHashCode;
JVM_InitAgentProperties;
JVM_InitProperties;
JVM_InitializeCompiler;
JVM_InitializeSocketLibrary;
JVM_InternString;
JVM_Interrupt;
JVM_InvokeMethod;
JVM_IsArrayClass;
JVM_IsConstructorIx;
JVM_IsInterface;
JVM_IsInterrupted;
JVM_IsNaN;
JVM_IsPrimitiveClass;
JVM_IsSameClassPackage;
JVM_IsSilentCompiler;
JVM_IsSupportedJNIVersion;
JVM_IsThreadAlive;
JVM_IsVMGeneratedMethodIx;
JVM_LatestUserDefinedLoader;
JVM_Listen;
JVM_LoadClass0;
JVM_LoadLibrary;
JVM_Lseek;
JVM_MaxObjectInspectionAge;
JVM_MaxMemory;
JVM_MonitorNotify;
JVM_MonitorNotifyAll;
JVM_MonitorWait;
JVM_NanoTime;
JVM_NativePath;
JVM_NewArray;
JVM_NewInstanceFromConstructor;
JVM_NewMultiArray;
JVM_OnExit;
JVM_Open;
JVM_RaiseSignal;
JVM_RawMonitorCreate;
JVM_RawMonitorDestroy;
JVM_RawMonitorEnter;
JVM_RawMonitorExit;
JVM_Read;
JVM_Recv;
JVM_RecvFrom;
JVM_RegisterSignal;
JVM_ReleaseUTF;
JVM_ResolveClass;
JVM_ResumeThread;
JVM_Send;
JVM_SendTo;
JVM_SetArrayElement;
JVM_SetClassSigners;
JVM_SetLength;
JVM_SetPrimitiveArrayElement;
JVM_SetProtectionDomain;
JVM_SetSockOpt;
JVM_SetThreadPriority;
JVM_Sleep;
JVM_Socket;
JVM_SocketAvailable;
JVM_SocketClose;
JVM_SocketShutdown;
JVM_StartThread;
JVM_StopThread;
JVM_SuspendThread;
JVM_SupportsCX8;
JVM_Sync;
JVM_Timeout;
JVM_TotalMemory;
JVM_TraceInstructions;
JVM_TraceMethodCalls;
JVM_UnloadLibrary;
JVM_Write;
JVM_Yield;
JVM_handle_bsd_signal;
# Old reflection routines
# These do not need to be present in the product build in JDK 1.4
# but their code has not been removed yet because there will not
# be a substantial code savings until JVM_InvokeMethod and
# JVM_NewInstanceFromConstructor can also be removed; see
# reflectionCompat.hpp.
JVM_GetClassConstructor;
JVM_GetClassConstructors;
JVM_GetClassField;
JVM_GetClassFields;
JVM_GetClassMethod;
JVM_GetClassMethods;
JVM_GetField;
JVM_GetPrimitiveField;
JVM_NewInstance;
JVM_SetField;
JVM_SetPrimitiveField;
# _JVM
_JVM_Accept
_JVM_ActiveProcessorCount
_JVM_AllocateNewArray
_JVM_AllocateNewObject
_JVM_ArrayCopy
_JVM_AssertionStatusDirectives
_JVM_Available
_JVM_Bind
_JVM_ClassDepth
_JVM_ClassLoaderDepth
_JVM_Clone
_JVM_Close
_JVM_CX8Field
_JVM_CompileClass
_JVM_CompileClasses
_JVM_CompilerCommand
_JVM_Connect
_JVM_ConstantPoolGetClassAt
_JVM_ConstantPoolGetClassAtIfLoaded
_JVM_ConstantPoolGetDoubleAt
_JVM_ConstantPoolGetFieldAt
_JVM_ConstantPoolGetFieldAtIfLoaded
_JVM_ConstantPoolGetFloatAt
_JVM_ConstantPoolGetIntAt
_JVM_ConstantPoolGetLongAt
_JVM_ConstantPoolGetMethodAt
_JVM_ConstantPoolGetMethodAtIfLoaded
_JVM_ConstantPoolGetMemberRefInfoAt
_JVM_ConstantPoolGetSize
_JVM_ConstantPoolGetStringAt
_JVM_ConstantPoolGetUTF8At
_JVM_CountStackFrames
_JVM_CurrentClassLoader
_JVM_CurrentLoadedClass
_JVM_CurrentThread
_JVM_CurrentTimeMillis
_JVM_DefineClass
_JVM_DefineClassWithSource
_JVM_DefineClassWithSourceCond
_JVM_DesiredAssertionStatus
_JVM_DisableCompiler
_JVM_DoPrivileged
_JVM_DTraceGetVersion
_JVM_DTraceActivate
_JVM_DTraceIsProbeEnabled
_JVM_DTraceIsSupported
_JVM_DTraceDispose
_JVM_DumpAllStacks
_JVM_DumpThreads
_JVM_EnableCompiler
_JVM_Exit
_JVM_FillInStackTrace
_JVM_FindClassFromClass
_JVM_FindClassFromClassLoader
_JVM_FindClassFromBootLoader
_JVM_FindLibraryEntry
_JVM_FindLoadedClass
_JVM_FindPrimitiveClass
_JVM_FindSignal
_JVM_FreeMemory
_JVM_GC
_JVM_GetAllThreads
_JVM_GetArrayElement
_JVM_GetArrayLength
_JVM_GetCPClassNameUTF
_JVM_GetCPFieldClassNameUTF
_JVM_GetCPFieldModifiers
_JVM_GetCPFieldNameUTF
_JVM_GetCPFieldSignatureUTF
_JVM_GetCPMethodClassNameUTF
_JVM_GetCPMethodModifiers
_JVM_GetCPMethodNameUTF
_JVM_GetCPMethodSignatureUTF
_JVM_GetCallerClass
_JVM_GetClassAccessFlags
_JVM_GetClassAnnotations
_JVM_GetClassCPEntriesCount
_JVM_GetClassCPTypes
_JVM_GetClassConstantPool
_JVM_GetClassContext
_JVM_GetClassDeclaredConstructors
_JVM_GetClassDeclaredFields
_JVM_GetClassDeclaredMethods
_JVM_GetClassFieldsCount
_JVM_GetClassInterfaces
_JVM_GetClassLoader
_JVM_GetClassMethodsCount
_JVM_GetClassModifiers
_JVM_GetClassName
_JVM_GetClassNameUTF
_JVM_GetClassSignature
_JVM_GetClassSigners
_JVM_GetClassTypeAnnotations
_JVM_GetComponentType
_JVM_GetDeclaredClasses
_JVM_GetDeclaringClass
_JVM_GetEnclosingMethodInfo
_JVM_GetFieldAnnotations
_JVM_GetFieldIxModifiers
_JVM_GetFieldTypeAnnotations
_JVM_GetHostName
_JVM_GetInheritedAccessControlContext
_JVM_GetInterfaceVersion
_JVM_GetLastErrorString
_JVM_GetManagement
_JVM_GetMethodAnnotations
_JVM_GetMethodDefaultAnnotationValue
_JVM_GetMethodIxArgsSize
_JVM_GetMethodIxByteCode
_JVM_GetMethodIxByteCodeLength
_JVM_GetMethodIxExceptionIndexes
_JVM_GetMethodIxExceptionTableEntry
_JVM_GetMethodIxExceptionTableLength
_JVM_GetMethodIxExceptionsCount
_JVM_GetMethodIxLocalsCount
_JVM_GetMethodIxMaxStack
_JVM_GetMethodIxModifiers
_JVM_GetMethodIxNameUTF
_JVM_GetMethodIxSignatureUTF
_JVM_GetMethodParameterAnnotations
_JVM_GetMethodParameters
_JVM_GetMethodTypeAnnotations
_JVM_GetPrimitiveArrayElement
_JVM_GetProtectionDomain
_JVM_GetSockName
_JVM_GetSockOpt
_JVM_GetStackAccessControlContext
_JVM_GetStackTraceDepth
_JVM_GetStackTraceElement
_JVM_GetSystemPackage
_JVM_GetSystemPackages
_JVM_GetThreadStateNames
_JVM_GetThreadStateValues
_JVM_GetVersionInfo
_JVM_Halt
_JVM_HoldsLock
_JVM_IHashCode
_JVM_InitAgentProperties
_JVM_InitProperties
_JVM_InitializeCompiler
_JVM_InitializeSocketLibrary
_JVM_InternString
_JVM_Interrupt
_JVM_InvokeMethod
_JVM_IsArrayClass
_JVM_IsConstructorIx
_JVM_IsInterface
_JVM_IsInterrupted
_JVM_IsNaN
_JVM_IsPrimitiveClass
_JVM_IsSameClassPackage
_JVM_IsSilentCompiler
_JVM_IsSupportedJNIVersion
_JVM_IsThreadAlive
_JVM_IsVMGeneratedMethodIx
_JVM_LatestUserDefinedLoader
_JVM_Listen
_JVM_LoadClass0
_JVM_LoadLibrary
_JVM_Lseek
_JVM_MaxObjectInspectionAge
_JVM_MaxMemory
_JVM_MonitorNotify
_JVM_MonitorNotifyAll
_JVM_MonitorWait
_JVM_NanoTime
_JVM_NativePath
_JVM_NewArray
_JVM_NewInstanceFromConstructor
_JVM_NewMultiArray
_JVM_OnExit
_JVM_Open
_JVM_RaiseSignal
_JVM_RawMonitorCreate
_JVM_RawMonitorDestroy
_JVM_RawMonitorEnter
_JVM_RawMonitorExit
_JVM_Read
_JVM_Recv
_JVM_RecvFrom
_JVM_RegisterSignal
_JVM_ReleaseUTF
_JVM_ResolveClass
_JVM_ResumeThread
_JVM_Send
_JVM_SendTo
_JVM_SetArrayElement
_JVM_SetClassSigners
_JVM_SetLength
_JVM_SetNativeThreadName
_JVM_SetPrimitiveArrayElement
_JVM_SetSockOpt
_JVM_SetThreadPriority
_JVM_Sleep
_JVM_Socket
_JVM_SocketAvailable
_JVM_SocketClose
_JVM_SocketShutdown
_JVM_StartThread
_JVM_StopThread
_JVM_SuspendThread
_JVM_SupportsCX8
_JVM_Sync
_JVM_Timeout
_JVM_TotalMemory
_JVM_TraceInstructions
_JVM_TraceMethodCalls
_JVM_UnloadLibrary
_JVM_Write
_JVM_Yield
_JVM_handle_bsd_signal
# miscellaneous functions
jio_fprintf;
jio_printf;
jio_snprintf;
jio_vfprintf;
jio_vsnprintf;
fork1;
numa_warn;
numa_error;
# Needed because there is no JVM interface for this.
sysThreadAvailableStackWithSlack;
_jio_fprintf
_jio_printf
_jio_snprintf
_jio_vfprintf
_jio_vsnprintf
# This is for Forte Analyzer profiling support.
AsyncGetCallTrace;
_AsyncGetCallTrace
# INSERT VTABLE SYMBOLS HERE
local:
*;
};
# INSERT VTABLE SYMBOLS HERE

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@ -112,3 +112,5 @@ ifeq ($(INCLUDE_NMT), false)
endif
-include $(HS_ALT_MAKE)/excludeSrc.make
.PHONY: $(HS_ALT_MAKE)/excludeSrc.make

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@ -35,7 +35,7 @@ HOTSPOT_VM_COPYRIGHT=Copyright 2013
HS_MAJOR_VER=25
HS_MINOR_VER=0
HS_BUILD_NUMBER=37
HS_BUILD_NUMBER=41
JDK_MAJOR_VER=1
JDK_MINOR_VER=8

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@ -214,7 +214,7 @@ ifeq ($(USE_CLANG), true)
WARNINGS_ARE_ERRORS += -Wno-return-type -Wno-empty-body
endif
WARNING_FLAGS = -Wpointer-arith -Wsign-compare -Wundef -Wunused-function
WARNING_FLAGS = -Wpointer-arith -Wsign-compare -Wundef -Wunused-function -Wunused-value
ifeq ($(USE_CLANG),)
# Since GCC 4.3, -Wconversion has changed its meanings to warn these implicit
@ -350,9 +350,9 @@ else
ifeq ($(DEBUG_CFLAGS/$(BUILDARCH)),)
ifeq ($(USE_CLANG), true)
# Clang doesn't understand -gstabs
OPT_CFLAGS += -g
DEBUG_CFLAGS += -g
else
OPT_CFLAGS += -gstabs
DEBUG_CFLAGS += -gstabs
endif
endif
@ -365,9 +365,9 @@ else
ifeq ($(FASTDEBUG_CFLAGS/$(BUILDARCH)),)
ifeq ($(USE_CLANG), true)
# Clang doesn't understand -gstabs
OPT_CFLAGS += -g
FASTDEBUG_CFLAGS += -g
else
OPT_CFLAGS += -gstabs
FASTDEBUG_CFLAGS += -gstabs
endif
endif

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@ -223,7 +223,6 @@ SUNWprivate_1.1 {
JVM_SetLength;
JVM_SetNativeThreadName;
JVM_SetPrimitiveArrayElement;
JVM_SetProtectionDomain;
JVM_SetSockOpt;
JVM_SetThreadPriority;
JVM_Sleep;

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@ -223,7 +223,6 @@ SUNWprivate_1.1 {
JVM_SetLength;
JVM_SetNativeThreadName;
JVM_SetPrimitiveArrayElement;
JVM_SetProtectionDomain;
JVM_SetSockOpt;
JVM_SetThreadPriority;
JVM_Sleep;

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@ -107,6 +107,10 @@ CXXFLAGS/BYFILE = $(CXXFLAGS/$@)
# File specific flags
CXXFLAGS += $(CXXFLAGS/BYFILE)
# Large File Support
ifneq ($(LP64), 1)
CXXFLAGS/ostream.o += -D_FILE_OFFSET_BITS=64
endif # ifneq ($(LP64), 1)
# CFLAGS_WARN holds compiler options to suppress/enable warnings.
CFLAGS += $(CFLAGS_WARN/BYFILE)

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@ -223,7 +223,6 @@ SUNWprivate_1.1 {
JVM_SetLength;
JVM_SetNativeThreadName;
JVM_SetPrimitiveArrayElement;
JVM_SetProtectionDomain;
JVM_SetSockOpt;
JVM_SetThreadPriority;
JVM_Sleep;

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@ -95,6 +95,10 @@ CXXFLAGS/BYFILE = $(CXXFLAGS/$@)
# File specific flags
CXXFLAGS += $(CXXFLAGS/BYFILE)
# Large File Support
ifneq ($(LP64), 1)
CXXFLAGS/ostream.o += -D_FILE_OFFSET_BITS=64
endif # ifneq ($(LP64), 1)
# CFLAGS_WARN holds compiler options to suppress/enable warnings.
CFLAGS += $(CFLAGS_WARN)

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@ -57,7 +57,6 @@ class Assembler : public AbstractAssembler {
fbp_op2 = 5,
br_op2 = 2,
bp_op2 = 1,
cb_op2 = 7, // V8
sethi_op2 = 4
};
@ -145,7 +144,6 @@ class Assembler : public AbstractAssembler {
ldsh_op3 = 0x0a,
ldx_op3 = 0x0b,
ldstub_op3 = 0x0d,
stx_op3 = 0x0e,
swap_op3 = 0x0f,
@ -163,15 +161,6 @@ class Assembler : public AbstractAssembler {
prefetch_op3 = 0x2d,
ldc_op3 = 0x30,
ldcsr_op3 = 0x31,
lddc_op3 = 0x33,
stc_op3 = 0x34,
stcsr_op3 = 0x35,
stdcq_op3 = 0x36,
stdc_op3 = 0x37,
casa_op3 = 0x3c,
casxa_op3 = 0x3e,
@ -574,17 +563,11 @@ class Assembler : public AbstractAssembler {
static void vis3_only() { assert( VM_Version::has_vis3(), "This instruction only works on SPARC with VIS3"); }
// instruction only in v9
static void v9_only() { assert( VM_Version::v9_instructions_work(), "This instruction only works on SPARC V9"); }
// instruction only in v8
static void v8_only() { assert( VM_Version::v8_instructions_work(), "This instruction only works on SPARC V8"); }
static void v9_only() { } // do nothing
// instruction deprecated in v9
static void v9_dep() { } // do nothing for now
// some float instructions only exist for single prec. on v8
static void v8_s_only(FloatRegisterImpl::Width w) { if (w != FloatRegisterImpl::S) v9_only(); }
// v8 has no CC field
static void v8_no_cc(CC cc) { if (cc) v9_only(); }
@ -730,11 +713,6 @@ public:
inline void bp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
inline void bp( Condition c, bool a, CC cc, Predict p, Label& L );
// pp 121 (V8)
inline void cb( Condition c, bool a, address d, relocInfo::relocType rt = relocInfo::none );
inline void cb( Condition c, bool a, Label& L );
// pp 149
inline void call( address d, relocInfo::relocType rt = relocInfo::runtime_call_type );
@ -775,8 +753,8 @@ public:
// pp 157
void fcmp( FloatRegisterImpl::Width w, CC cc, FloatRegister s1, FloatRegister s2) { v8_no_cc(cc); emit_int32( op(arith_op) | cmpcc(cc) | op3(fpop2_op3) | fs1(s1, w) | opf(0x50 + w) | fs2(s2, w)); }
void fcmpe( FloatRegisterImpl::Width w, CC cc, FloatRegister s1, FloatRegister s2) { v8_no_cc(cc); emit_int32( op(arith_op) | cmpcc(cc) | op3(fpop2_op3) | fs1(s1, w) | opf(0x54 + w) | fs2(s2, w)); }
void fcmp( FloatRegisterImpl::Width w, CC cc, FloatRegister s1, FloatRegister s2) { emit_int32( op(arith_op) | cmpcc(cc) | op3(fpop2_op3) | fs1(s1, w) | opf(0x50 + w) | fs2(s2, w)); }
void fcmpe( FloatRegisterImpl::Width w, CC cc, FloatRegister s1, FloatRegister s2) { emit_int32( op(arith_op) | cmpcc(cc) | op3(fpop2_op3) | fs1(s1, w) | opf(0x54 + w) | fs2(s2, w)); }
// pp 159
@ -794,21 +772,11 @@ public:
// pp 162
void fmov( FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d ) { v8_s_only(w); emit_int32( op(arith_op) | fd(d, w) | op3(fpop1_op3) | opf(0x00 + w) | fs2(s, w)); }
void fmov( FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d ) { emit_int32( op(arith_op) | fd(d, w) | op3(fpop1_op3) | opf(0x00 + w) | fs2(s, w)); }
void fneg( FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d ) { v8_s_only(w); emit_int32( op(arith_op) | fd(d, w) | op3(fpop1_op3) | opf(0x04 + w) | fs2(s, w)); }
void fneg( FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d ) { emit_int32( op(arith_op) | fd(d, w) | op3(fpop1_op3) | opf(0x04 + w) | fs2(s, w)); }
// page 144 sparc v8 architecture (double prec works on v8 if the source and destination registers are the same). fnegs is the only instruction available
// on v8 to do negation of single, double and quad precision floats.
void fneg( FloatRegisterImpl::Width w, FloatRegister sd ) { if (VM_Version::v9_instructions_work()) emit_int32( op(arith_op) | fd(sd, w) | op3(fpop1_op3) | opf(0x04 + w) | fs2(sd, w)); else emit_int32( op(arith_op) | fd(sd, w) | op3(fpop1_op3) | opf(0x05) | fs2(sd, w)); }
void fabs( FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d ) { v8_s_only(w); emit_int32( op(arith_op) | fd(d, w) | op3(fpop1_op3) | opf(0x08 + w) | fs2(s, w)); }
// page 144 sparc v8 architecture (double prec works on v8 if the source and destination registers are the same). fabss is the only instruction available
// on v8 to do abs operation on single/double/quad precision floats.
void fabs( FloatRegisterImpl::Width w, FloatRegister sd ) { if (VM_Version::v9_instructions_work()) emit_int32( op(arith_op) | fd(sd, w) | op3(fpop1_op3) | opf(0x08 + w) | fs2(sd, w)); else emit_int32( op(arith_op) | fd(sd, w) | op3(fpop1_op3) | opf(0x09) | fs2(sd, w)); }
void fabs( FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d ) { emit_int32( op(arith_op) | fd(d, w) | op3(fpop1_op3) | opf(0x08 + w) | fs2(s, w)); }
// pp 163
@ -839,11 +807,6 @@ public:
void impdep1( int id1, int const19a ) { v9_only(); emit_int32( op(arith_op) | fcn(id1) | op3(impdep1_op3) | u_field(const19a, 18, 0)); }
void impdep2( int id1, int const19a ) { v9_only(); emit_int32( op(arith_op) | fcn(id1) | op3(impdep2_op3) | u_field(const19a, 18, 0)); }
// pp 149 (v8)
void cpop1( int opc, int cr1, int cr2, int crd ) { v8_only(); emit_int32( op(arith_op) | fcn(crd) | op3(impdep1_op3) | u_field(cr1, 18, 14) | opf(opc) | u_field(cr2, 4, 0)); }
void cpop2( int opc, int cr1, int cr2, int crd ) { v8_only(); emit_int32( op(arith_op) | fcn(crd) | op3(impdep2_op3) | u_field(cr1, 18, 14) | opf(opc) | u_field(cr2, 4, 0)); }
// pp 170
void jmpl( Register s1, Register s2, Register d );
@ -860,16 +823,6 @@ public:
inline void ldxfsr( Register s1, Register s2 );
inline void ldxfsr( Register s1, int simm13a);
// pp 94 (v8)
inline void ldc( Register s1, Register s2, int crd );
inline void ldc( Register s1, int simm13a, int crd);
inline void lddc( Register s1, Register s2, int crd );
inline void lddc( Register s1, int simm13a, int crd);
inline void ldcsr( Register s1, Register s2, int crd );
inline void ldcsr( Register s1, int simm13a, int crd);
// 173
void ldfa( FloatRegisterImpl::Width w, Register s1, Register s2, int ia, FloatRegister d ) { v9_only(); emit_int32( op(ldst_op) | fd(d, w) | alt_op3(ldf_op3 | alt_bit_op3, w) | rs1(s1) | imm_asi(ia) | rs2(s2) ); }
@ -910,18 +863,6 @@ public:
void lduwa( Register s1, int simm13a, Register d ) { emit_int32( op(ldst_op) | rd(d) | op3(lduw_op3 | alt_bit_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
void ldxa( Register s1, Register s2, int ia, Register d ) { v9_only(); emit_int32( op(ldst_op) | rd(d) | op3(ldx_op3 | alt_bit_op3) | rs1(s1) | imm_asi(ia) | rs2(s2) ); }
void ldxa( Register s1, int simm13a, Register d ) { v9_only(); emit_int32( op(ldst_op) | rd(d) | op3(ldx_op3 | alt_bit_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
void ldda( Register s1, Register s2, int ia, Register d ) { v9_dep(); emit_int32( op(ldst_op) | rd(d) | op3(ldd_op3 | alt_bit_op3) | rs1(s1) | imm_asi(ia) | rs2(s2) ); }
void ldda( Register s1, int simm13a, Register d ) { v9_dep(); emit_int32( op(ldst_op) | rd(d) | op3(ldd_op3 | alt_bit_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
// pp 179
inline void ldstub( Register s1, Register s2, Register d );
inline void ldstub( Register s1, int simm13a, Register d);
// pp 180
void ldstuba( Register s1, Register s2, int ia, Register d ) { emit_int32( op(ldst_op) | rd(d) | op3(ldstub_op3 | alt_bit_op3) | rs1(s1) | imm_asi(ia) | rs2(s2) ); }
void ldstuba( Register s1, int simm13a, Register d ) { emit_int32( op(ldst_op) | rd(d) | op3(ldstub_op3 | alt_bit_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
// pp 181
@ -992,11 +933,6 @@ public:
void smulcc( Register s1, Register s2, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(smul_op3 | cc_bit_op3) | rs1(s1) | rs2(s2) ); }
void smulcc( Register s1, int simm13a, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(smul_op3 | cc_bit_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
// pp 199
void mulscc( Register s1, Register s2, Register d ) { v9_dep(); emit_int32( op(arith_op) | rd(d) | op3(mulscc_op3) | rs1(s1) | rs2(s2) ); }
void mulscc( Register s1, int simm13a, Register d ) { v9_dep(); emit_int32( op(arith_op) | rd(d) | op3(mulscc_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
// pp 201
void nop() { emit_int32( op(branch_op) | op2(sethi_op2) ); }
@ -1116,17 +1052,6 @@ public:
void stda( Register d, Register s1, Register s2, int ia ) { emit_int32( op(ldst_op) | rd(d) | op3(std_op3 | alt_bit_op3) | rs1(s1) | imm_asi(ia) | rs2(s2) ); }
void stda( Register d, Register s1, int simm13a ) { emit_int32( op(ldst_op) | rd(d) | op3(std_op3 | alt_bit_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
// pp 97 (v8)
inline void stc( int crd, Register s1, Register s2 );
inline void stc( int crd, Register s1, int simm13a);
inline void stdc( int crd, Register s1, Register s2 );
inline void stdc( int crd, Register s1, int simm13a);
inline void stcsr( int crd, Register s1, Register s2 );
inline void stcsr( int crd, Register s1, int simm13a);
inline void stdcq( int crd, Register s1, Register s2 );
inline void stdcq( int crd, Register s1, int simm13a);
// pp 230
void sub( Register s1, Register s2, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(sub_op3 ) | rs1(s1) | rs2(s2) ); }
@ -1153,20 +1078,16 @@ public:
void taddcc( Register s1, Register s2, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(taddcc_op3 ) | rs1(s1) | rs2(s2) ); }
void taddcc( Register s1, int simm13a, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(taddcc_op3 ) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
void taddcctv( Register s1, Register s2, Register d ) { v9_dep(); emit_int32( op(arith_op) | rd(d) | op3(taddcctv_op3) | rs1(s1) | rs2(s2) ); }
void taddcctv( Register s1, int simm13a, Register d ) { v9_dep(); emit_int32( op(arith_op) | rd(d) | op3(taddcctv_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
// pp 235
void tsubcc( Register s1, Register s2, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(tsubcc_op3 ) | rs1(s1) | rs2(s2) ); }
void tsubcc( Register s1, int simm13a, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(tsubcc_op3 ) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
void tsubcctv( Register s1, Register s2, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(tsubcctv_op3) | rs1(s1) | rs2(s2) ); }
void tsubcctv( Register s1, int simm13a, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(tsubcctv_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
// pp 237
void trap( Condition c, CC cc, Register s1, Register s2 ) { v8_no_cc(cc); emit_int32( op(arith_op) | cond(c) | op3(trap_op3) | rs1(s1) | trapcc(cc) | rs2(s2)); }
void trap( Condition c, CC cc, Register s1, int trapa ) { v8_no_cc(cc); emit_int32( op(arith_op) | cond(c) | op3(trap_op3) | rs1(s1) | trapcc(cc) | immed(true) | u_field(trapa, 6, 0)); }
void trap( Condition c, CC cc, Register s1, Register s2 ) { emit_int32( op(arith_op) | cond(c) | op3(trap_op3) | rs1(s1) | trapcc(cc) | rs2(s2)); }
void trap( Condition c, CC cc, Register s1, int trapa ) { emit_int32( op(arith_op) | cond(c) | op3(trap_op3) | rs1(s1) | trapcc(cc) | immed(true) | u_field(trapa, 6, 0)); }
// simple uncond. trap
void trap( int trapa ) { trap( always, icc, G0, trapa ); }

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@ -63,9 +63,6 @@ inline void Assembler::fb( Condition c, bool a, Label& L ) { fb(c, a, target(L))
inline void Assembler::fbp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt ) { v9_only(); cti(); emit_data( op(branch_op) | annul(a) | cond(c) | op2(fbp_op2) | branchcc(cc) | predict(p) | wdisp(intptr_t(d), intptr_t(pc()), 19), rt); has_delay_slot(); }
inline void Assembler::fbp( Condition c, bool a, CC cc, Predict p, Label& L ) { fbp(c, a, cc, p, target(L)); }
inline void Assembler::cb( Condition c, bool a, address d, relocInfo::relocType rt ) { v8_only(); cti(); emit_data( op(branch_op) | annul(a) | cond(c) | op2(cb_op2) | wdisp(intptr_t(d), intptr_t(pc()), 22), rt); has_delay_slot(); }
inline void Assembler::cb( Condition c, bool a, Label& L ) { cb(c, a, target(L)); }
inline void Assembler::br( Condition c, bool a, address d, relocInfo::relocType rt ) { v9_dep(); cti(); emit_data( op(branch_op) | annul(a) | cond(c) | op2(br_op2) | wdisp(intptr_t(d), intptr_t(pc()), 22), rt); has_delay_slot(); }
inline void Assembler::br( Condition c, bool a, Label& L ) { br(c, a, target(L)); }
@ -88,18 +85,9 @@ inline void Assembler::jmpl( Register s1, int simm13a, Register d, RelocationHol
inline void Assembler::ldf(FloatRegisterImpl::Width w, Register s1, Register s2, FloatRegister d) { emit_int32( op(ldst_op) | fd(d, w) | alt_op3(ldf_op3, w) | rs1(s1) | rs2(s2) ); }
inline void Assembler::ldf(FloatRegisterImpl::Width w, Register s1, int simm13a, FloatRegister d, RelocationHolder const& rspec) { emit_data( op(ldst_op) | fd(d, w) | alt_op3(ldf_op3, w) | rs1(s1) | immed(true) | simm(simm13a, 13), rspec); }
inline void Assembler::ldfsr( Register s1, Register s2) { v9_dep(); emit_int32( op(ldst_op) | op3(ldfsr_op3) | rs1(s1) | rs2(s2) ); }
inline void Assembler::ldfsr( Register s1, int simm13a) { v9_dep(); emit_data( op(ldst_op) | op3(ldfsr_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
inline void Assembler::ldxfsr( Register s1, Register s2) { v9_only(); emit_int32( op(ldst_op) | rd(G1) | op3(ldfsr_op3) | rs1(s1) | rs2(s2) ); }
inline void Assembler::ldxfsr( Register s1, int simm13a) { v9_only(); emit_data( op(ldst_op) | rd(G1) | op3(ldfsr_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
inline void Assembler::ldc( Register s1, Register s2, int crd) { v8_only(); emit_int32( op(ldst_op) | fcn(crd) | op3(ldc_op3 ) | rs1(s1) | rs2(s2) ); }
inline void Assembler::ldc( Register s1, int simm13a, int crd) { v8_only(); emit_data( op(ldst_op) | fcn(crd) | op3(ldc_op3 ) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
inline void Assembler::lddc( Register s1, Register s2, int crd) { v8_only(); emit_int32( op(ldst_op) | fcn(crd) | op3(lddc_op3 ) | rs1(s1) | rs2(s2) ); }
inline void Assembler::lddc( Register s1, int simm13a, int crd) { v8_only(); emit_data( op(ldst_op) | fcn(crd) | op3(lddc_op3 ) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
inline void Assembler::ldcsr( Register s1, Register s2, int crd) { v8_only(); emit_int32( op(ldst_op) | fcn(crd) | op3(ldcsr_op3) | rs1(s1) | rs2(s2) ); }
inline void Assembler::ldcsr( Register s1, int simm13a, int crd) { v8_only(); emit_data( op(ldst_op) | fcn(crd) | op3(ldcsr_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
inline void Assembler::ldsb( Register s1, Register s2, Register d) { emit_int32( op(ldst_op) | rd(d) | op3(ldsb_op3) | rs1(s1) | rs2(s2) ); }
inline void Assembler::ldsb( Register s1, int simm13a, Register d) { emit_data( op(ldst_op) | rd(d) | op3(ldsb_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
@ -119,9 +107,6 @@ inline void Assembler::ldx( Register s1, int simm13a, Register d) { v9_only();
inline void Assembler::ldd( Register s1, Register s2, Register d) { v9_dep(); assert(d->is_even(), "not even"); emit_int32( op(ldst_op) | rd(d) | op3(ldd_op3) | rs1(s1) | rs2(s2) ); }
inline void Assembler::ldd( Register s1, int simm13a, Register d) { v9_dep(); assert(d->is_even(), "not even"); emit_data( op(ldst_op) | rd(d) | op3(ldd_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
inline void Assembler::ldstub( Register s1, Register s2, Register d) { emit_int32( op(ldst_op) | rd(d) | op3(ldstub_op3) | rs1(s1) | rs2(s2) ); }
inline void Assembler::ldstub( Register s1, int simm13a, Register d) { emit_data( op(ldst_op) | rd(d) | op3(ldstub_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
inline void Assembler::rett( Register s1, Register s2 ) { cti(); emit_int32( op(arith_op) | op3(rett_op3) | rs1(s1) | rs2(s2)); has_delay_slot(); }
inline void Assembler::rett( Register s1, int simm13a, relocInfo::relocType rt) { cti(); emit_data( op(arith_op) | op3(rett_op3) | rs1(s1) | immed(true) | simm(simm13a, 13), rt); has_delay_slot(); }
@ -132,8 +117,6 @@ inline void Assembler::sethi( int imm22a, Register d, RelocationHolder const& rs
inline void Assembler::stf( FloatRegisterImpl::Width w, FloatRegister d, Register s1, Register s2) { emit_int32( op(ldst_op) | fd(d, w) | alt_op3(stf_op3, w) | rs1(s1) | rs2(s2) ); }
inline void Assembler::stf( FloatRegisterImpl::Width w, FloatRegister d, Register s1, int simm13a) { emit_data( op(ldst_op) | fd(d, w) | alt_op3(stf_op3, w) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
inline void Assembler::stfsr( Register s1, Register s2) { v9_dep(); emit_int32( op(ldst_op) | op3(stfsr_op3) | rs1(s1) | rs2(s2) ); }
inline void Assembler::stfsr( Register s1, int simm13a) { v9_dep(); emit_data( op(ldst_op) | op3(stfsr_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
inline void Assembler::stxfsr( Register s1, Register s2) { v9_only(); emit_int32( op(ldst_op) | rd(G1) | op3(stfsr_op3) | rs1(s1) | rs2(s2) ); }
inline void Assembler::stxfsr( Register s1, int simm13a) { v9_only(); emit_data( op(ldst_op) | rd(G1) | op3(stfsr_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
@ -152,17 +135,6 @@ inline void Assembler::stx( Register d, Register s1, int simm13a) { v9_only();
inline void Assembler::std( Register d, Register s1, Register s2) { v9_dep(); assert(d->is_even(), "not even"); emit_int32( op(ldst_op) | rd(d) | op3(std_op3) | rs1(s1) | rs2(s2) ); }
inline void Assembler::std( Register d, Register s1, int simm13a) { v9_dep(); assert(d->is_even(), "not even"); emit_data( op(ldst_op) | rd(d) | op3(std_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
// v8 p 99
inline void Assembler::stc( int crd, Register s1, Register s2) { v8_only(); emit_int32( op(ldst_op) | fcn(crd) | op3(stc_op3 ) | rs1(s1) | rs2(s2) ); }
inline void Assembler::stc( int crd, Register s1, int simm13a) { v8_only(); emit_data( op(ldst_op) | fcn(crd) | op3(stc_op3 ) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
inline void Assembler::stdc( int crd, Register s1, Register s2) { v8_only(); emit_int32( op(ldst_op) | fcn(crd) | op3(stdc_op3) | rs1(s1) | rs2(s2) ); }
inline void Assembler::stdc( int crd, Register s1, int simm13a) { v8_only(); emit_data( op(ldst_op) | fcn(crd) | op3(stdc_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
inline void Assembler::stcsr( int crd, Register s1, Register s2) { v8_only(); emit_int32( op(ldst_op) | fcn(crd) | op3(stcsr_op3) | rs1(s1) | rs2(s2) ); }
inline void Assembler::stcsr( int crd, Register s1, int simm13a) { v8_only(); emit_data( op(ldst_op) | fcn(crd) | op3(stcsr_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
inline void Assembler::stdcq( int crd, Register s1, Register s2) { v8_only(); emit_int32( op(ldst_op) | fcn(crd) | op3(stdcq_op3) | rs1(s1) | rs2(s2) ); }
inline void Assembler::stdcq( int crd, Register s1, int simm13a) { v8_only(); emit_data( op(ldst_op) | fcn(crd) | op3(stdcq_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
// pp 231
inline void Assembler::swap( Register s1, Register s2, Register d) { v9_dep(); emit_int32( op(ldst_op) | rd(d) | op3(swap_op3) | rs1(s1) | rs2(s2) ); }

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -597,13 +597,6 @@ void LIR_Assembler::emit_op3(LIR_Op3* op) {
__ sra(Rdividend, 31, Rscratch);
__ wry(Rscratch);
if (!VM_Version::v9_instructions_work()) {
// v9 doesn't require these nops
__ nop();
__ nop();
__ nop();
__ nop();
}
add_debug_info_for_div0_here(op->info());
@ -652,10 +645,6 @@ void LIR_Assembler::emit_opBranch(LIR_OpBranch* op) {
case lir_cond_lessEqual: acond = (is_unordered ? Assembler::f_unorderedOrLessOrEqual : Assembler::f_lessOrEqual); break;
case lir_cond_greaterEqual: acond = (is_unordered ? Assembler::f_unorderedOrGreaterOrEqual: Assembler::f_greaterOrEqual); break;
default : ShouldNotReachHere();
};
if (!VM_Version::v9_instructions_work()) {
__ nop();
}
__ fb( acond, false, Assembler::pn, *(op->label()));
} else {
@ -725,9 +714,6 @@ void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) {
Label L;
// result must be 0 if value is NaN; test by comparing value to itself
__ fcmp(FloatRegisterImpl::S, Assembler::fcc0, rsrc, rsrc);
if (!VM_Version::v9_instructions_work()) {
__ nop();
}
__ fb(Assembler::f_unordered, true, Assembler::pn, L);
__ delayed()->st(G0, addr); // annuled if contents of rsrc is not NaN
__ ftoi(FloatRegisterImpl::S, rsrc, rsrc);
@ -1909,7 +1895,7 @@ void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr
switch (code) {
case lir_add: __ add (lreg, rreg, res); break;
case lir_sub: __ sub (lreg, rreg, res); break;
case lir_mul: __ mult (lreg, rreg, res); break;
case lir_mul: __ mulx (lreg, rreg, res); break;
default: ShouldNotReachHere();
}
}
@ -1924,7 +1910,7 @@ void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr
switch (code) {
case lir_add: __ add (lreg, simm13, res); break;
case lir_sub: __ sub (lreg, simm13, res); break;
case lir_mul: __ mult (lreg, simm13, res); break;
case lir_mul: __ mulx (lreg, simm13, res); break;
default: ShouldNotReachHere();
}
} else {
@ -1936,7 +1922,7 @@ void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr
switch (code) {
case lir_add: __ add (lreg, (int)con, res); break;
case lir_sub: __ sub (lreg, (int)con, res); break;
case lir_mul: __ mult (lreg, (int)con, res); break;
case lir_mul: __ mulx (lreg, (int)con, res); break;
default: ShouldNotReachHere();
}
}
@ -2960,6 +2946,9 @@ void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst_opr) {
}
}
void LIR_Assembler::emit_updatecrc32(LIR_OpUpdateCRC32* op) {
fatal("CRC32 intrinsic is not implemented on this platform");
}
void LIR_Assembler::emit_lock(LIR_OpLock* op) {
Register obj = op->obj_opr()->as_register();
@ -3234,48 +3223,26 @@ void LIR_Assembler::volatile_move_op(LIR_Opr src, LIR_Opr dest, BasicType type,
Register base = mem_addr->base()->as_register();
if (src->is_register() && dest->is_address()) {
// G4 is high half, G5 is low half
if (VM_Version::v9_instructions_work()) {
// clear the top bits of G5, and scale up G4
__ srl (src->as_register_lo(), 0, G5);
__ sllx(src->as_register_hi(), 32, G4);
// combine the two halves into the 64 bits of G4
__ or3(G4, G5, G4);
null_check_offset = __ offset();
if (idx == noreg) {
__ stx(G4, base, disp);
} else {
__ stx(G4, base, idx);
}
// clear the top bits of G5, and scale up G4
__ srl (src->as_register_lo(), 0, G5);
__ sllx(src->as_register_hi(), 32, G4);
// combine the two halves into the 64 bits of G4
__ or3(G4, G5, G4);
null_check_offset = __ offset();
if (idx == noreg) {
__ stx(G4, base, disp);
} else {
__ mov (src->as_register_hi(), G4);
__ mov (src->as_register_lo(), G5);
null_check_offset = __ offset();
if (idx == noreg) {
__ std(G4, base, disp);
} else {
__ std(G4, base, idx);
}
__ stx(G4, base, idx);
}
} else if (src->is_address() && dest->is_register()) {
null_check_offset = __ offset();
if (VM_Version::v9_instructions_work()) {
if (idx == noreg) {
__ ldx(base, disp, G5);
} else {
__ ldx(base, idx, G5);
}
__ srax(G5, 32, dest->as_register_hi()); // fetch the high half into hi
__ mov (G5, dest->as_register_lo()); // copy low half into lo
if (idx == noreg) {
__ ldx(base, disp, G5);
} else {
if (idx == noreg) {
__ ldd(base, disp, G4);
} else {
__ ldd(base, idx, G4);
}
// G4 is high half, G5 is low half
__ mov (G4, dest->as_register_hi());
__ mov (G5, dest->as_register_lo());
__ ldx(base, idx, G5);
}
__ srax(G5, 32, dest->as_register_hi()); // fetch the high half into hi
__ mov (G5, dest->as_register_lo()); // copy low half into lo
} else {
Unimplemented();
}

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2005, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2005, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -784,6 +784,10 @@ void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
set_no_result(x);
}
void LIRGenerator::do_update_CRC32(Intrinsic* x) {
fatal("CRC32 intrinsic is not implemented on this platform");
}
// _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
// _i2b, _i2c, _i2s
void LIRGenerator::do_Convert(Convert* x) {

View File

@ -108,7 +108,7 @@ void C1_MacroAssembler::lock_object(Register Rmark, Register Roop, Register Rbox
// compare object markOop with Rmark and if equal exchange Rscratch with object markOop
assert(mark_addr.disp() == 0, "cas must take a zero displacement");
casx_under_lock(mark_addr.base(), Rmark, Rscratch, (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
cas_ptr(mark_addr.base(), Rmark, Rscratch);
// if compare/exchange succeeded we found an unlocked object and we now have locked it
// hence we are done
cmp(Rmark, Rscratch);
@ -149,7 +149,7 @@ void C1_MacroAssembler::unlock_object(Register Rmark, Register Roop, Register Rb
// Check if it is still a light weight lock, this is is true if we see
// the stack address of the basicLock in the markOop of the object
casx_under_lock(mark_addr.base(), Rbox, Rmark, (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
cas_ptr(mark_addr.base(), Rbox, Rmark);
cmp(Rbox, Rmark);
brx(Assembler::notEqual, false, Assembler::pn, slow_case);
@ -276,7 +276,7 @@ void C1_MacroAssembler::initialize_object(
sub(var_size_in_bytes, hdr_size_in_bytes, t2); // compute size of body
initialize_body(t1, t2);
#ifndef _LP64
} else if (VM_Version::v9_instructions_work() && con_size_in_bytes < threshold * 2) {
} else if (con_size_in_bytes < threshold * 2) {
// on v9 we can do double word stores to fill twice as much space.
assert(hdr_size_in_bytes % 8 == 0, "double word aligned");
assert(con_size_in_bytes % 8 == 0, "double word aligned");

View File

@ -49,8 +49,9 @@ define_pd_global(intx, FreqInlineSize, 325 );
define_pd_global(bool, ResizeTLAB, true );
define_pd_global(intx, ReservedCodeCacheSize, 32*M );
define_pd_global(intx, CodeCacheExpansionSize, 32*K );
define_pd_global(uintx,CodeCacheMinBlockLength, 1);
define_pd_global(uintx,MetaspaceSize, 12*M );
define_pd_global(uintx, CodeCacheMinBlockLength, 1);
define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K);
define_pd_global(uintx, MetaspaceSize, 12*M );
define_pd_global(bool, NeverActAsServerClassMachine, true );
define_pd_global(intx, NewSizeThreadIncrease, 16*K );
define_pd_global(uint64_t,MaxRAM, 1ULL*G);

View File

@ -86,7 +86,8 @@ define_pd_global(intx, CodeCacheExpansionSize, 32*K);
// Ergonomics related flags
define_pd_global(uint64_t,MaxRAM, 4ULL*G);
#endif
define_pd_global(uintx,CodeCacheMinBlockLength, 4);
define_pd_global(uintx, CodeCacheMinBlockLength, 4);
define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K);
// Heap related flags
define_pd_global(uintx,MetaspaceSize, ScaleForWordSize(16*M));

View File

@ -30,5 +30,4 @@
void Compile::pd_compiler2_init() {
guarantee(CodeEntryAlignment >= InteriorEntryAlignment, "" );
guarantee( VM_Version::v9_instructions_work(), "Server compiler does not run on V8 systems" );
}

View File

@ -30,8 +30,7 @@
}
static const char* pd_cpu_opts() {
return (VM_Version::v9_instructions_work()?
(VM_Version::v8_instructions_work()? "" : "v9only") : "v8only");
return "v9only";
}
#endif // CPU_SPARC_VM_DISASSEMBLER_SPARC_HPP

View File

@ -257,11 +257,6 @@ bool frame::safe_for_sender(JavaThread *thread) {
return false;
}
// Could be a zombie method
if (sender_blob->is_zombie() || sender_blob->is_unloaded()) {
return false;
}
// It should be safe to construct the sender though it might not be valid
frame sender(_SENDER_SP, younger_sp, adjusted_stack);
@ -680,7 +675,7 @@ bool frame::is_interpreted_frame_valid(JavaThread* thread) const {
// validate ConstantPoolCache*
ConstantPoolCache* cp = *interpreter_frame_cache_addr();
if (cp == NULL || !cp->is_metadata()) return false;
if (cp == NULL || !cp->is_metaspace_object()) return false;
// validate locals

View File

@ -110,8 +110,5 @@ define_pd_global(uintx, CMSYoungGenPerWorker, 16*M); // default max size of CMS
\
product(uintx, ArraycopyDstPrefetchDistance, 0, \
"Distance to prefetch destination array in arracopy") \
\
develop(intx, V8AtomicOperationUnderLockSpinCount, 50, \
"Number of times to spin wait on a v8 atomic operation lock") \
#endif // CPU_SPARC_VM_GLOBALS_SPARC_HPP

View File

@ -1210,8 +1210,7 @@ void InterpreterMacroAssembler::lock_object(Register lock_reg, Register Object)
st_ptr(mark_reg, lock_addr, BasicLock::displaced_header_offset_in_bytes());
// compare and exchange object_addr, markOop | 1, stack address of basicLock
assert(mark_addr.disp() == 0, "cas must take a zero displacement");
casx_under_lock(mark_addr.base(), mark_reg, temp_reg,
(address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
cas_ptr(mark_addr.base(), mark_reg, temp_reg);
// if the compare and exchange succeeded we are done (we saw an unlocked object)
cmp_and_brx_short(mark_reg, temp_reg, Assembler::equal, Assembler::pt, done);
@ -1291,8 +1290,7 @@ void InterpreterMacroAssembler::unlock_object(Register lock_reg) {
// we expect to see the stack address of the basicLock in case the
// lock is still a light weight lock (lock_reg)
assert(mark_addr.disp() == 0, "cas must take a zero displacement");
casx_under_lock(mark_addr.base(), lock_reg, displaced_header_reg,
(address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
cas_ptr(mark_addr.base(), lock_reg, displaced_header_reg);
cmp(lock_reg, displaced_header_reg);
brx(Assembler::equal, true, Assembler::pn, done);
delayed()->st_ptr(G0, lockobj_addr); // free entry

View File

@ -118,7 +118,6 @@ int MacroAssembler::patched_branch(int dest_pos, int inst, int inst_pos) {
case bp_op2: m = wdisp( word_aligned_ones, 0, 19); v = wdisp( dest_pos, inst_pos, 19); break;
case fb_op2: m = wdisp( word_aligned_ones, 0, 22); v = wdisp( dest_pos, inst_pos, 22); break;
case br_op2: m = wdisp( word_aligned_ones, 0, 22); v = wdisp( dest_pos, inst_pos, 22); break;
case cb_op2: m = wdisp( word_aligned_ones, 0, 22); v = wdisp( dest_pos, inst_pos, 22); break;
case bpr_op2: {
if (is_cbcond(inst)) {
m = wdisp10(word_aligned_ones, 0);
@ -149,7 +148,6 @@ int MacroAssembler::branch_destination(int inst, int pos) {
case bp_op2: r = inv_wdisp( inst, pos, 19); break;
case fb_op2: r = inv_wdisp( inst, pos, 22); break;
case br_op2: r = inv_wdisp( inst, pos, 22); break;
case cb_op2: r = inv_wdisp( inst, pos, 22); break;
case bpr_op2: {
if (is_cbcond(inst)) {
r = inv_wdisp10(inst, pos);
@ -325,12 +323,6 @@ void MacroAssembler::breakpoint_trap() {
trap(ST_RESERVED_FOR_USER_0);
}
// flush windows (except current) using flushw instruction if avail.
void MacroAssembler::flush_windows() {
if (VM_Version::v9_instructions_work()) flushw();
else flush_windows_trap();
}
// Write serialization page so VM thread can do a pseudo remote membar
// We use the current thread pointer to calculate a thread specific
// offset to write to within the page. This minimizes bus traffic
@ -358,88 +350,6 @@ void MacroAssembler::leave() {
Unimplemented();
}
void MacroAssembler::mult(Register s1, Register s2, Register d) {
if(VM_Version::v9_instructions_work()) {
mulx (s1, s2, d);
} else {
smul (s1, s2, d);
}
}
void MacroAssembler::mult(Register s1, int simm13a, Register d) {
if(VM_Version::v9_instructions_work()) {
mulx (s1, simm13a, d);
} else {
smul (s1, simm13a, d);
}
}
#ifdef ASSERT
void MacroAssembler::read_ccr_v8_assert(Register ccr_save) {
const Register s1 = G3_scratch;
const Register s2 = G4_scratch;
Label get_psr_test;
// Get the condition codes the V8 way.
read_ccr_trap(s1);
mov(ccr_save, s2);
// This is a test of V8 which has icc but not xcc
// so mask off the xcc bits
and3(s2, 0xf, s2);
// Compare condition codes from the V8 and V9 ways.
subcc(s2, s1, G0);
br(Assembler::notEqual, true, Assembler::pt, get_psr_test);
delayed()->breakpoint_trap();
bind(get_psr_test);
}
void MacroAssembler::write_ccr_v8_assert(Register ccr_save) {
const Register s1 = G3_scratch;
const Register s2 = G4_scratch;
Label set_psr_test;
// Write out the saved condition codes the V8 way
write_ccr_trap(ccr_save, s1, s2);
// Read back the condition codes using the V9 instruction
rdccr(s1);
mov(ccr_save, s2);
// This is a test of V8 which has icc but not xcc
// so mask off the xcc bits
and3(s2, 0xf, s2);
and3(s1, 0xf, s1);
// Compare the V8 way with the V9 way.
subcc(s2, s1, G0);
br(Assembler::notEqual, true, Assembler::pt, set_psr_test);
delayed()->breakpoint_trap();
bind(set_psr_test);
}
#else
#define read_ccr_v8_assert(x)
#define write_ccr_v8_assert(x)
#endif // ASSERT
void MacroAssembler::read_ccr(Register ccr_save) {
if (VM_Version::v9_instructions_work()) {
rdccr(ccr_save);
// Test code sequence used on V8. Do not move above rdccr.
read_ccr_v8_assert(ccr_save);
} else {
read_ccr_trap(ccr_save);
}
}
void MacroAssembler::write_ccr(Register ccr_save) {
if (VM_Version::v9_instructions_work()) {
// Test code sequence used on V8. Do not move below wrccr.
write_ccr_v8_assert(ccr_save);
wrccr(ccr_save);
} else {
const Register temp_reg1 = G3_scratch;
const Register temp_reg2 = G4_scratch;
write_ccr_trap(ccr_save, temp_reg1, temp_reg2);
}
}
// Calls to C land
#ifdef ASSERT
@ -465,8 +375,8 @@ void MacroAssembler::get_thread() {
#ifdef ASSERT
AddressLiteral last_get_thread_addrlit(&last_get_thread);
set(last_get_thread_addrlit, L3);
inc(L4, get_pc(L4) + 2 * BytesPerInstWord); // skip getpc() code + inc + st_ptr to point L4 at call
st_ptr(L4, L3, 0);
rdpc(L4);
inc(L4, 3 * BytesPerInstWord); // skip rdpc + inc + st_ptr to point L4 at call st_ptr(L4, L3, 0);
#endif
call(CAST_FROM_FN_PTR(address, reinitialize_thread), relocInfo::runtime_call_type);
delayed()->nop();
@ -1251,12 +1161,6 @@ void MacroAssembler::align(int modulus) {
while (offset() % modulus != 0) nop();
}
void MacroAssembler::safepoint() {
relocate(breakpoint_Relocation::spec(breakpoint_Relocation::safepoint));
}
void RegistersForDebugging::print(outputStream* s) {
FlagSetting fs(Debugging, true);
int j;
@ -1327,7 +1231,7 @@ void RegistersForDebugging::print(outputStream* s) {
void RegistersForDebugging::save_registers(MacroAssembler* a) {
a->sub(FP, round_to(sizeof(RegistersForDebugging), sizeof(jdouble)) - STACK_BIAS, O0);
a->flush_windows();
a->flushw();
int i;
for (i = 0; i < 8; ++i) {
a->ld_ptr(as_iRegister(i)->address_in_saved_window().after_save(), L1); a->st_ptr( L1, O0, i_offset(i));
@ -1338,7 +1242,7 @@ void RegistersForDebugging::save_registers(MacroAssembler* a) {
for (i = 0; i < 32; ++i) {
a->stf(FloatRegisterImpl::S, as_FloatRegister(i), O0, f_offset(i));
}
for (i = 0; i < (VM_Version::v9_instructions_work() ? 64 : 32); i += 2) {
for (i = 0; i < 64; i += 2) {
a->stf(FloatRegisterImpl::D, as_FloatRegister(i), O0, d_offset(i));
}
}
@ -1350,7 +1254,7 @@ void RegistersForDebugging::restore_registers(MacroAssembler* a, Register r) {
for (int j = 0; j < 32; ++j) {
a->ldf(FloatRegisterImpl::S, O0, f_offset(j), as_FloatRegister(j));
}
for (int k = 0; k < (VM_Version::v9_instructions_work() ? 64 : 32); k += 2) {
for (int k = 0; k < 64; k += 2) {
a->ldf(FloatRegisterImpl::D, O0, d_offset(k), as_FloatRegister(k));
}
}
@ -1465,8 +1369,6 @@ address MacroAssembler::_verify_oop_implicit_branch[3] = { NULL };
// the high bits of the O-regs if they contain Long values. Acts as a 'leaf'
// call.
void MacroAssembler::verify_oop_subroutine() {
assert( VM_Version::v9_instructions_work(), "VerifyOops not supported for V8" );
// Leaf call; no frame.
Label succeed, fail, null_or_fail;
@ -1870,26 +1772,17 @@ void MacroAssembler::lcmp( Register Ra_hi, Register Ra_low,
// And the equals case for the high part does not need testing,
// since that triplet is reached only after finding the high halves differ.
if (VM_Version::v9_instructions_work()) {
mov(-1, Rresult);
ba(done); delayed()-> movcc(greater, false, icc, 1, Rresult);
} else {
br(less, true, pt, done); delayed()-> set(-1, Rresult);
br(greater, true, pt, done); delayed()-> set( 1, Rresult);
}
mov(-1, Rresult);
ba(done);
delayed()->movcc(greater, false, icc, 1, Rresult);
bind( check_low_parts );
bind(check_low_parts);
if (VM_Version::v9_instructions_work()) {
mov( -1, Rresult);
movcc(equal, false, icc, 0, Rresult);
movcc(greaterUnsigned, false, icc, 1, Rresult);
} else {
set(-1, Rresult);
br(equal, true, pt, done); delayed()->set( 0, Rresult);
br(greaterUnsigned, true, pt, done); delayed()->set( 1, Rresult);
}
bind( done );
mov( -1, Rresult);
movcc(equal, false, icc, 0, Rresult);
movcc(greaterUnsigned, false, icc, 1, Rresult);
bind(done);
}
void MacroAssembler::lneg( Register Rhi, Register Rlow ) {
@ -2117,119 +2010,24 @@ void MacroAssembler::store_sized_value(Register src, Address dst, size_t size_in
void MacroAssembler::float_cmp( bool is_float, int unordered_result,
FloatRegister Fa, FloatRegister Fb,
Register Rresult) {
fcmp(is_float ? FloatRegisterImpl::S : FloatRegisterImpl::D, fcc0, Fa, Fb);
Condition lt = unordered_result == -1 ? f_unorderedOrLess : f_less;
Condition eq = f_equal;
Condition gt = unordered_result == 1 ? f_unorderedOrGreater : f_greater;
if (VM_Version::v9_instructions_work()) {
mov(-1, Rresult);
movcc(eq, true, fcc0, 0, Rresult);
movcc(gt, true, fcc0, 1, Rresult);
if (is_float) {
fcmp(FloatRegisterImpl::S, fcc0, Fa, Fb);
} else {
Label done;
fcmp(FloatRegisterImpl::D, fcc0, Fa, Fb);
}
set( -1, Rresult );
//fb(lt, true, pn, done); delayed()->set( -1, Rresult );
fb( eq, true, pn, done); delayed()->set( 0, Rresult );
fb( gt, true, pn, done); delayed()->set( 1, Rresult );
bind (done);
if (unordered_result == 1) {
mov( -1, Rresult);
movcc(f_equal, true, fcc0, 0, Rresult);
movcc(f_unorderedOrGreater, true, fcc0, 1, Rresult);
} else {
mov( -1, Rresult);
movcc(f_equal, true, fcc0, 0, Rresult);
movcc(f_greater, true, fcc0, 1, Rresult);
}
}
void MacroAssembler::fneg( FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d)
{
if (VM_Version::v9_instructions_work()) {
Assembler::fneg(w, s, d);
} else {
if (w == FloatRegisterImpl::S) {
Assembler::fneg(w, s, d);
} else if (w == FloatRegisterImpl::D) {
// number() does a sanity check on the alignment.
assert(((s->encoding(FloatRegisterImpl::D) & 1) == 0) &&
((d->encoding(FloatRegisterImpl::D) & 1) == 0), "float register alignment check");
Assembler::fneg(FloatRegisterImpl::S, s, d);
Assembler::fmov(FloatRegisterImpl::S, s->successor(), d->successor());
} else {
assert(w == FloatRegisterImpl::Q, "Invalid float register width");
// number() does a sanity check on the alignment.
assert(((s->encoding(FloatRegisterImpl::D) & 3) == 0) &&
((d->encoding(FloatRegisterImpl::D) & 3) == 0), "float register alignment check");
Assembler::fneg(FloatRegisterImpl::S, s, d);
Assembler::fmov(FloatRegisterImpl::S, s->successor(), d->successor());
Assembler::fmov(FloatRegisterImpl::S, s->successor()->successor(), d->successor()->successor());
Assembler::fmov(FloatRegisterImpl::S, s->successor()->successor()->successor(), d->successor()->successor()->successor());
}
}
}
void MacroAssembler::fmov( FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d)
{
if (VM_Version::v9_instructions_work()) {
Assembler::fmov(w, s, d);
} else {
if (w == FloatRegisterImpl::S) {
Assembler::fmov(w, s, d);
} else if (w == FloatRegisterImpl::D) {
// number() does a sanity check on the alignment.
assert(((s->encoding(FloatRegisterImpl::D) & 1) == 0) &&
((d->encoding(FloatRegisterImpl::D) & 1) == 0), "float register alignment check");
Assembler::fmov(FloatRegisterImpl::S, s, d);
Assembler::fmov(FloatRegisterImpl::S, s->successor(), d->successor());
} else {
assert(w == FloatRegisterImpl::Q, "Invalid float register width");
// number() does a sanity check on the alignment.
assert(((s->encoding(FloatRegisterImpl::D) & 3) == 0) &&
((d->encoding(FloatRegisterImpl::D) & 3) == 0), "float register alignment check");
Assembler::fmov(FloatRegisterImpl::S, s, d);
Assembler::fmov(FloatRegisterImpl::S, s->successor(), d->successor());
Assembler::fmov(FloatRegisterImpl::S, s->successor()->successor(), d->successor()->successor());
Assembler::fmov(FloatRegisterImpl::S, s->successor()->successor()->successor(), d->successor()->successor()->successor());
}
}
}
void MacroAssembler::fabs( FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d)
{
if (VM_Version::v9_instructions_work()) {
Assembler::fabs(w, s, d);
} else {
if (w == FloatRegisterImpl::S) {
Assembler::fabs(w, s, d);
} else if (w == FloatRegisterImpl::D) {
// number() does a sanity check on the alignment.
assert(((s->encoding(FloatRegisterImpl::D) & 1) == 0) &&
((d->encoding(FloatRegisterImpl::D) & 1) == 0), "float register alignment check");
Assembler::fabs(FloatRegisterImpl::S, s, d);
Assembler::fmov(FloatRegisterImpl::S, s->successor(), d->successor());
} else {
assert(w == FloatRegisterImpl::Q, "Invalid float register width");
// number() does a sanity check on the alignment.
assert(((s->encoding(FloatRegisterImpl::D) & 3) == 0) &&
((d->encoding(FloatRegisterImpl::D) & 3) == 0), "float register alignment check");
Assembler::fabs(FloatRegisterImpl::S, s, d);
Assembler::fmov(FloatRegisterImpl::S, s->successor(), d->successor());
Assembler::fmov(FloatRegisterImpl::S, s->successor()->successor(), d->successor()->successor());
Assembler::fmov(FloatRegisterImpl::S, s->successor()->successor()->successor(), d->successor()->successor()->successor());
}
}
}
void MacroAssembler::save_all_globals_into_locals() {
mov(G1,L1);
mov(G2,L2);
@ -2250,135 +2048,6 @@ void MacroAssembler::restore_globals_from_locals() {
mov(L7,G7);
}
// Use for 64 bit operation.
void MacroAssembler::casx_under_lock(Register top_ptr_reg, Register top_reg, Register ptr_reg, address lock_addr, bool use_call_vm)
{
// store ptr_reg as the new top value
#ifdef _LP64
casx(top_ptr_reg, top_reg, ptr_reg);
#else
cas_under_lock(top_ptr_reg, top_reg, ptr_reg, lock_addr, use_call_vm);
#endif // _LP64
}
// [RGV] This routine does not handle 64 bit operations.
// use casx_under_lock() or casx directly!!!
void MacroAssembler::cas_under_lock(Register top_ptr_reg, Register top_reg, Register ptr_reg, address lock_addr, bool use_call_vm)
{
// store ptr_reg as the new top value
if (VM_Version::v9_instructions_work()) {
cas(top_ptr_reg, top_reg, ptr_reg);
} else {
// If the register is not an out nor global, it is not visible
// after the save. Allocate a register for it, save its
// value in the register save area (the save may not flush
// registers to the save area).
Register top_ptr_reg_after_save;
Register top_reg_after_save;
Register ptr_reg_after_save;
if (top_ptr_reg->is_out() || top_ptr_reg->is_global()) {
top_ptr_reg_after_save = top_ptr_reg->after_save();
} else {
Address reg_save_addr = top_ptr_reg->address_in_saved_window();
top_ptr_reg_after_save = L0;
st(top_ptr_reg, reg_save_addr);
}
if (top_reg->is_out() || top_reg->is_global()) {
top_reg_after_save = top_reg->after_save();
} else {
Address reg_save_addr = top_reg->address_in_saved_window();
top_reg_after_save = L1;
st(top_reg, reg_save_addr);
}
if (ptr_reg->is_out() || ptr_reg->is_global()) {
ptr_reg_after_save = ptr_reg->after_save();
} else {
Address reg_save_addr = ptr_reg->address_in_saved_window();
ptr_reg_after_save = L2;
st(ptr_reg, reg_save_addr);
}
const Register& lock_reg = L3;
const Register& lock_ptr_reg = L4;
const Register& value_reg = L5;
const Register& yield_reg = L6;
const Register& yieldall_reg = L7;
save_frame();
if (top_ptr_reg_after_save == L0) {
ld(top_ptr_reg->address_in_saved_window().after_save(), top_ptr_reg_after_save);
}
if (top_reg_after_save == L1) {
ld(top_reg->address_in_saved_window().after_save(), top_reg_after_save);
}
if (ptr_reg_after_save == L2) {
ld(ptr_reg->address_in_saved_window().after_save(), ptr_reg_after_save);
}
Label(retry_get_lock);
Label(not_same);
Label(dont_yield);
assert(lock_addr, "lock_address should be non null for v8");
set((intptr_t)lock_addr, lock_ptr_reg);
// Initialize yield counter
mov(G0,yield_reg);
mov(G0, yieldall_reg);
set(StubRoutines::Sparc::locked, lock_reg);
bind(retry_get_lock);
cmp_and_br_short(yield_reg, V8AtomicOperationUnderLockSpinCount, Assembler::less, Assembler::pt, dont_yield);
if(use_call_vm) {
Untested("Need to verify global reg consistancy");
call_VM(noreg, CAST_FROM_FN_PTR(address, SharedRuntime::yield_all), yieldall_reg);
} else {
// Save the regs and make space for a C call
save(SP, -96, SP);
save_all_globals_into_locals();
call(CAST_FROM_FN_PTR(address,os::yield_all));
delayed()->mov(yieldall_reg, O0);
restore_globals_from_locals();
restore();
}
// reset the counter
mov(G0,yield_reg);
add(yieldall_reg, 1, yieldall_reg);
bind(dont_yield);
// try to get lock
Assembler::swap(lock_ptr_reg, 0, lock_reg);
// did we get the lock?
cmp(lock_reg, StubRoutines::Sparc::unlocked);
br(Assembler::notEqual, true, Assembler::pn, retry_get_lock);
delayed()->add(yield_reg,1,yield_reg);
// yes, got lock. do we have the same top?
ld(top_ptr_reg_after_save, 0, value_reg);
cmp_and_br_short(value_reg, top_reg_after_save, Assembler::notEqual, Assembler::pn, not_same);
// yes, same top.
st(ptr_reg_after_save, top_ptr_reg_after_save, 0);
membar(Assembler::StoreStore);
bind(not_same);
mov(value_reg, ptr_reg_after_save);
st(lock_reg, lock_ptr_reg, 0); // unlock
restore();
}
}
RegisterOrConstant MacroAssembler::delayed_value_impl(intptr_t* delayed_value_addr,
Register tmp,
int offset) {
@ -2970,7 +2639,7 @@ void MacroAssembler::biased_locking_enter(Register obj_reg, Register mark_reg,
markOopDesc::biased_lock_mask_in_place | markOopDesc::age_mask_in_place | markOopDesc::epoch_mask_in_place,
mark_reg);
or3(G2_thread, mark_reg, temp_reg);
casn(mark_addr.base(), mark_reg, temp_reg);
cas_ptr(mark_addr.base(), mark_reg, temp_reg);
// If the biasing toward our thread failed, this means that
// another thread succeeded in biasing it toward itself and we
// need to revoke that bias. The revocation will occur in the
@ -2998,7 +2667,7 @@ void MacroAssembler::biased_locking_enter(Register obj_reg, Register mark_reg,
load_klass(obj_reg, temp_reg);
ld_ptr(Address(temp_reg, Klass::prototype_header_offset()), temp_reg);
or3(G2_thread, temp_reg, temp_reg);
casn(mark_addr.base(), mark_reg, temp_reg);
cas_ptr(mark_addr.base(), mark_reg, temp_reg);
// If the biasing toward our thread failed, this means that
// another thread succeeded in biasing it toward itself and we
// need to revoke that bias. The revocation will occur in the
@ -3027,7 +2696,7 @@ void MacroAssembler::biased_locking_enter(Register obj_reg, Register mark_reg,
// bits in this situation. Should attempt to preserve them.
load_klass(obj_reg, temp_reg);
ld_ptr(Address(temp_reg, Klass::prototype_header_offset()), temp_reg);
casn(mark_addr.base(), mark_reg, temp_reg);
cas_ptr(mark_addr.base(), mark_reg, temp_reg);
// Fall through to the normal CAS-based lock, because no matter what
// the result of the above CAS, some thread must have succeeded in
// removing the bias bit from the object's header.
@ -3058,15 +2727,6 @@ void MacroAssembler::biased_locking_exit (Address mark_addr, Register temp_reg,
}
// CASN -- 32-64 bit switch hitter similar to the synthetic CASN provided by
// Solaris/SPARC's "as". Another apt name would be cas_ptr()
void MacroAssembler::casn (Register addr_reg, Register cmp_reg, Register set_reg ) {
casx_under_lock (addr_reg, cmp_reg, set_reg, (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
}
// compiler_lock_object() and compiler_unlock_object() are direct transliterations
// of i486.ad fast_lock() and fast_unlock(). See those methods for detailed comments.
// The code could be tightened up considerably.
@ -3129,8 +2789,7 @@ void MacroAssembler::compiler_lock_object(Register Roop, Register Rmark,
// compare object markOop with Rmark and if equal exchange Rscratch with object markOop
assert(mark_addr.disp() == 0, "cas must take a zero displacement");
casx_under_lock(mark_addr.base(), Rmark, Rscratch,
(address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
cas_ptr(mark_addr.base(), Rmark, Rscratch);
// if compare/exchange succeeded we found an unlocked object and we now have locked it
// hence we are done
@ -3176,7 +2835,7 @@ void MacroAssembler::compiler_lock_object(Register Roop, Register Rmark,
mov(Rbox, Rscratch);
or3(Rmark, markOopDesc::unlocked_value, Rmark);
assert(mark_addr.disp() == 0, "cas must take a zero displacement");
casn(mark_addr.base(), Rmark, Rscratch);
cas_ptr(mark_addr.base(), Rmark, Rscratch);
cmp(Rmark, Rscratch);
brx(Assembler::equal, false, Assembler::pt, done);
delayed()->sub(Rscratch, SP, Rscratch);
@ -3207,7 +2866,7 @@ void MacroAssembler::compiler_lock_object(Register Roop, Register Rmark,
// Invariant: if we acquire the lock then _recursions should be 0.
add(Rmark, ObjectMonitor::owner_offset_in_bytes()-2, Rmark);
mov(G2_thread, Rscratch);
casn(Rmark, G0, Rscratch);
cas_ptr(Rmark, G0, Rscratch);
cmp(Rscratch, G0);
// Intentional fall-through into done
} else {
@ -3240,7 +2899,7 @@ void MacroAssembler::compiler_lock_object(Register Roop, Register Rmark,
mov(0, Rscratch);
or3(Rmark, markOopDesc::unlocked_value, Rmark);
assert(mark_addr.disp() == 0, "cas must take a zero displacement");
casn(mark_addr.base(), Rmark, Rscratch);
cas_ptr(mark_addr.base(), Rmark, Rscratch);
// prefetch (mark_addr, Assembler::severalWritesAndPossiblyReads);
cmp(Rscratch, Rmark);
brx(Assembler::notZero, false, Assembler::pn, Recursive);
@ -3266,7 +2925,7 @@ void MacroAssembler::compiler_lock_object(Register Roop, Register Rmark,
// the fast-path stack-lock code from the interpreter and always passed
// control to the "slow" operators in synchronizer.cpp.
// RScratch contains the fetched obj->mark value from the failed CASN.
// RScratch contains the fetched obj->mark value from the failed CAS.
#ifdef _LP64
sub(Rscratch, STACK_BIAS, Rscratch);
#endif
@ -3300,7 +2959,7 @@ void MacroAssembler::compiler_lock_object(Register Roop, Register Rmark,
// Invariant: if we acquire the lock then _recursions should be 0.
add(Rmark, ObjectMonitor::owner_offset_in_bytes()-2, Rmark);
mov(G2_thread, Rscratch);
casn(Rmark, G0, Rscratch);
cas_ptr(Rmark, G0, Rscratch);
cmp(Rscratch, G0);
// ST box->displaced_header = NonZero.
// Any non-zero value suffices:
@ -3336,8 +2995,7 @@ void MacroAssembler::compiler_unlock_object(Register Roop, Register Rmark,
// Check if it is still a light weight lock, this is is true if we see
// the stack address of the basicLock in the markOop of the object
assert(mark_addr.disp() == 0, "cas must take a zero displacement");
casx_under_lock(mark_addr.base(), Rbox, Rmark,
(address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
cas_ptr(mark_addr.base(), Rbox, Rmark);
ba(done);
delayed()->cmp(Rbox, Rmark);
bind(done);
@ -3398,7 +3056,7 @@ void MacroAssembler::compiler_unlock_object(Register Roop, Register Rmark,
delayed()->andcc(G0, G0, G0);
add(Rmark, ObjectMonitor::owner_offset_in_bytes()-2, Rmark);
mov(G2_thread, Rscratch);
casn(Rmark, G0, Rscratch);
cas_ptr(Rmark, G0, Rscratch);
// invert icc.zf and goto done
br_notnull(Rscratch, false, Assembler::pt, done);
delayed()->cmp(G0, G0);
@ -3440,7 +3098,7 @@ void MacroAssembler::compiler_unlock_object(Register Roop, Register Rmark,
// A prototype implementation showed excellent results, although
// the scavenger and timeout code was rather involved.
casn(mark_addr.base(), Rbox, Rscratch);
cas_ptr(mark_addr.base(), Rbox, Rscratch);
cmp(Rbox, Rscratch);
// Intentional fall through into done ...
@ -3540,7 +3198,8 @@ void MacroAssembler::eden_allocate(
if (CMSIncrementalMode || !Universe::heap()->supports_inline_contig_alloc()) {
// No allocation in the shared eden.
ba_short(slow_case);
ba(slow_case);
delayed()->nop();
} else {
// get eden boundaries
// note: we need both top & top_addr!
@ -3583,7 +3242,7 @@ void MacroAssembler::eden_allocate(
// Compare obj with the value at top_addr; if still equal, swap the value of
// end with the value at top_addr. If not equal, read the value at top_addr
// into end.
casx_under_lock(top_addr, obj, end, (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
cas_ptr(top_addr, obj, end);
// if someone beat us on the allocation, try again, otherwise continue
cmp(obj, end);
brx(Assembler::notEqual, false, Assembler::pn, retry);

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -963,7 +963,7 @@ public:
inline void sub(Register s1, RegisterOrConstant s2, Register d, int offset = 0);
using Assembler::swap;
inline void swap(Address& a, Register d, int offset = 0);
inline void swap(const Address& a, Register d, int offset = 0);
// address pseudos: make these names unlike instruction names to avoid confusion
inline intptr_t load_pc_address( Register reg, int bytes_to_skip );
@ -1056,13 +1056,6 @@ public:
void breakpoint_trap();
void breakpoint_trap(Condition c, CC cc);
void flush_windows_trap();
void clean_windows_trap();
void get_psr_trap();
void set_psr_trap();
// V8/V9 flush_windows
void flush_windows();
// Support for serializing memory accesses between threads
void serialize_memory(Register thread, Register tmp1, Register tmp2);
@ -1071,14 +1064,6 @@ public:
void enter();
void leave();
// V8/V9 integer multiply
void mult(Register s1, Register s2, Register d);
void mult(Register s1, int simm13a, Register d);
// V8/V9 read and write of condition codes.
void read_ccr(Register d);
void write_ccr(Register s);
// Manipulation of C++ bools
// These are idioms to flag the need for care with accessing bools but on
// this platform we assume byte size
@ -1162,21 +1147,6 @@ public:
// check_and_forward_exception to handle exceptions when it is safe
void check_and_forward_exception(Register scratch_reg);
private:
// For V8
void read_ccr_trap(Register ccr_save);
void write_ccr_trap(Register ccr_save1, Register scratch1, Register scratch2);
#ifdef ASSERT
// For V8 debugging. Uses V8 instruction sequence and checks
// result with V9 insturctions rdccr and wrccr.
// Uses Gscatch and Gscatch2
void read_ccr_v8_assert(Register ccr_save);
void write_ccr_v8_assert(Register ccr_save);
#endif // ASSERT
public:
// Write to card table for - register is destroyed afterwards.
void card_table_write(jbyte* byte_map_base, Register tmp, Register obj);
@ -1314,20 +1284,9 @@ public:
FloatRegister Fa, FloatRegister Fb,
Register Rresult);
void fneg( FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d);
void fneg( FloatRegisterImpl::Width w, FloatRegister sd ) { Assembler::fneg(w, sd); }
void fmov( FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d);
void fabs( FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d);
void save_all_globals_into_locals();
void restore_globals_from_locals();
void casx_under_lock(Register top_ptr_reg, Register top_reg, Register ptr_reg,
address lock_addr=0, bool use_call_vm=false);
void cas_under_lock(Register top_ptr_reg, Register top_reg, Register ptr_reg,
address lock_addr=0, bool use_call_vm=false);
void casn (Register addr_reg, Register cmp_reg, Register set_reg) ;
// These set the icc condition code to equal if the lock succeeded
// and notEqual if it failed and requires a slow case
void compiler_lock_object(Register Roop, Register Rmark, Register Rbox,

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -229,10 +229,7 @@ inline void MacroAssembler::sll_ptr( Register s1, RegisterOrConstant s2, Registe
// Use the right branch for the platform
inline void MacroAssembler::br( Condition c, bool a, Predict p, address d, relocInfo::relocType rt ) {
if (VM_Version::v9_instructions_work())
Assembler::bp(c, a, icc, p, d, rt);
else
Assembler::br(c, a, d, rt);
Assembler::bp(c, a, icc, p, d, rt);
}
inline void MacroAssembler::br( Condition c, bool a, Predict p, Label& L ) {
@ -268,10 +265,7 @@ inline void MacroAssembler::bp( Condition c, bool a, CC cc, Predict p, Label& L
}
inline void MacroAssembler::fb( Condition c, bool a, Predict p, address d, relocInfo::relocType rt ) {
if (VM_Version::v9_instructions_work())
fbp(c, a, fcc0, p, d, rt);
else
Assembler::fb(c, a, d, rt);
fbp(c, a, fcc0, p, d, rt);
}
inline void MacroAssembler::fb( Condition c, bool a, Predict p, Label& L ) {
@ -334,7 +328,7 @@ inline void MacroAssembler::callr( Register s1, int simm13a, RelocationHolder co
// prefetch instruction
inline void MacroAssembler::iprefetch( address d, relocInfo::relocType rt ) {
if (VM_Version::v9_instructions_work())
Assembler::bp( never, true, xcc, pt, d, rt );
Assembler::bp( never, true, xcc, pt, d, rt );
}
inline void MacroAssembler::iprefetch( Label& L) { iprefetch( target(L) ); }
@ -344,15 +338,7 @@ inline void MacroAssembler::iprefetch( Label& L) { iprefetch( target(L) ); }
// returns delta from gotten pc to addr after
inline int MacroAssembler::get_pc( Register d ) {
int x = offset();
if (VM_Version::v9_instructions_work())
rdpc(d);
else {
Label lbl;
Assembler::call(lbl, relocInfo::none); // No relocation as this is call to pc+0x8
if (d == O7) delayed()->nop();
else delayed()->mov(O7, d);
bind(lbl);
}
rdpc(d);
return offset() - x;
}
@ -646,41 +632,26 @@ inline void MacroAssembler::ldf(FloatRegisterImpl::Width w, const Address& a, Fl
// returns if membar generates anything, obviously this code should mirror
// membar below.
inline bool MacroAssembler::membar_has_effect( Membar_mask_bits const7a ) {
if( !os::is_MP() ) return false; // Not needed on single CPU
if( VM_Version::v9_instructions_work() ) {
const Membar_mask_bits effective_mask =
Membar_mask_bits(const7a & ~(LoadLoad | LoadStore | StoreStore));
return (effective_mask != 0);
} else {
return true;
}
if (!os::is_MP())
return false; // Not needed on single CPU
const Membar_mask_bits effective_mask =
Membar_mask_bits(const7a & ~(LoadLoad | LoadStore | StoreStore));
return (effective_mask != 0);
}
inline void MacroAssembler::membar( Membar_mask_bits const7a ) {
// Uniprocessors do not need memory barriers
if (!os::is_MP()) return;
if (!os::is_MP())
return;
// Weakened for current Sparcs and TSO. See the v9 manual, sections 8.4.3,
// 8.4.4.3, a.31 and a.50.
if( VM_Version::v9_instructions_work() ) {
// Under TSO, setting bit 3, 2, or 0 is redundant, so the only value
// of the mmask subfield of const7a that does anything that isn't done
// implicitly is StoreLoad.
const Membar_mask_bits effective_mask =
Membar_mask_bits(const7a & ~(LoadLoad | LoadStore | StoreStore));
if ( effective_mask != 0 ) {
Assembler::membar( effective_mask );
}
} else {
// stbar is the closest there is on v8. Equivalent to membar(StoreStore). We
// do not issue the stbar because to my knowledge all v8 machines implement TSO,
// which guarantees that all stores behave as if an stbar were issued just after
// each one of them. On these machines, stbar ought to be a nop. There doesn't
// appear to be an equivalent of membar(StoreLoad) on v8: TSO doesn't require it,
// it can't be specified by stbar, nor have I come up with a way to simulate it.
//
// Addendum. Dave says that ldstub guarantees a write buffer flush to coherent
// space. Put one here to be on the safe side.
Assembler::ldstub(SP, 0, G0);
// Under TSO, setting bit 3, 2, or 0 is redundant, so the only value
// of the mmask subfield of const7a that does anything that isn't done
// implicitly is StoreLoad.
const Membar_mask_bits effective_mask =
Membar_mask_bits(const7a & ~(LoadLoad | LoadStore | StoreStore));
if (effective_mask != 0) {
Assembler::membar(effective_mask);
}
}
@ -748,7 +719,7 @@ inline void MacroAssembler::sub(Register s1, RegisterOrConstant s2, Register d,
if (offset != 0) sub(d, offset, d);
}
inline void MacroAssembler::swap(Address& a, Register d, int offset) {
inline void MacroAssembler::swap(const Address& a, Register d, int offset) {
relocate(a.rspec(offset));
if (a.has_index()) { assert(offset == 0, ""); swap(a.base(), a.index(), d ); }
else { swap(a.base(), a.disp() + offset, d); }

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@ -162,7 +162,7 @@ void NativeCall::replace_mt_safe(address instr_addr, address code_buffer) {
int i1 = ((int*)code_buffer)[1];
int* contention_addr = (int*) n_call->addr_at(1*BytesPerInstWord);
assert(inv_op(*contention_addr) == Assembler::arith_op ||
*contention_addr == nop_instruction() || !VM_Version::v9_instructions_work(),
*contention_addr == nop_instruction(),
"must not interfere with original call");
// The set_long_at calls do the ICacheInvalidate so we just need to do them in reverse order
n_call->set_long_at(1*BytesPerInstWord, i1);
@ -181,7 +181,7 @@ void NativeCall::replace_mt_safe(address instr_addr, address code_buffer) {
// Make sure the first-patched instruction, which may co-exist
// briefly with the call, will do something harmless.
assert(inv_op(*contention_addr) == Assembler::arith_op ||
*contention_addr == nop_instruction() || !VM_Version::v9_instructions_work(),
*contention_addr == nop_instruction(),
"must not interfere with original call");
}
@ -933,11 +933,7 @@ void NativeJump::patch_verified_entry(address entry, address verified_entry, add
int code_size = 1 * BytesPerInstWord;
CodeBuffer cb(verified_entry, code_size + 1);
MacroAssembler* a = new MacroAssembler(&cb);
if (VM_Version::v9_instructions_work()) {
a->ldsw(G0, 0, O7); // "ld" must agree with code in the signal handler
} else {
a->lduw(G0, 0, O7); // "ld" must agree with code in the signal handler
}
a->ldsw(G0, 0, O7); // "ld" must agree with code in the signal handler
ICache::invalidate_range(verified_entry, code_size);
}
@ -1024,7 +1020,7 @@ void NativeGeneralJump::replace_mt_safe(address instr_addr, address code_buffer)
int i1 = ((int*)code_buffer)[1];
int* contention_addr = (int*) h_jump->addr_at(1*BytesPerInstWord);
assert(inv_op(*contention_addr) == Assembler::arith_op ||
*contention_addr == nop_instruction() || !VM_Version::v9_instructions_work(),
*contention_addr == nop_instruction(),
"must not interfere with original call");
// The set_long_at calls do the ICacheInvalidate so we just need to do them in reverse order
h_jump->set_long_at(1*BytesPerInstWord, i1);
@ -1043,6 +1039,6 @@ void NativeGeneralJump::replace_mt_safe(address instr_addr, address code_buffer)
// Make sure the first-patched instruction, which may co-exist
// briefly with the call, will do something harmless.
assert(inv_op(*contention_addr) == Assembler::arith_op ||
*contention_addr == nop_instruction() || !VM_Version::v9_instructions_work(),
*contention_addr == nop_instruction(),
"must not interfere with original call");
}

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@ -70,8 +70,7 @@ class NativeInstruction VALUE_OBJ_CLASS_SPEC {
bool is_zombie() {
int x = long_at(0);
return is_op3(x,
VM_Version::v9_instructions_work() ?
Assembler::ldsw_op3 : Assembler::lduw_op3,
Assembler::ldsw_op3,
Assembler::ldst_op)
&& Assembler::inv_rs1(x) == G0
&& Assembler::inv_rd(x) == O7;

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@ -249,12 +249,10 @@ class FloatRegisterImpl: public AbstractRegisterImpl {
case D:
assert(c < 64 && (c & 1) == 0, "bad double float register");
assert(c < 32 || VM_Version::v9_instructions_work(), "V9 float work only on V9 platform");
return (c & 0x1e) | ((c & 0x20) >> 5);
case Q:
assert(c < 64 && (c & 3) == 0, "bad quad float register");
assert(c < 32 || VM_Version::v9_instructions_work(), "V9 float work only on V9 platform");
return (c & 0x1c) | ((c & 0x20) >> 5);
}
ShouldNotReachHere();

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@ -193,36 +193,6 @@ address Relocation::pd_get_address_from_code() {
return *(address*)addr();
}
int Relocation::pd_breakpoint_size() {
// minimum breakpoint size, in short words
return NativeIllegalInstruction::instruction_size / sizeof(short);
}
void Relocation::pd_swap_in_breakpoint(address x, short* instrs, int instrlen) {
Untested("pd_swap_in_breakpoint");
// %%% probably do not need a general instrlen; just use the trap size
if (instrs != NULL) {
assert(instrlen * sizeof(short) == NativeIllegalInstruction::instruction_size, "enough instrlen in reloc. data");
for (int i = 0; i < instrlen; i++) {
instrs[i] = ((short*)x)[i];
}
}
NativeIllegalInstruction::insert(x);
}
void Relocation::pd_swap_out_breakpoint(address x, short* instrs, int instrlen) {
Untested("pd_swap_out_breakpoint");
assert(instrlen * sizeof(short) == sizeof(int), "enough buf");
union { int l; short s[1]; } u;
for (int i = 0; i < instrlen; i++) {
u.s[i] = instrs[i];
}
NativeInstruction* ni = nativeInstruction_at(x);
ni->set_long_at(0, u.l);
}
void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
}

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@ -2459,7 +2459,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
// Finally just about ready to make the JNI call
__ flush_windows();
__ flushw();
if (inner_frame_created) {
__ restore();
} else {

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@ -2778,10 +2778,7 @@ enc_class Fast_Unlock(iRegP oop, iRegP box, o7RegP scratch, iRegP scratch2) %{
Register Rold = reg_to_register_object($old$$reg);
Register Rnew = reg_to_register_object($new$$reg);
// casx_under_lock picks 1 of 3 encodings:
// For 32-bit pointers you get a 32-bit CAS
// For 64-bit pointers you get a 64-bit CASX
__ casn(Rmem, Rold, Rnew); // Swap(*Rmem,Rnew) if *Rmem == Rold
__ cas_ptr(Rmem, Rold, Rnew); // Swap(*Rmem,Rnew) if *Rmem == Rold
__ cmp( Rold, Rnew );
%}
@ -3067,7 +3064,7 @@ enc_class enc_Array_Equals(o0RegP ary1, o1RegP ary2, g3RegP tmp1, notemp_iRegI r
AddressLiteral last_rethrow_addrlit(&last_rethrow);
__ sethi(last_rethrow_addrlit, L1);
Address addr(L1, last_rethrow_addrlit.low10());
__ get_pc(L2);
__ rdpc(L2);
__ inc(L2, 3 * BytesPerInstWord); // skip this & 2 more insns to point at jump_to
__ st_ptr(L2, addr);
__ restore();

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@ -566,7 +566,7 @@ class StubGenerator: public StubCodeGenerator {
StubCodeMark mark(this, "StubRoutines", "flush_callers_register_windows");
address start = __ pc();
__ flush_windows();
__ flushw();
__ retl(false);
__ delayed()->add( FP, STACK_BIAS, O0 );
// The returned value must be a stack pointer whose register save area
@ -575,67 +575,9 @@ class StubGenerator: public StubCodeGenerator {
return start;
}
// Helper functions for v8 atomic operations.
//
void get_v8_oop_lock_ptr(Register lock_ptr_reg, Register mark_oop_reg, Register scratch_reg) {
if (mark_oop_reg == noreg) {
address lock_ptr = (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr();
__ set((intptr_t)lock_ptr, lock_ptr_reg);
} else {
assert(scratch_reg != noreg, "just checking");
address lock_ptr = (address)StubRoutines::Sparc::_v8_oop_lock_cache;
__ set((intptr_t)lock_ptr, lock_ptr_reg);
__ and3(mark_oop_reg, StubRoutines::Sparc::v8_oop_lock_mask_in_place, scratch_reg);
__ add(lock_ptr_reg, scratch_reg, lock_ptr_reg);
}
}
void generate_v8_lock_prologue(Register lock_reg, Register lock_ptr_reg, Register yield_reg, Label& retry, Label& dontyield, Register mark_oop_reg = noreg, Register scratch_reg = noreg) {
get_v8_oop_lock_ptr(lock_ptr_reg, mark_oop_reg, scratch_reg);
__ set(StubRoutines::Sparc::locked, lock_reg);
// Initialize yield counter
__ mov(G0,yield_reg);
__ BIND(retry);
__ cmp_and_br_short(yield_reg, V8AtomicOperationUnderLockSpinCount, Assembler::less, Assembler::pt, dontyield);
// This code can only be called from inside the VM, this
// stub is only invoked from Atomic::add(). We do not
// want to use call_VM, because _last_java_sp and such
// must already be set.
//
// Save the regs and make space for a C call
__ save(SP, -96, SP);
__ save_all_globals_into_locals();
BLOCK_COMMENT("call os::naked_sleep");
__ call(CAST_FROM_FN_PTR(address, os::naked_sleep));
__ delayed()->nop();
__ restore_globals_from_locals();
__ restore();
// reset the counter
__ mov(G0,yield_reg);
__ BIND(dontyield);
// try to get lock
__ swap(lock_ptr_reg, 0, lock_reg);
// did we get the lock?
__ cmp(lock_reg, StubRoutines::Sparc::unlocked);
__ br(Assembler::notEqual, true, Assembler::pn, retry);
__ delayed()->add(yield_reg,1,yield_reg);
// yes, got lock. do the operation here.
}
void generate_v8_lock_epilogue(Register lock_reg, Register lock_ptr_reg, Register yield_reg, Label& retry, Label& dontyield, Register mark_oop_reg = noreg, Register scratch_reg = noreg) {
__ st(lock_reg, lock_ptr_reg, 0); // unlock
}
// Support for jint Atomic::xchg(jint exchange_value, volatile jint* dest).
//
// Arguments :
// Arguments:
//
// exchange_value: O0
// dest: O1
@ -656,33 +598,14 @@ class StubGenerator: public StubCodeGenerator {
__ mov(O0, O3); // scratch copy of exchange value
__ ld(O1, 0, O2); // observe the previous value
// try to replace O2 with O3
__ cas_under_lock(O1, O2, O3,
(address)StubRoutines::Sparc::atomic_memory_operation_lock_addr(),false);
__ cas(O1, O2, O3);
__ cmp_and_br_short(O2, O3, Assembler::notEqual, Assembler::pn, retry);
__ retl(false);
__ delayed()->mov(O2, O0); // report previous value to caller
} else {
if (VM_Version::v9_instructions_work()) {
__ retl(false);
__ delayed()->swap(O1, 0, O0);
} else {
const Register& lock_reg = O2;
const Register& lock_ptr_reg = O3;
const Register& yield_reg = O4;
Label retry;
Label dontyield;
generate_v8_lock_prologue(lock_reg, lock_ptr_reg, yield_reg, retry, dontyield);
// got the lock, do the swap
__ swap(O1, 0, O0);
generate_v8_lock_epilogue(lock_reg, lock_ptr_reg, yield_reg, retry, dontyield);
__ retl(false);
__ delayed()->nop();
}
__ retl(false);
__ delayed()->swap(O1, 0, O0);
}
return start;
@ -691,7 +614,7 @@ class StubGenerator: public StubCodeGenerator {
// Support for jint Atomic::cmpxchg(jint exchange_value, volatile jint* dest, jint compare_value)
//
// Arguments :
// Arguments:
//
// exchange_value: O0
// dest: O1
@ -701,15 +624,12 @@ class StubGenerator: public StubCodeGenerator {
//
// O0: the value previously stored in dest
//
// Overwrites (v8): O3,O4,O5
//
address generate_atomic_cmpxchg() {
StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg");
address start = __ pc();
// cmpxchg(dest, compare_value, exchange_value)
__ cas_under_lock(O1, O2, O0,
(address)StubRoutines::Sparc::atomic_memory_operation_lock_addr(),false);
__ cas(O1, O2, O0);
__ retl(false);
__ delayed()->nop();
@ -718,7 +638,7 @@ class StubGenerator: public StubCodeGenerator {
// Support for jlong Atomic::cmpxchg(jlong exchange_value, volatile jlong *dest, jlong compare_value)
//
// Arguments :
// Arguments:
//
// exchange_value: O1:O0
// dest: O2
@ -728,17 +648,12 @@ class StubGenerator: public StubCodeGenerator {
//
// O1:O0: the value previously stored in dest
//
// This only works on V9, on V8 we don't generate any
// code and just return NULL.
//
// Overwrites: G1,G2,G3
//
address generate_atomic_cmpxchg_long() {
StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg_long");
address start = __ pc();
if (!VM_Version::supports_cx8())
return NULL;;
__ sllx(O0, 32, O0);
__ srl(O1, 0, O1);
__ or3(O0,O1,O0); // O0 holds 64-bit value from compare_value
@ -756,7 +671,7 @@ class StubGenerator: public StubCodeGenerator {
// Support for jint Atomic::add(jint add_value, volatile jint* dest).
//
// Arguments :
// Arguments:
//
// add_value: O0 (e.g., +1 or -1)
// dest: O1
@ -765,47 +680,22 @@ class StubGenerator: public StubCodeGenerator {
//
// O0: the new value stored in dest
//
// Overwrites (v9): O3
// Overwrites (v8): O3,O4,O5
// Overwrites: O3
//
address generate_atomic_add() {
StubCodeMark mark(this, "StubRoutines", "atomic_add");
address start = __ pc();
__ BIND(_atomic_add_stub);
if (VM_Version::v9_instructions_work()) {
Label(retry);
__ BIND(retry);
Label(retry);
__ BIND(retry);
__ lduw(O1, 0, O2);
__ add(O0, O2, O3);
__ cas(O1, O2, O3);
__ cmp_and_br_short(O2, O3, Assembler::notEqual, Assembler::pn, retry);
__ retl(false);
__ delayed()->add(O0, O2, O0); // note that cas made O2==O3
} else {
const Register& lock_reg = O2;
const Register& lock_ptr_reg = O3;
const Register& value_reg = O4;
const Register& yield_reg = O5;
Label(retry);
Label(dontyield);
generate_v8_lock_prologue(lock_reg, lock_ptr_reg, yield_reg, retry, dontyield);
// got lock, do the increment
__ ld(O1, 0, value_reg);
__ add(O0, value_reg, value_reg);
__ st(value_reg, O1, 0);
// %%% only for RMO and PSO
__ membar(Assembler::StoreStore);
generate_v8_lock_epilogue(lock_reg, lock_ptr_reg, yield_reg, retry, dontyield);
__ retl(false);
__ delayed()->mov(value_reg, O0);
}
__ lduw(O1, 0, O2);
__ add(O0, O2, O3);
__ cas(O1, O2, O3);
__ cmp_and_br_short(O2, O3, Assembler::notEqual, Assembler::pn, retry);
__ retl(false);
__ delayed()->add(O0, O2, O0); // note that cas made O2==O3
return start;
}
@ -841,7 +731,7 @@ class StubGenerator: public StubCodeGenerator {
__ mov(G3, L3);
__ mov(G4, L4);
__ mov(G5, L5);
for (i = 0; i < (VM_Version::v9_instructions_work() ? 64 : 32); i += 2) {
for (i = 0; i < 64; i += 2) {
__ stf(FloatRegisterImpl::D, as_FloatRegister(i), preserve_addr, i * wordSize);
}
@ -855,7 +745,7 @@ class StubGenerator: public StubCodeGenerator {
__ mov(L3, G3);
__ mov(L4, G4);
__ mov(L5, G5);
for (i = 0; i < (VM_Version::v9_instructions_work() ? 64 : 32); i += 2) {
for (i = 0; i < 64; i += 2) {
__ ldf(FloatRegisterImpl::D, preserve_addr, as_FloatRegister(i), i * wordSize);
}

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@ -52,7 +52,3 @@ address StubRoutines::Sparc::_stop_subroutine_entry = NULL;
address StubRoutines::Sparc::_flush_callers_register_windows_entry = CAST_FROM_FN_PTR(address, bootstrap_flush_windows);
address StubRoutines::Sparc::_partial_subtype_check = NULL;
int StubRoutines::Sparc::_atomic_memory_operation_lock = StubRoutines::Sparc::unlocked;
int StubRoutines::Sparc::_v8_oop_lock_cache[StubRoutines::Sparc::nof_v8_oop_lock_cache_entries];

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@ -47,46 +47,14 @@ enum /* platform_dependent_constants */ {
class Sparc {
friend class StubGenerator;
public:
enum { nof_instance_allocators = 10 };
// allocator lock values
enum {
unlocked = 0,
locked = 1
};
enum {
v8_oop_lock_ignore_bits = 2,
v8_oop_lock_bits = 4,
nof_v8_oop_lock_cache_entries = 1 << (v8_oop_lock_bits+v8_oop_lock_ignore_bits),
v8_oop_lock_mask = right_n_bits(v8_oop_lock_bits),
v8_oop_lock_mask_in_place = v8_oop_lock_mask << v8_oop_lock_ignore_bits
};
static int _v8_oop_lock_cache[nof_v8_oop_lock_cache_entries];
private:
static address _test_stop_entry;
static address _stop_subroutine_entry;
static address _flush_callers_register_windows_entry;
static int _atomic_memory_operation_lock;
static address _partial_subtype_check;
public:
// %%% global lock for everyone who needs to use atomic_compare_and_exchange
// %%% or atomic_increment -- should probably use more locks for more
// %%% scalability-- for instance one for each eden space or group of
// address of the lock for atomic_compare_and_exchange
static int* atomic_memory_operation_lock_addr() { return &_atomic_memory_operation_lock; }
// accessor and mutator for _atomic_memory_operation_lock
static int atomic_memory_operation_lock() { return _atomic_memory_operation_lock; }
static void set_atomic_memory_operation_lock(int value) { _atomic_memory_operation_lock = value; }
// test assembler stop routine by setting registers
static void (*test_stop_entry()) () { return CAST_TO_FN_PTR(void (*)(void), _test_stop_entry); }

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@ -1054,7 +1054,7 @@ address InterpreterGenerator::generate_native_entry(bool synchronized) {
// flush the windows now. We don't care about the current (protection) frame
// only the outer frames
__ flush_windows();
__ flushw();
// mark windows as flushed
Address flags(G2_thread, JavaThread::frame_anchor_offset() + JavaFrameAnchor::flags_offset());

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@ -1338,14 +1338,13 @@ void TemplateTable::lneg() {
void TemplateTable::fneg() {
transition(ftos, ftos);
__ fneg(FloatRegisterImpl::S, Ftos_f);
__ fneg(FloatRegisterImpl::S, Ftos_f, Ftos_f);
}
void TemplateTable::dneg() {
transition(dtos, dtos);
// v8 has fnegd if source and dest are the same
__ fneg(FloatRegisterImpl::D, Ftos_f);
__ fneg(FloatRegisterImpl::D, Ftos_f, Ftos_f);
}
@ -1470,19 +1469,10 @@ void TemplateTable::convert() {
__ st_long(Otos_l, __ d_tmp);
__ ldf(FloatRegisterImpl::D, __ d_tmp, Ftos_d);
if (VM_Version::v9_instructions_work()) {
if (bytecode() == Bytecodes::_l2f) {
__ fxtof(FloatRegisterImpl::S, Ftos_d, Ftos_f);
} else {
__ fxtof(FloatRegisterImpl::D, Ftos_d, Ftos_d);
}
if (bytecode() == Bytecodes::_l2f) {
__ fxtof(FloatRegisterImpl::S, Ftos_d, Ftos_f);
} else {
__ call_VM_leaf(
Lscratch,
bytecode() == Bytecodes::_l2f
? CAST_FROM_FN_PTR(address, SharedRuntime::l2f)
: CAST_FROM_FN_PTR(address, SharedRuntime::l2d)
);
__ fxtof(FloatRegisterImpl::D, Ftos_d, Ftos_d);
}
break;
@ -1490,11 +1480,6 @@ void TemplateTable::convert() {
Label isNaN;
// result must be 0 if value is NaN; test by comparing value to itself
__ fcmp(FloatRegisterImpl::S, Assembler::fcc0, Ftos_f, Ftos_f);
// According to the v8 manual, you have to have a non-fp instruction
// between fcmp and fb.
if (!VM_Version::v9_instructions_work()) {
__ nop();
}
__ fb(Assembler::f_unordered, true, Assembler::pn, isNaN);
__ delayed()->clr(Otos_i); // NaN
__ ftoi(FloatRegisterImpl::S, Ftos_f, F30);
@ -1537,16 +1522,7 @@ void TemplateTable::convert() {
break;
case Bytecodes::_d2f:
if (VM_Version::v9_instructions_work()) {
__ ftof( FloatRegisterImpl::D, FloatRegisterImpl::S, Ftos_d, Ftos_f);
}
else {
// must uncache tos
__ push_d();
__ pop_i(O0);
__ pop_i(O1);
__ call_VM_leaf(Lscratch, CAST_FROM_FN_PTR(address, SharedRuntime::d2f));
}
break;
default: ShouldNotReachHere();
@ -1956,17 +1932,8 @@ void TemplateTable::fast_binaryswitch() {
__ ld( Rarray, Rscratch, Rscratch );
// (Rscratch is already in the native byte-ordering.)
__ cmp( Rkey, Rscratch );
if ( VM_Version::v9_instructions_work() ) {
__ movcc( Assembler::less, false, Assembler::icc, Rh, Rj ); // j = h if (key < array[h].fast_match())
__ movcc( Assembler::greaterEqual, false, Assembler::icc, Rh, Ri ); // i = h if (key >= array[h].fast_match())
}
else {
Label end_of_if;
__ br( Assembler::less, true, Assembler::pt, end_of_if );
__ delayed()->mov( Rh, Rj ); // if (<) Rj = Rh
__ mov( Rh, Ri ); // else i = h
__ bind(end_of_if); // }
}
__ movcc( Assembler::less, false, Assembler::icc, Rh, Rj ); // j = h if (key < array[h].fast_match())
__ movcc( Assembler::greaterEqual, false, Assembler::icc, Rh, Ri ); // i = h if (key >= array[h].fast_match())
// while (i+1 < j)
__ bind( entry );
@ -3418,9 +3385,7 @@ void TemplateTable::_new() {
// has been allocated.
__ cmp_and_brx_short(RnewTopValue, RendValue, Assembler::greaterUnsigned, Assembler::pn, slow_case);
__ casx_under_lock(RtopAddr, RoldTopValue, RnewTopValue,
VM_Version::v9_instructions_work() ? NULL :
(address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
__ cas_ptr(RtopAddr, RoldTopValue, RnewTopValue);
// if someone beat us on the allocation, try again, otherwise continue
__ cmp_and_brx_short(RoldTopValue, RnewTopValue, Assembler::notEqual, Assembler::pn, retry);
@ -3701,14 +3666,7 @@ void TemplateTable::monitorenter() {
__ verify_oop(O4); // verify each monitor's oop
__ tst(O4); // is this entry unused?
if (VM_Version::v9_instructions_work())
__ movcc( Assembler::zero, false, Assembler::ptr_cc, O3, O1);
else {
Label L;
__ br( Assembler::zero, true, Assembler::pn, L );
__ delayed()->mov(O3, O1); // rememeber this one if match
__ bind(L);
}
__ movcc( Assembler::zero, false, Assembler::ptr_cc, O3, O1);
__ cmp(O4, O0); // check if current entry is for same object
__ brx( Assembler::equal, false, Assembler::pn, exit );

View File

@ -75,23 +75,14 @@ void VM_Version::initialize() {
FLAG_SET_DEFAULT(AllocatePrefetchStyle, 1);
}
if (has_v9()) {
assert(ArraycopySrcPrefetchDistance < 4096, "invalid value");
if (ArraycopySrcPrefetchDistance >= 4096)
ArraycopySrcPrefetchDistance = 4064;
assert(ArraycopyDstPrefetchDistance < 4096, "invalid value");
if (ArraycopyDstPrefetchDistance >= 4096)
ArraycopyDstPrefetchDistance = 4064;
} else {
if (ArraycopySrcPrefetchDistance > 0) {
warning("prefetch instructions are not available on this CPU");
FLAG_SET_DEFAULT(ArraycopySrcPrefetchDistance, 0);
}
if (ArraycopyDstPrefetchDistance > 0) {
warning("prefetch instructions are not available on this CPU");
FLAG_SET_DEFAULT(ArraycopyDstPrefetchDistance, 0);
}
}
guarantee(VM_Version::has_v9(), "only SPARC v9 is supported");
assert(ArraycopySrcPrefetchDistance < 4096, "invalid value");
if (ArraycopySrcPrefetchDistance >= 4096)
ArraycopySrcPrefetchDistance = 4064;
assert(ArraycopyDstPrefetchDistance < 4096, "invalid value");
if (ArraycopyDstPrefetchDistance >= 4096)
ArraycopyDstPrefetchDistance = 4064;
UseSSE = 0; // Only on x86 and x64

View File

@ -177,10 +177,6 @@ public:
return AllocatePrefetchDistance > 0 ? AllocatePrefetchStyle : 0;
}
// Legacy
static bool v8_instructions_work() { return has_v8() && !has_v9(); }
static bool v9_instructions_work() { return has_v9(); }
// Assembler testing
static void allow_all();
static void revert();

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -1673,6 +1673,11 @@ void Assembler::movdqa(XMMRegister dst, XMMRegister src) {
emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_66);
}
void Assembler::movdqa(XMMRegister dst, Address src) {
NOT_LP64(assert(VM_Version::supports_sse2(), ""));
emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_66);
}
void Assembler::movdqu(XMMRegister dst, Address src) {
NOT_LP64(assert(VM_Version::supports_sse2(), ""));
emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_F3);
@ -2286,6 +2291,38 @@ void Assembler::pcmpestri(XMMRegister dst, XMMRegister src, int imm8) {
emit_int8(imm8);
}
void Assembler::pextrd(Register dst, XMMRegister src, int imm8) {
assert(VM_Version::supports_sse4_1(), "");
int encode = simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, false);
emit_int8(0x16);
emit_int8((unsigned char)(0xC0 | encode));
emit_int8(imm8);
}
void Assembler::pextrq(Register dst, XMMRegister src, int imm8) {
assert(VM_Version::supports_sse4_1(), "");
int encode = simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, true);
emit_int8(0x16);
emit_int8((unsigned char)(0xC0 | encode));
emit_int8(imm8);
}
void Assembler::pinsrd(XMMRegister dst, Register src, int imm8) {
assert(VM_Version::supports_sse4_1(), "");
int encode = simd_prefix_and_encode(dst, dst, as_XMMRegister(src->encoding()), VEX_SIMD_66, VEX_OPCODE_0F_3A, false);
emit_int8(0x22);
emit_int8((unsigned char)(0xC0 | encode));
emit_int8(imm8);
}
void Assembler::pinsrq(XMMRegister dst, Register src, int imm8) {
assert(VM_Version::supports_sse4_1(), "");
int encode = simd_prefix_and_encode(dst, dst, as_XMMRegister(src->encoding()), VEX_SIMD_66, VEX_OPCODE_0F_3A, true);
emit_int8(0x22);
emit_int8((unsigned char)(0xC0 | encode));
emit_int8(imm8);
}
void Assembler::pmovzxbw(XMMRegister dst, Address src) {
assert(VM_Version::supports_sse4_1(), "");
InstructionMark im(this);
@ -3691,6 +3728,16 @@ void Assembler::vpbroadcastd(XMMRegister dst, XMMRegister src) {
emit_int8((unsigned char)(0xC0 | encode));
}
// Carry-Less Multiplication Quadword
void Assembler::vpclmulqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int mask) {
assert(VM_Version::supports_avx() && VM_Version::supports_clmul(), "");
bool vector256 = false;
int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A);
emit_int8(0x44);
emit_int8((unsigned char)(0xC0 | encode));
emit_int8((unsigned char)mask);
}
void Assembler::vzeroupper() {
assert(VM_Version::supports_avx(), "");
(void)vex_prefix_and_encode(xmm0, xmm0, xmm0, VEX_SIMD_NONE);

View File

@ -1266,6 +1266,7 @@ private:
// Move Aligned Double Quadword
void movdqa(XMMRegister dst, XMMRegister src);
void movdqa(XMMRegister dst, Address src);
// Move Unaligned Double Quadword
void movdqu(Address dst, XMMRegister src);
@ -1404,6 +1405,14 @@ private:
void pcmpestri(XMMRegister xmm1, XMMRegister xmm2, int imm8);
void pcmpestri(XMMRegister xmm1, Address src, int imm8);
// SSE 4.1 extract
void pextrd(Register dst, XMMRegister src, int imm8);
void pextrq(Register dst, XMMRegister src, int imm8);
// SSE 4.1 insert
void pinsrd(XMMRegister dst, Register src, int imm8);
void pinsrq(XMMRegister dst, Register src, int imm8);
// SSE4.1 packed move
void pmovzxbw(XMMRegister dst, XMMRegister src);
void pmovzxbw(XMMRegister dst, Address src);
@ -1764,6 +1773,9 @@ private:
// duplicate 4-bytes integer data from src into 8 locations in dest
void vpbroadcastd(XMMRegister dst, XMMRegister src);
// Carry-Less Multiplication Quadword
void vpclmulqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int mask);
// AVX instruction which is used to clear upper 128 bits of YMM registers and
// to avoid transaction penalty between AVX and SSE states. There is no
// penalty if legacy SSE instructions are encoded using VEX prefix because

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -3512,6 +3512,22 @@ void LIR_Assembler::emit_arraycopy(LIR_OpArrayCopy* op) {
__ bind(*stub->continuation());
}
void LIR_Assembler::emit_updatecrc32(LIR_OpUpdateCRC32* op) {
assert(op->crc()->is_single_cpu(), "crc must be register");
assert(op->val()->is_single_cpu(), "byte value must be register");
assert(op->result_opr()->is_single_cpu(), "result must be register");
Register crc = op->crc()->as_register();
Register val = op->val()->as_register();
Register res = op->result_opr()->as_register();
assert_different_registers(val, crc, res);
__ lea(res, ExternalAddress(StubRoutines::crc_table_addr()));
__ notl(crc); // ~crc
__ update_byte_crc32(crc, val, res);
__ notl(crc); // ~crc
__ mov(res, crc);
}
void LIR_Assembler::emit_lock(LIR_OpLock* op) {
Register obj = op->obj_opr()->as_register(); // may not be an oop

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2005, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2005, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -932,6 +932,81 @@ void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
__ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
}
void LIRGenerator::do_update_CRC32(Intrinsic* x) {
assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
// Make all state_for calls early since they can emit code
LIR_Opr result = rlock_result(x);
int flags = 0;
switch (x->id()) {
case vmIntrinsics::_updateCRC32: {
LIRItem crc(x->argument_at(0), this);
LIRItem val(x->argument_at(1), this);
crc.load_item();
val.load_item();
__ update_crc32(crc.result(), val.result(), result);
break;
}
case vmIntrinsics::_updateBytesCRC32:
case vmIntrinsics::_updateByteBufferCRC32: {
bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
LIRItem crc(x->argument_at(0), this);
LIRItem buf(x->argument_at(1), this);
LIRItem off(x->argument_at(2), this);
LIRItem len(x->argument_at(3), this);
buf.load_item();
off.load_nonconstant();
LIR_Opr index = off.result();
int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
if(off.result()->is_constant()) {
index = LIR_OprFact::illegalOpr;
offset += off.result()->as_jint();
}
LIR_Opr base_op = buf.result();
#ifndef _LP64
if (!is_updateBytes) { // long b raw address
base_op = new_register(T_INT);
__ convert(Bytecodes::_l2i, buf.result(), base_op);
}
#else
if (index->is_valid()) {
LIR_Opr tmp = new_register(T_LONG);
__ convert(Bytecodes::_i2l, index, tmp);
index = tmp;
}
#endif
LIR_Address* a = new LIR_Address(base_op,
index,
LIR_Address::times_1,
offset,
T_BYTE);
BasicTypeList signature(3);
signature.append(T_INT);
signature.append(T_ADDRESS);
signature.append(T_INT);
CallingConvention* cc = frame_map()->c_calling_convention(&signature);
const LIR_Opr result_reg = result_register_for(x->type());
LIR_Opr addr = new_pointer_register();
__ leal(LIR_OprFact::address(a), addr);
crc.load_item_force(cc->at(0));
__ move(addr, cc->at(1));
len.load_item_force(cc->at(2));
__ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
__ move(result_reg, result);
break;
}
default: {
ShouldNotReachHere();
}
}
}
// _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
// _i2b, _i2c, _i2s

View File

@ -50,8 +50,9 @@ define_pd_global(intx, InitialCodeCacheSize, 160*K);
define_pd_global(intx, ReservedCodeCacheSize, 32*M );
define_pd_global(bool, ProfileInterpreter, false);
define_pd_global(intx, CodeCacheExpansionSize, 32*K );
define_pd_global(uintx,CodeCacheMinBlockLength, 1);
define_pd_global(uintx,MetaspaceSize, 12*M );
define_pd_global(uintx, CodeCacheMinBlockLength, 1);
define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K);
define_pd_global(uintx, MetaspaceSize, 12*M );
define_pd_global(bool, NeverActAsServerClassMachine, true );
define_pd_global(uint64_t,MaxRAM, 1ULL*G);
define_pd_global(bool, CICompileOSR, true );

View File

@ -85,7 +85,8 @@ define_pd_global(bool, OptoScheduling, false);
define_pd_global(bool, OptoBundling, false);
define_pd_global(intx, ReservedCodeCacheSize, 48*M);
define_pd_global(uintx,CodeCacheMinBlockLength, 4);
define_pd_global(uintx, CodeCacheMinBlockLength, 4);
define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K);
// Heap related flags
define_pd_global(uintx,MetaspaceSize, ScaleForWordSize(16*M));

View File

@ -587,7 +587,7 @@ bool frame::is_interpreted_frame_valid(JavaThread* thread) const {
// validate ConstantPoolCache*
ConstantPoolCache* cp = *interpreter_frame_cache_addr();
if (cp == NULL || !cp->is_metadata()) return false;
if (cp == NULL || !cp->is_metaspace_object()) return false;
// validate locals

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -55,7 +55,7 @@ define_pd_global(intx, OptoLoopAlignment, 16);
define_pd_global(intx, InlineFrequencyCount, 100);
define_pd_global(intx, InlineSmallCode, 1000);
define_pd_global(intx, StackYellowPages, 2);
define_pd_global(intx, StackYellowPages, NOT_WINDOWS(2) WINDOWS_ONLY(3));
define_pd_global(intx, StackRedPages, 1);
#ifdef AMD64
// Very large C++ stack frames using solaris-amd64 optimized builds
@ -96,6 +96,9 @@ define_pd_global(uintx, CMSYoungGenPerWorker, 64*M); // default max size of CMS
product(intx, UseAVX, 99, \
"Highest supported AVX instructions set on x86/x64") \
\
product(bool, UseCLMUL, false, \
"Control whether CLMUL instructions can be used on x86/x64") \
\
diagnostic(bool, UseIncDec, true, \
"Use INC, DEC instructions on x86") \
\

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -39,6 +39,8 @@
address generate_empty_entry(void);
address generate_accessor_entry(void);
address generate_Reference_get_entry();
address generate_CRC32_update_entry();
address generate_CRC32_updateBytes_entry(AbstractInterpreter::MethodKind kind);
void lock_method(void);
void generate_stack_overflow_check(void);

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -2794,6 +2794,15 @@ void MacroAssembler::movdqu(XMMRegister dst, AddressLiteral src) {
}
}
void MacroAssembler::movdqa(XMMRegister dst, AddressLiteral src) {
if (reachable(src)) {
Assembler::movdqa(dst, as_Address(src));
} else {
lea(rscratch1, src);
Assembler::movdqa(dst, Address(rscratch1, 0));
}
}
void MacroAssembler::movsd(XMMRegister dst, AddressLiteral src) {
if (reachable(src)) {
Assembler::movsd(dst, as_Address(src));
@ -6388,6 +6397,193 @@ void MacroAssembler::encode_iso_array(Register src, Register dst, Register len,
bind(L_done);
}
/**
* Emits code to update CRC-32 with a byte value according to constants in table
*
* @param [in,out]crc Register containing the crc.
* @param [in]val Register containing the byte to fold into the CRC.
* @param [in]table Register containing the table of crc constants.
*
* uint32_t crc;
* val = crc_table[(val ^ crc) & 0xFF];
* crc = val ^ (crc >> 8);
*
*/
void MacroAssembler::update_byte_crc32(Register crc, Register val, Register table) {
xorl(val, crc);
andl(val, 0xFF);
shrl(crc, 8); // unsigned shift
xorl(crc, Address(table, val, Address::times_4, 0));
}
/**
* Fold 128-bit data chunk
*/
void MacroAssembler::fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, Register buf, int offset) {
vpclmulhdq(xtmp, xK, xcrc); // [123:64]
vpclmulldq(xcrc, xK, xcrc); // [63:0]
vpxor(xcrc, xcrc, Address(buf, offset), false /* vector256 */);
pxor(xcrc, xtmp);
}
void MacroAssembler::fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, XMMRegister xbuf) {
vpclmulhdq(xtmp, xK, xcrc);
vpclmulldq(xcrc, xK, xcrc);
pxor(xcrc, xbuf);
pxor(xcrc, xtmp);
}
/**
* 8-bit folds to compute 32-bit CRC
*
* uint64_t xcrc;
* timesXtoThe32[xcrc & 0xFF] ^ (xcrc >> 8);
*/
void MacroAssembler::fold_8bit_crc32(XMMRegister xcrc, Register table, XMMRegister xtmp, Register tmp) {
movdl(tmp, xcrc);
andl(tmp, 0xFF);
movdl(xtmp, Address(table, tmp, Address::times_4, 0));
psrldq(xcrc, 1); // unsigned shift one byte
pxor(xcrc, xtmp);
}
/**
* uint32_t crc;
* timesXtoThe32[crc & 0xFF] ^ (crc >> 8);
*/
void MacroAssembler::fold_8bit_crc32(Register crc, Register table, Register tmp) {
movl(tmp, crc);
andl(tmp, 0xFF);
shrl(crc, 8);
xorl(crc, Address(table, tmp, Address::times_4, 0));
}
/**
* @param crc register containing existing CRC (32-bit)
* @param buf register pointing to input byte buffer (byte*)
* @param len register containing number of bytes
* @param table register that will contain address of CRC table
* @param tmp scratch register
*/
void MacroAssembler::kernel_crc32(Register crc, Register buf, Register len, Register table, Register tmp) {
assert_different_registers(crc, buf, len, table, tmp, rax);
Label L_tail, L_tail_restore, L_tail_loop, L_exit, L_align_loop, L_aligned;
Label L_fold_tail, L_fold_128b, L_fold_512b, L_fold_512b_loop, L_fold_tail_loop;
lea(table, ExternalAddress(StubRoutines::crc_table_addr()));
notl(crc); // ~crc
cmpl(len, 16);
jcc(Assembler::less, L_tail);
// Align buffer to 16 bytes
movl(tmp, buf);
andl(tmp, 0xF);
jccb(Assembler::zero, L_aligned);
subl(tmp, 16);
addl(len, tmp);
align(4);
BIND(L_align_loop);
movsbl(rax, Address(buf, 0)); // load byte with sign extension
update_byte_crc32(crc, rax, table);
increment(buf);
incrementl(tmp);
jccb(Assembler::less, L_align_loop);
BIND(L_aligned);
movl(tmp, len); // save
shrl(len, 4);
jcc(Assembler::zero, L_tail_restore);
// Fold crc into first bytes of vector
movdqa(xmm1, Address(buf, 0));
movdl(rax, xmm1);
xorl(crc, rax);
pinsrd(xmm1, crc, 0);
addptr(buf, 16);
subl(len, 4); // len > 0
jcc(Assembler::less, L_fold_tail);
movdqa(xmm2, Address(buf, 0));
movdqa(xmm3, Address(buf, 16));
movdqa(xmm4, Address(buf, 32));
addptr(buf, 48);
subl(len, 3);
jcc(Assembler::lessEqual, L_fold_512b);
// Fold total 512 bits of polynomial on each iteration,
// 128 bits per each of 4 parallel streams.
movdqu(xmm0, ExternalAddress(StubRoutines::x86::crc_by128_masks_addr() + 32));
align(32);
BIND(L_fold_512b_loop);
fold_128bit_crc32(xmm1, xmm0, xmm5, buf, 0);
fold_128bit_crc32(xmm2, xmm0, xmm5, buf, 16);
fold_128bit_crc32(xmm3, xmm0, xmm5, buf, 32);
fold_128bit_crc32(xmm4, xmm0, xmm5, buf, 48);
addptr(buf, 64);
subl(len, 4);
jcc(Assembler::greater, L_fold_512b_loop);
// Fold 512 bits to 128 bits.
BIND(L_fold_512b);
movdqu(xmm0, ExternalAddress(StubRoutines::x86::crc_by128_masks_addr() + 16));
fold_128bit_crc32(xmm1, xmm0, xmm5, xmm2);
fold_128bit_crc32(xmm1, xmm0, xmm5, xmm3);
fold_128bit_crc32(xmm1, xmm0, xmm5, xmm4);
// Fold the rest of 128 bits data chunks
BIND(L_fold_tail);
addl(len, 3);
jccb(Assembler::lessEqual, L_fold_128b);
movdqu(xmm0, ExternalAddress(StubRoutines::x86::crc_by128_masks_addr() + 16));
BIND(L_fold_tail_loop);
fold_128bit_crc32(xmm1, xmm0, xmm5, buf, 0);
addptr(buf, 16);
decrementl(len);
jccb(Assembler::greater, L_fold_tail_loop);
// Fold 128 bits in xmm1 down into 32 bits in crc register.
BIND(L_fold_128b);
movdqu(xmm0, ExternalAddress(StubRoutines::x86::crc_by128_masks_addr()));
vpclmulqdq(xmm2, xmm0, xmm1, 0x1);
vpand(xmm3, xmm0, xmm2, false /* vector256 */);
vpclmulqdq(xmm0, xmm0, xmm3, 0x1);
psrldq(xmm1, 8);
psrldq(xmm2, 4);
pxor(xmm0, xmm1);
pxor(xmm0, xmm2);
// 8 8-bit folds to compute 32-bit CRC.
for (int j = 0; j < 4; j++) {
fold_8bit_crc32(xmm0, table, xmm1, rax);
}
movdl(crc, xmm0); // mov 32 bits to general register
for (int j = 0; j < 4; j++) {
fold_8bit_crc32(crc, table, rax);
}
BIND(L_tail_restore);
movl(len, tmp); // restore
BIND(L_tail);
andl(len, 0xf);
jccb(Assembler::zero, L_exit);
// Fold the rest of bytes
align(4);
BIND(L_tail_loop);
movsbl(rax, Address(buf, 0)); // load byte with sign extension
update_byte_crc32(crc, rax, table);
increment(buf);
decrementl(len);
jccb(Assembler::greater, L_tail_loop);
BIND(L_exit);
notl(crc); // ~c
}
#undef BIND
#undef BLOCK_COMMENT

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -899,6 +899,11 @@ public:
void movdqu(XMMRegister dst, XMMRegister src) { Assembler::movdqu(dst, src); }
void movdqu(XMMRegister dst, AddressLiteral src);
// Move Aligned Double Quadword
void movdqa(XMMRegister dst, Address src) { Assembler::movdqa(dst, src); }
void movdqa(XMMRegister dst, XMMRegister src) { Assembler::movdqa(dst, src); }
void movdqa(XMMRegister dst, AddressLiteral src);
void movsd(XMMRegister dst, XMMRegister src) { Assembler::movsd(dst, src); }
void movsd(Address dst, XMMRegister src) { Assembler::movsd(dst, src); }
void movsd(XMMRegister dst, Address src) { Assembler::movsd(dst, src); }
@ -1027,6 +1032,16 @@ public:
Assembler::vinsertf128h(dst, nds, src);
}
// Carry-Less Multiplication Quadword
void vpclmulldq(XMMRegister dst, XMMRegister nds, XMMRegister src) {
// 0x00 - multiply lower 64 bits [0:63]
Assembler::vpclmulqdq(dst, nds, src, 0x00);
}
void vpclmulhdq(XMMRegister dst, XMMRegister nds, XMMRegister src) {
// 0x11 - multiply upper 64 bits [64:127]
Assembler::vpclmulqdq(dst, nds, src, 0x11);
}
// Data
void cmov32( Condition cc, Register dst, Address src);
@ -1143,6 +1158,16 @@ public:
XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
XMMRegister tmp4, Register tmp5, Register result);
// CRC32 code for java.util.zip.CRC32::updateBytes() instrinsic.
void update_byte_crc32(Register crc, Register val, Register table);
void kernel_crc32(Register crc, Register buf, Register len, Register table, Register tmp);
// Fold 128-bit data chunk
void fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, Register buf, int offset);
void fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, XMMRegister xbuf);
// Fold 8-bit data
void fold_8bit_crc32(Register crc, Register table, Register tmp);
void fold_8bit_crc32(XMMRegister crc, Register table, XMMRegister xtmp, Register tmp);
#undef VIRTUAL
};

View File

@ -177,30 +177,6 @@ address Relocation::pd_get_address_from_code() {
return *pd_address_in_code();
}
int Relocation::pd_breakpoint_size() {
// minimum breakpoint size, in short words
return NativeIllegalInstruction::instruction_size / sizeof(short);
}
void Relocation::pd_swap_in_breakpoint(address x, short* instrs, int instrlen) {
Untested("pd_swap_in_breakpoint");
if (instrs != NULL) {
assert(instrlen * sizeof(short) == NativeIllegalInstruction::instruction_size, "enough instrlen in reloc. data");
for (int i = 0; i < instrlen; i++) {
instrs[i] = ((short*)x)[i];
}
}
NativeIllegalInstruction::insert(x);
}
void Relocation::pd_swap_out_breakpoint(address x, short* instrs, int instrlen) {
Untested("pd_swap_out_breakpoint");
assert(NativeIllegalInstruction::instruction_size == sizeof(short), "right address unit for update");
NativeInstruction* ni = nativeInstruction_at(x);
*(short*)ni->addr_at(0) = instrs[0];
}
void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
#ifdef _LP64
if (!Assembler::is_polling_page_far()) {

View File

@ -1429,6 +1429,8 @@ static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType
assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
"possible collision");
__ block_comment("unpack_array_argument {");
// Pass the length, ptr pair
Label is_null, done;
VMRegPair tmp;
@ -1453,6 +1455,8 @@ static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType
move_ptr(masm, tmp, body_arg);
move32_64(masm, tmp, length_arg);
__ bind(done);
__ block_comment("} unpack_array_argument");
}
@ -2170,27 +2174,34 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
}
}
// point c_arg at the first arg that is already loaded in case we
// need to spill before we call out
int c_arg = total_c_args - total_in_args;
int c_arg;
// Pre-load a static method's oop into r14. Used both by locking code and
// the normal JNI call code.
if (method->is_static() && !is_critical_native) {
if (!is_critical_native) {
// point c_arg at the first arg that is already loaded in case we
// need to spill before we call out
c_arg = total_c_args - total_in_args;
// load oop into a register
__ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
if (method->is_static()) {
// Now handlize the static class mirror it's known not-null.
__ movptr(Address(rsp, klass_offset), oop_handle_reg);
map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
// load oop into a register
__ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
// Now get the handle
__ lea(oop_handle_reg, Address(rsp, klass_offset));
// store the klass handle as second argument
__ movptr(c_rarg1, oop_handle_reg);
// and protect the arg if we must spill
c_arg--;
// Now handlize the static class mirror it's known not-null.
__ movptr(Address(rsp, klass_offset), oop_handle_reg);
map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
// Now get the handle
__ lea(oop_handle_reg, Address(rsp, klass_offset));
// store the klass handle as second argument
__ movptr(c_rarg1, oop_handle_reg);
// and protect the arg if we must spill
c_arg--;
}
} else {
// For JNI critical methods we need to save all registers in save_args.
c_arg = 0;
}
// Change state to native (we save the return address in the thread, since it might not

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -83,7 +83,7 @@ class StubGenerator: public StubCodeGenerator {
private:
#ifdef PRODUCT
#define inc_counter_np(counter) (0)
#define inc_counter_np(counter) ((void)0)
#else
void inc_counter_np_(int& counter) {
__ incrementl(ExternalAddress((address)&counter));
@ -2713,6 +2713,59 @@ class StubGenerator: public StubCodeGenerator {
return start;
}
/**
* Arguments:
*
* Inputs:
* rsp(4) - int crc
* rsp(8) - byte* buf
* rsp(12) - int length
*
* Ouput:
* rax - int crc result
*/
address generate_updateBytesCRC32() {
assert(UseCRC32Intrinsics, "need AVX and CLMUL instructions");
__ align(CodeEntryAlignment);
StubCodeMark mark(this, "StubRoutines", "updateBytesCRC32");
address start = __ pc();
const Register crc = rdx; // crc
const Register buf = rsi; // source java byte array address
const Register len = rcx; // length
const Register table = rdi; // crc_table address (reuse register)
const Register tmp = rbx;
assert_different_registers(crc, buf, len, table, tmp, rax);
BLOCK_COMMENT("Entry:");
__ enter(); // required for proper stackwalking of RuntimeStub frame
__ push(rsi);
__ push(rdi);
__ push(rbx);
Address crc_arg(rbp, 8 + 0);
Address buf_arg(rbp, 8 + 4);
Address len_arg(rbp, 8 + 8);
// Load up:
__ movl(crc, crc_arg);
__ movptr(buf, buf_arg);
__ movl(len, len_arg);
__ kernel_crc32(crc, buf, len, table, tmp);
__ movl(rax, crc);
__ pop(rbx);
__ pop(rdi);
__ pop(rsi);
__ leave(); // required for proper stackwalking of RuntimeStub frame
__ ret(0);
return start;
}
public:
// Information about frame layout at time of blocking runtime call.
@ -2887,6 +2940,12 @@ class StubGenerator: public StubCodeGenerator {
// Build this early so it's available for the interpreter
StubRoutines::_throw_StackOverflowError_entry = generate_throw_exception("StackOverflowError throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_StackOverflowError));
if (UseCRC32Intrinsics) {
// set table address before stub generation which use it
StubRoutines::_crc_table_adr = (address)StubRoutines::x86::_crc_table;
StubRoutines::_updateBytesCRC32 = generate_updateBytesCRC32();
}
}

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -81,7 +81,7 @@ class StubGenerator: public StubCodeGenerator {
private:
#ifdef PRODUCT
#define inc_counter_np(counter) (0)
#define inc_counter_np(counter) ((void)0)
#else
void inc_counter_np_(int& counter) {
// This can destroy rscratch1 if counter is far from the code cache
@ -3584,7 +3584,45 @@ class StubGenerator: public StubCodeGenerator {
return start;
}
/**
* Arguments:
*
* Inputs:
* c_rarg0 - int crc
* c_rarg1 - byte* buf
* c_rarg2 - int length
*
* Ouput:
* rax - int crc result
*/
address generate_updateBytesCRC32() {
assert(UseCRC32Intrinsics, "need AVX and CLMUL instructions");
__ align(CodeEntryAlignment);
StubCodeMark mark(this, "StubRoutines", "updateBytesCRC32");
address start = __ pc();
// Win64: rcx, rdx, r8, r9 (c_rarg0, c_rarg1, ...)
// Unix: rdi, rsi, rdx, rcx, r8, r9 (c_rarg0, c_rarg1, ...)
// rscratch1: r10
const Register crc = c_rarg0; // crc
const Register buf = c_rarg1; // source java byte array address
const Register len = c_rarg2; // length
const Register table = c_rarg3; // crc_table address (reuse register)
const Register tmp = r11;
assert_different_registers(crc, buf, len, table, tmp, rax);
BLOCK_COMMENT("Entry:");
__ enter(); // required for proper stackwalking of RuntimeStub frame
__ kernel_crc32(crc, buf, len, table, tmp);
__ movl(rax, crc);
__ leave(); // required for proper stackwalking of RuntimeStub frame
__ ret(0);
return start;
}
#undef __
#define __ masm->
@ -3736,6 +3774,11 @@ class StubGenerator: public StubCodeGenerator {
CAST_FROM_FN_PTR(address,
SharedRuntime::
throw_StackOverflowError));
if (UseCRC32Intrinsics) {
// set table address before stub generation which use it
StubRoutines::_crc_table_adr = (address)StubRoutines::x86::_crc_table;
StubRoutines::_updateBytesCRC32 = generate_updateBytesCRC32();
}
}
void generate_all() {

View File

@ -0,0 +1,130 @@
/*
* Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
*
*/
#include "precompiled.hpp"
#include "runtime/deoptimization.hpp"
#include "runtime/frame.inline.hpp"
#include "runtime/stubRoutines.hpp"
#include "runtime/thread.inline.hpp"
// Implementation of the platform-specific part of StubRoutines - for
// a description of how to extend it, see the stubRoutines.hpp file.
address StubRoutines::x86::_verify_mxcsr_entry = NULL;
address StubRoutines::x86::_key_shuffle_mask_addr = NULL;
uint64_t StubRoutines::x86::_crc_by128_masks[] =
{
/* The fields in this structure are arranged so that they can be
* picked up two at a time with 128-bit loads.
*
* Because of flipped bit order for this CRC polynomials
* the constant for X**N is left-shifted by 1. This is because
* a 64 x 64 polynomial multiply produces a 127-bit result
* but the highest term is always aligned to bit 0 in the container.
* Pre-shifting by one fixes this, at the cost of potentially making
* the 32-bit constant no longer fit in a 32-bit container (thus the
* use of uint64_t, though this is also the size used by the carry-
* less multiply instruction.
*
* In addition, the flipped bit order and highest-term-at-least-bit
* multiply changes the constants used. The 96-bit result will be
* aligned to the high-term end of the target 128-bit container,
* not the low-term end; that is, instead of a 512-bit or 576-bit fold,
* instead it is a 480 (=512-32) or 544 (=512+64-32) bit fold.
*
* This cause additional problems in the 128-to-64-bit reduction; see the
* code for details. By storing a mask in the otherwise unused half of
* a 128-bit constant, bits can be cleared before multiplication without
* storing and reloading. Note that staying on a 128-bit datapath means
* that some data is uselessly stored and some unused data is intersected
* with an irrelevant constant.
*/
((uint64_t) 0xffffffffUL), /* low of K_M_64 */
((uint64_t) 0xb1e6b092U << 1), /* high of K_M_64 */
((uint64_t) 0xba8ccbe8U << 1), /* low of K_160_96 */
((uint64_t) 0x6655004fU << 1), /* high of K_160_96 */
((uint64_t) 0xaa2215eaU << 1), /* low of K_544_480 */
((uint64_t) 0xe3720acbU << 1) /* high of K_544_480 */
};
/**
* crc_table[] from jdk/src/share/native/java/util/zip/zlib-1.2.5/crc32.h
*/
juint StubRoutines::x86::_crc_table[] =
{
0x00000000UL, 0x77073096UL, 0xee0e612cUL, 0x990951baUL, 0x076dc419UL,
0x706af48fUL, 0xe963a535UL, 0x9e6495a3UL, 0x0edb8832UL, 0x79dcb8a4UL,
0xe0d5e91eUL, 0x97d2d988UL, 0x09b64c2bUL, 0x7eb17cbdUL, 0xe7b82d07UL,
0x90bf1d91UL, 0x1db71064UL, 0x6ab020f2UL, 0xf3b97148UL, 0x84be41deUL,
0x1adad47dUL, 0x6ddde4ebUL, 0xf4d4b551UL, 0x83d385c7UL, 0x136c9856UL,
0x646ba8c0UL, 0xfd62f97aUL, 0x8a65c9ecUL, 0x14015c4fUL, 0x63066cd9UL,
0xfa0f3d63UL, 0x8d080df5UL, 0x3b6e20c8UL, 0x4c69105eUL, 0xd56041e4UL,
0xa2677172UL, 0x3c03e4d1UL, 0x4b04d447UL, 0xd20d85fdUL, 0xa50ab56bUL,
0x35b5a8faUL, 0x42b2986cUL, 0xdbbbc9d6UL, 0xacbcf940UL, 0x32d86ce3UL,
0x45df5c75UL, 0xdcd60dcfUL, 0xabd13d59UL, 0x26d930acUL, 0x51de003aUL,
0xc8d75180UL, 0xbfd06116UL, 0x21b4f4b5UL, 0x56b3c423UL, 0xcfba9599UL,
0xb8bda50fUL, 0x2802b89eUL, 0x5f058808UL, 0xc60cd9b2UL, 0xb10be924UL,
0x2f6f7c87UL, 0x58684c11UL, 0xc1611dabUL, 0xb6662d3dUL, 0x76dc4190UL,
0x01db7106UL, 0x98d220bcUL, 0xefd5102aUL, 0x71b18589UL, 0x06b6b51fUL,
0x9fbfe4a5UL, 0xe8b8d433UL, 0x7807c9a2UL, 0x0f00f934UL, 0x9609a88eUL,
0xe10e9818UL, 0x7f6a0dbbUL, 0x086d3d2dUL, 0x91646c97UL, 0xe6635c01UL,
0x6b6b51f4UL, 0x1c6c6162UL, 0x856530d8UL, 0xf262004eUL, 0x6c0695edUL,
0x1b01a57bUL, 0x8208f4c1UL, 0xf50fc457UL, 0x65b0d9c6UL, 0x12b7e950UL,
0x8bbeb8eaUL, 0xfcb9887cUL, 0x62dd1ddfUL, 0x15da2d49UL, 0x8cd37cf3UL,
0xfbd44c65UL, 0x4db26158UL, 0x3ab551ceUL, 0xa3bc0074UL, 0xd4bb30e2UL,
0x4adfa541UL, 0x3dd895d7UL, 0xa4d1c46dUL, 0xd3d6f4fbUL, 0x4369e96aUL,
0x346ed9fcUL, 0xad678846UL, 0xda60b8d0UL, 0x44042d73UL, 0x33031de5UL,
0xaa0a4c5fUL, 0xdd0d7cc9UL, 0x5005713cUL, 0x270241aaUL, 0xbe0b1010UL,
0xc90c2086UL, 0x5768b525UL, 0x206f85b3UL, 0xb966d409UL, 0xce61e49fUL,
0x5edef90eUL, 0x29d9c998UL, 0xb0d09822UL, 0xc7d7a8b4UL, 0x59b33d17UL,
0x2eb40d81UL, 0xb7bd5c3bUL, 0xc0ba6cadUL, 0xedb88320UL, 0x9abfb3b6UL,
0x03b6e20cUL, 0x74b1d29aUL, 0xead54739UL, 0x9dd277afUL, 0x04db2615UL,
0x73dc1683UL, 0xe3630b12UL, 0x94643b84UL, 0x0d6d6a3eUL, 0x7a6a5aa8UL,
0xe40ecf0bUL, 0x9309ff9dUL, 0x0a00ae27UL, 0x7d079eb1UL, 0xf00f9344UL,
0x8708a3d2UL, 0x1e01f268UL, 0x6906c2feUL, 0xf762575dUL, 0x806567cbUL,
0x196c3671UL, 0x6e6b06e7UL, 0xfed41b76UL, 0x89d32be0UL, 0x10da7a5aUL,
0x67dd4accUL, 0xf9b9df6fUL, 0x8ebeeff9UL, 0x17b7be43UL, 0x60b08ed5UL,
0xd6d6a3e8UL, 0xa1d1937eUL, 0x38d8c2c4UL, 0x4fdff252UL, 0xd1bb67f1UL,
0xa6bc5767UL, 0x3fb506ddUL, 0x48b2364bUL, 0xd80d2bdaUL, 0xaf0a1b4cUL,
0x36034af6UL, 0x41047a60UL, 0xdf60efc3UL, 0xa867df55UL, 0x316e8eefUL,
0x4669be79UL, 0xcb61b38cUL, 0xbc66831aUL, 0x256fd2a0UL, 0x5268e236UL,
0xcc0c7795UL, 0xbb0b4703UL, 0x220216b9UL, 0x5505262fUL, 0xc5ba3bbeUL,
0xb2bd0b28UL, 0x2bb45a92UL, 0x5cb36a04UL, 0xc2d7ffa7UL, 0xb5d0cf31UL,
0x2cd99e8bUL, 0x5bdeae1dUL, 0x9b64c2b0UL, 0xec63f226UL, 0x756aa39cUL,
0x026d930aUL, 0x9c0906a9UL, 0xeb0e363fUL, 0x72076785UL, 0x05005713UL,
0x95bf4a82UL, 0xe2b87a14UL, 0x7bb12baeUL, 0x0cb61b38UL, 0x92d28e9bUL,
0xe5d5be0dUL, 0x7cdcefb7UL, 0x0bdbdf21UL, 0x86d3d2d4UL, 0xf1d4e242UL,
0x68ddb3f8UL, 0x1fda836eUL, 0x81be16cdUL, 0xf6b9265bUL, 0x6fb077e1UL,
0x18b74777UL, 0x88085ae6UL, 0xff0f6a70UL, 0x66063bcaUL, 0x11010b5cUL,
0x8f659effUL, 0xf862ae69UL, 0x616bffd3UL, 0x166ccf45UL, 0xa00ae278UL,
0xd70dd2eeUL, 0x4e048354UL, 0x3903b3c2UL, 0xa7672661UL, 0xd06016f7UL,
0x4969474dUL, 0x3e6e77dbUL, 0xaed16a4aUL, 0xd9d65adcUL, 0x40df0b66UL,
0x37d83bf0UL, 0xa9bcae53UL, 0xdebb9ec5UL, 0x47b2cf7fUL, 0x30b5ffe9UL,
0xbdbdf21cUL, 0xcabac28aUL, 0x53b39330UL, 0x24b4a3a6UL, 0xbad03605UL,
0xcdd70693UL, 0x54de5729UL, 0x23d967bfUL, 0xb3667a2eUL, 0xc4614ab8UL,
0x5d681b02UL, 0x2a6f2b94UL, 0xb40bbe37UL, 0xc30c8ea1UL, 0x5a05df1bUL,
0x2d02ef8dUL
};

View File

@ -0,0 +1,45 @@
/*
* Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
*
*/
#ifndef CPU_X86_VM_STUBROUTINES_X86_HPP
#define CPU_X86_VM_STUBROUTINES_X86_HPP
// This file holds the platform specific parts of the StubRoutines
// definition. See stubRoutines.hpp for a description on how to
// extend it.
private:
static address _verify_mxcsr_entry;
// shuffle mask for fixing up 128-bit words consisting of big-endian 32-bit integers
static address _key_shuffle_mask_addr;
// masks and table for CRC32
static uint64_t _crc_by128_masks[];
static juint _crc_table[];
public:
static address verify_mxcsr_entry() { return _verify_mxcsr_entry; }
static address key_shuffle_mask_addr() { return _key_shuffle_mask_addr; }
static address crc_by128_masks_addr() { return (address)_crc_by128_masks; }
#endif // CPU_X86_VM_STUBROUTINES_X86_32_HPP

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -31,6 +31,4 @@
// Implementation of the platform-specific part of StubRoutines - for
// a description of how to extend it, see the stubRoutines.hpp file.
address StubRoutines::x86::_verify_mxcsr_entry = NULL;
address StubRoutines::x86::_verify_fpu_cntrl_wrd_entry = NULL;
address StubRoutines::x86::_key_shuffle_mask_addr = NULL;

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -39,15 +39,12 @@ class x86 {
friend class VMStructs;
private:
static address _verify_mxcsr_entry;
static address _verify_fpu_cntrl_wrd_entry;
// shuffle mask for fixing up 128-bit words consisting of big-endian 32-bit integers
static address _key_shuffle_mask_addr;
public:
static address verify_mxcsr_entry() { return _verify_mxcsr_entry; }
static address verify_fpu_cntrl_wrd_entry() { return _verify_fpu_cntrl_wrd_entry; }
static address key_shuffle_mask_addr() { return _key_shuffle_mask_addr; }
# include "stubRoutines_x86.hpp"
};

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