8214512: ARM32: Jtreg test compiler/c2/Test8062950.java fails on ARM
Reviewed-by: dlong, enevill, bulasevich
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6a9c6a0392
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a3bb5ead7e
src/hotspot/cpu/arm
@ -8945,9 +8945,10 @@ instruct partialSubtypeCheck( R0RegP index, R1RegP sub, R2RegP super, flagsRegP
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instruct cmpFastLock(flagsRegP pcc, iRegP object, iRegP box, iRegP scratch2, iRegP scratch )
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%{
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match(Set pcc (FastLock object box));
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predicate(!(UseBiasedLocking && !UseOptoBiasInlining));
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effect(TEMP scratch, TEMP scratch2);
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ins_cost(100);
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ins_cost(DEFAULT_COST*3);
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format %{ "FASTLOCK $object, $box; KILL $scratch, $scratch2" %}
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ins_encode %{
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@ -8956,6 +8957,21 @@ instruct cmpFastLock(flagsRegP pcc, iRegP object, iRegP box, iRegP scratch2, iRe
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ins_pipe(long_memory_op);
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%}
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instruct cmpFastLock_noBiasInline(flagsRegP pcc, iRegP object, iRegP box, iRegP scratch2,
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iRegP scratch, iRegP scratch3) %{
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match(Set pcc (FastLock object box));
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predicate(UseBiasedLocking && !UseOptoBiasInlining);
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effect(TEMP scratch, TEMP scratch2, TEMP scratch3);
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ins_cost(DEFAULT_COST*5);
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format %{ "FASTLOCK $object, $box; KILL $scratch, $scratch2, $scratch3" %}
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ins_encode %{
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__ fast_lock($object$$Register, $box$$Register, $scratch$$Register, $scratch2$$Register, $scratch3$$Register);
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%}
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ins_pipe(long_memory_op);
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%}
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instruct cmpFastUnlock(flagsRegP pcc, iRegP object, iRegP box, iRegP scratch2, iRegP scratch ) %{
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match(Set pcc (FastUnlock object box));
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@ -1971,7 +1971,7 @@ void MacroAssembler::resolve(DecoratorSet decorators, Register obj) {
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#ifdef COMPILER2
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void MacroAssembler::fast_lock(Register Roop, Register Rbox, Register Rscratch, Register Rscratch2)
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void MacroAssembler::fast_lock(Register Roop, Register Rbox, Register Rscratch, Register Rscratch2, Register scratch3)
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{
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assert(VM_Version::supports_ldrex(), "unsupported, yet?");
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@ -1985,11 +1985,13 @@ void MacroAssembler::fast_lock(Register Roop, Register Rbox, Register Rscratch,
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Label fast_lock, done;
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if (UseBiasedLocking && !UseOptoBiasInlining) {
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Label failed;
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biased_locking_enter(Roop, Rmark, Rscratch, false, noreg, done, failed);
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bind(failed);
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assert(scratch3 != noreg, "need extra temporary for -XX:-UseOptoBiasInlining");
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biased_locking_enter(Roop, Rmark, Rscratch, false, scratch3, done, done);
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// Fall through if lock not biased otherwise branch to done
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}
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// Invariant: Rmark loaded below does not contain biased lock pattern
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ldr(Rmark, Address(Roop, oopDesc::mark_offset_in_bytes()));
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tst(Rmark, markOopDesc::unlocked_value);
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b(fast_lock, ne);
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@ -2016,6 +2018,9 @@ void MacroAssembler::fast_lock(Register Roop, Register Rbox, Register Rscratch,
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bind(done);
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// At this point flags are set as follows:
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// EQ -> Success
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// NE -> Failure, branch to slow path
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}
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void MacroAssembler::fast_unlock(Register Roop, Register Rbox, Register Rscratch, Register Rscratch2)
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@ -371,10 +371,10 @@ public:
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// lock_reg and obj_reg must be loaded up with the appropriate values.
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// swap_reg must be supplied.
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// tmp_reg must be supplied.
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// Optional slow case is for implementations (interpreter and C1) which branch to
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// slow case directly. If slow_case is NULL, then leaves condition
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// codes set (for C2's Fast_Lock node) and jumps to done label.
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// Falls through for the fast locking attempt.
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// Done label is branched to with condition code EQ set if the lock is
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// biased and we acquired it. Slow case label is branched to with
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// condition code NE set if the lock is biased but we failed to acquire
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// it. Otherwise fall through.
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// Returns offset of first potentially-faulting instruction for null
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// check info (currently consumed only by C1). If
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// swap_reg_contains_mark is true then returns -1 as it is assumed
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@ -1073,7 +1073,7 @@ public:
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void restore_default_fp_mode();
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#ifdef COMPILER2
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void fast_lock(Register obj, Register box, Register scratch, Register scratch2);
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void fast_lock(Register obj, Register box, Register scratch, Register scratch2, Register scratch3 = noreg);
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void fast_unlock(Register obj, Register box, Register scratch, Register scratch2);
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#endif
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