8321269: Require platforms to define DEFAULT_CACHE_LINE_SIZE

Reviewed-by: stefank, stuefe, dholmes
This commit is contained in:
Aleksey Shipilev 2023-12-05 10:35:41 +00:00
parent 1cf7ef520b
commit a56286f7ad
4 changed files with 7 additions and 1 deletions

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@ -42,6 +42,8 @@ const bool CCallingConventionRequiresIntsAsLongs = false;
// and Operational Models for ARMv8"
#define CPU_MULTI_COPY_ATOMIC
#define DEFAULT_CACHE_LINE_SIZE 64
// According to the ARMv8 ARM, "Concurrent modification and execution
// of instructions can lead to the resulting instruction performing
// any behavior that can be achieved by executing any sequence of

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@ -49,6 +49,8 @@ const bool HaveVFP = true;
// arm32 is not specified as multi-copy-atomic
// So we must not #define CPU_MULTI_COPY_ATOMIC
#define DEFAULT_CACHE_LINE_SIZE 64
#define STUBROUTINES_MD_HPP "stubRoutines_arm.hpp"
#define INTERP_MASM_MD_HPP "interp_masm_arm.hpp"
#define TEMPLATETABLE_MD_HPP "templateTable_arm.hpp"

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@ -30,6 +30,8 @@
#define SUPPORTS_NATIVE_CX8
#endif
#define DEFAULT_CACHE_LINE_SIZE 64
#define SUPPORT_MONITOR_COUNT
#include <ffi.h>

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@ -604,7 +604,7 @@ const bool support_IRIW_for_not_multiple_copy_atomic_cpu = PPC64_ONLY(true) NOT_
// The expected size in bytes of a cache line, used to pad data structures.
#ifndef DEFAULT_CACHE_LINE_SIZE
#define DEFAULT_CACHE_LINE_SIZE 64
#error "Platform should define DEFAULT_CACHE_LINE_SIZE"
#endif