8248337: sparc related code clean up after solaris removal
Reviewed-by: dholmes, kvn
This commit is contained in:
parent
f3597c4a54
commit
a588752fd6
@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2000, 2020, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2014, Red Hat Inc. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -58,7 +58,7 @@ enum {
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pd_nof_cpu_regs_linearscan = 32, // number of registers visible to linear scan
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pd_nof_fpu_regs_linearscan = pd_nof_fpu_regs_frame_map, // number of registers visible to linear scan
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pd_nof_xmm_regs_linearscan = 0, // like sparc we don't have any of these
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pd_nof_xmm_regs_linearscan = 0, // don't have vector registers
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pd_first_cpu_reg = 0,
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pd_last_cpu_reg = 16,
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pd_first_byte_reg = 0,
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@ -2072,7 +2072,7 @@ void LIR_Assembler::ic_call(LIR_OpJavaCall* op) {
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}
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/* Currently, vtable-dispatch is only enabled for sparc platforms */
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/* vtable-dispatch is not enabled for aarch64 platform*/
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void LIR_Assembler::vtable_call(LIR_OpJavaCall* op) {
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ShouldNotReachHere();
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1998, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1998, 2020, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2014, Red Hat Inc. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -39,7 +39,7 @@ class JNITypes : AllStatic {
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// I.e., they are functionally 'push' operations if they have a 'pos'
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// formal parameter. Note that jlong's and jdouble's are written
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// _in reverse_ of the order in which they appear in the interpreter
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// stack. This is because call stubs (see stubGenerator_sparc.cpp)
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// stack. This is because call stubs (see stubGenerator_arm.cpp)
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// reverse the argument list constructed by JavaCallArguments (see
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// javaCalls.hpp).
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1998, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1998, 2020, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2014, Red Hat Inc. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -33,8 +33,6 @@
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// This is the hook for finding a register in an "well-known" location,
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// such as a register block of a predetermined format.
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// Since there is none, we just return NULL.
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// See registerMap_sparc.hpp for an example of grabbing registers
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// from register save areas of a standard layout.
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address pd_location(VMReg reg) const {return NULL;}
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// no PD state to clear or copy:
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@ -823,7 +823,7 @@ int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
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}
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// On 64 bit we will store integer like items to the stack as
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// 64 bits items (sparc abi) even though java would only store
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// 64 bits items (Aarch64 abi) even though java would only store
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// 32bits for a parameter. On 32bit it will simply be 32 bits
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// So this routine will do 32->32 on 32bit and 32->64 on 64bit
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static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
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@ -1941,7 +1941,7 @@ void LIR_Assembler::ic_call(LIR_OpJavaCall *op) {
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}
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/* Currently, vtable-dispatch is only enabled for sparc platforms */
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/* vtable-dispatch is not enabled for arm platforms */
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void LIR_Assembler::vtable_call(LIR_OpJavaCall* op) {
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ShouldNotReachHere();
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2008, 2020, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -71,9 +71,9 @@
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// The interpreter and adapters will extend the frame of the caller.
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// Since oopMaps are based on the sp of the caller before extension
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// we need to know that value. However in order to compute the address
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// of the return address we need the real "raw" sp. Since sparc already
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// uses sp() to mean "raw" sp and unextended_sp() to mean the caller's
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// original sp we use that convention.
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// of the return address we need the real "raw" sp. By convention we
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// use sp() to mean "raw" sp and unextended_sp() to mean the caller's
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// original sp.
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intptr_t* _unextended_sp;
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void adjust_unextended_sp();
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@ -1617,7 +1617,7 @@ void SharedRuntime::generate_deopt_blob() {
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#ifdef COMPILER2
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//------------------------------generate_uncommon_trap_blob--------------------
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// Ought to generate an ideal graph & compile, but here's some SPARC ASM
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// Ought to generate an ideal graph & compile, but here's some ASM
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// instead.
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void SharedRuntime::generate_uncommon_trap_blob() {
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// allocate space for the code
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@ -705,6 +705,7 @@ void LIR_Assembler::ic_call(LIR_OpJavaCall* op) {
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}
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/* vtable_call is not enabled for ppc platform */
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void LIR_Assembler::vtable_call(LIR_OpJavaCall* op) {
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ShouldNotReachHere(); // ic_call is used instead.
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2002, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2002, 2020, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2012, 2013 SAP SE. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -40,7 +40,7 @@ class JNITypes : AllStatic {
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// if they have a 'pos' formal parameter. Note that jlong's and
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// jdouble's are written _in reverse_ of the order in which they
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// appear in the interpreter stack. This is because call stubs (see
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// stubGenerator_sparc.cpp) reverse the argument list constructed by
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// stubGenerator_ppc.cpp) reverse the argument list constructed by
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// JavaCallArguments (see javaCalls.hpp).
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private:
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2000, 2020, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2012, 2013 SAP SE. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -33,8 +33,6 @@
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// This is the hook for finding a register in an "well-known" location,
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// such as a register block of a predetermined format.
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// Since there is none, we just return NULL.
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// See registerMap_sparc.hpp for an example of grabbing registers
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// from register save areas of a standard layout.
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address pd_location(VMReg reg) const { return NULL; }
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// no PD state to clear or copy:
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@ -3033,7 +3033,7 @@ void TemplateTable::putstatic(int byte_no) {
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putfield_or_static(byte_no, true);
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}
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// See SPARC. On PPC64, we have a different jvmti_post_field_mod which does the job.
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// On PPC64, we have a different jvmti_post_field_mod which does the job.
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void TemplateTable::jvmti_post_fast_field_mod() {
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__ should_not_reach_here();
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}
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@ -96,7 +96,7 @@ void LIR_Assembler::clinit_barrier(ciMethod* method) {
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}
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void LIR_Assembler::osr_entry() {
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// On-stack-replacement entry sequence (interpreter frame layout described in interpreter_sparc.cpp):
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// On-stack-replacement entry sequence (interpreter frame layout described in frame_s390.hpp):
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//
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// 1. Create a new compiled activation.
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// 2. Initialize local variables in the compiled activation. The expression stack must be empty
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@ -2524,7 +2524,7 @@ void LIR_Assembler::emit_typecheck_helper(LIR_OpTypeCheck *op, Label* success, L
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Label *failure_target = op->should_profile() ? &profile_cast_failure : failure;
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Label *success_target = op->should_profile() ? &profile_cast_success : success;
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// Patching may screw with our temporaries on sparc,
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// Patching may screw with our temporaries,
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// so let's do it before loading the class.
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if (k->is_loaded()) {
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metadata2reg(k->constant_encoding(), k_RInfo);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016, 2020, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016 SAP SE. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -76,7 +76,7 @@
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);
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enum {
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max_array_allocation_length = 0x01000000 // Sparc friendly value, requires sethi only.
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max_array_allocation_length = 0x01000000
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};
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// Allocation of arrays.
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016, 2020, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016, 2018 SAP SE. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -31,7 +31,6 @@
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// Sets the default values for platform dependent flags used by the client compiler.
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// (see c1_globals.hpp)
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// Flags sorted according to sparc.
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#ifndef TIERED
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define_pd_global(bool, BackgroundCompilation, true);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016, 2020, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016, 2018 SAP SE. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -31,7 +31,6 @@
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// Sets the default values for platform dependent flags used by the server compiler.
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// (see c2_globals.hpp).
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// Sorted according to sparc.
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define_pd_global(bool, BackgroundCompilation, true);
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define_pd_global(bool, CICompileOSR, true);
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@ -31,7 +31,6 @@
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// Sets the default values for platform dependent flags used by the runtime system.
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// (see globals.hpp)
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// Sorted according to sparc.
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define_pd_global(bool, ImplicitNullChecks, true); // Generate code for implicit null checks.
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define_pd_global(bool, TrapBasedNullChecks, true);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016, 2020, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016, 2019, SAP SE. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -652,7 +652,7 @@ class StubGenerator: public StubCodeGenerator {
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assert(Universe::heap() != NULL, "java heap must be initialized to generate partial_subtype_check stub");
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}
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// Always take the slow path (see SPARC).
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// Always take the slow path.
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__ check_klass_subtype_slow_path(Rsubklass, Rsuperklass,
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Rarray_ptr, Rlength, NULL, &miss);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1997, 2020, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -112,9 +112,9 @@
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// The interpreter and adapters will extend the frame of the caller.
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// Since oopMaps are based on the sp of the caller before extension
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// we need to know that value. However in order to compute the address
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// of the return address we need the real "raw" sp. Since sparc already
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// uses sp() to mean "raw" sp and unextended_sp() to mean the caller's
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// original sp we use that convention.
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// of the return address we need the real "raw" sp. By convention we
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// use sp() to mean "raw" sp and unextended_sp() to mean the caller's
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// original sp.
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intptr_t* _unextended_sp;
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void adjust_unextended_sp() NOT_DEBUG_RETURN;
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1998, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1998, 2020, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -38,7 +38,7 @@ class JNITypes : AllStatic {
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// I.e., they are functionally 'push' operations if they have a 'pos'
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// formal parameter. Note that jlong's and jdouble's are written
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// _in reverse_ of the order in which they appear in the interpreter
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// stack. This is because call stubs (see stubGenerator_sparc.cpp)
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// stack. This is because call stubs (see stubGenerator_x86_[32,64].cpp)
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// reverse the argument list constructed by JavaCallArguments (see
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// javaCalls.hpp).
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@ -1120,7 +1120,7 @@ int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
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}
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// On 64 bit we will store integer like items to the stack as
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// 64 bits items (sparc abi) even though java would only store
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// 64 bits items (x86_32/64 abi) even though java would only store
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// 32bits for a parameter. On 32bit it will simply be 32 bits
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// So this routine will do 32->32 on 32bit and 32->64 on 64bit
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static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
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@ -1246,7 +1246,6 @@ static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
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// The calling conventions assures us that each VMregpair is either
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// all really one physical register or adjacent stack slots.
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// This greatly simplifies the cases here compared to sparc.
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if (src.first()->is_stack()) {
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if (dst.first()->is_stack()) {
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@ -1275,7 +1274,6 @@ static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
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// The calling conventions assures us that each VMregpair is either
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// all really one physical register or adjacent stack slots.
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// This greatly simplifies the cases here compared to sparc.
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if (src.is_single_phys_reg() ) {
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if (dst.is_single_phys_reg()) {
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@ -1301,7 +1299,6 @@ static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
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// The calling conventions assures us that each VMregpair is either
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// all really one physical register or adjacent stack slots.
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// This greatly simplifies the cases here compared to sparc.
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if (src.is_single_phys_reg() ) {
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if (dst.is_single_phys_reg()) {
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1998, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1998, 2020, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -32,8 +32,6 @@
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// This is the hook for finding a register in an "well-known" location,
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// such as a register block of a predetermined format.
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// Since there is none, we just return NULL.
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// See registerMap_sparc.hpp for an example of grabbing registers
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// from register save areas of a standard layout.
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address pd_location(VMReg reg) const { return NULL; }
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// no PD state to clear or copy:
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@ -321,7 +321,7 @@ bool os::have_special_privileges() {
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#ifndef SYS_gettid
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// i386: 224, ia64: 1105, amd64: 186, sparc 143
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// i386: 224, ia64: 1105, amd64: 186, sparc: 143
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#ifdef __ia64__
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#define SYS_gettid 1105
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#else
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2000, 2020, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -151,8 +151,8 @@ class FrameMap : public CompilationResourceObj {
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VMReg sp_offset2vmreg(ByteSize offset) const;
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// platform dependent hook used to check that frame is properly
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// addressable on the platform. Used by sparc to verify that all
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// stack addresses are expressable in a simm13.
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// addressable on the platform. Used by arm, ppc to verify that all
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// stack addresses are valid.
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bool validate_frame();
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static LIR_Opr map_to_opr(BasicType type, VMRegPair* reg, bool incoming);
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@ -1446,10 +1446,6 @@ void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
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LIRItem cmp (x->argument_at(2), this); // value to compare with field
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LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp
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assert(obj.type()->tag() == objectTag, "invalid type");
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// In 64bit the type can be long, sparc doesn't have this assert
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// assert(offset.type()->tag() == intTag, "invalid type");
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assert(cmp.type()->tag() == type->tag(), "invalid type");
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assert(val.type()->tag() == type->tag(), "invalid type");
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@ -2704,7 +2704,7 @@ int LinearScan::append_scope_value_for_operand(LIR_Opr opr, GrowableArray<ScopeV
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if (!frame_map()->locations_for_slot(opr->double_stack_ix(), loc_type, &loc1, NULL)) {
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bailout("too large frame");
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}
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// Does this reverse on x86 vs. sparc?
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first = new LocationValue(loc1);
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second = _int_0_scope_value;
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#else
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@ -244,7 +244,7 @@ void Runtime1::generate_blob_for(BufferBlob* buffer_blob, StubID id) {
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case unwind_exception_id:
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case counter_overflow_id:
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#if defined(PPC32)
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case handle_exception_nofpu_id: // Unused on sparc
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case handle_exception_nofpu_id:
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#endif
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expect_oop_map = false;
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break;
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2002, 2019, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2002, 2020, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -63,7 +63,7 @@ class SpaceDecorator: public AllStatic {
|
||||
// spaces are resized after an expansion.
|
||||
// The class SpaceMangler keeps a pointer to the top of the allocated
|
||||
// area and provides the methods for doing the piece meal mangling.
|
||||
// Methods for doing sparces and full checking of the mangling are
|
||||
// Methods for doing spaces and full checking of the mangling are
|
||||
// included. The full checking is done if DEBUG_MANGLING is defined.
|
||||
// GenSpaceMangler is used with the GenCollectedHeap collectors and
|
||||
// MutableSpaceMangler is used with the ParallelScavengeHeap collectors.
|
||||
|
@ -48,7 +48,6 @@
|
||||
// 31 bits, see os::random(). Also, 64-bit vm's require
|
||||
// a hash value no bigger than 32 bits because they will not
|
||||
// properly generate a mask larger than that: see library_call.cpp
|
||||
// and c1_CodePatterns_sparc.cpp.
|
||||
//
|
||||
// - the biased lock pattern is used to bias a lock toward a given
|
||||
// thread. When this pattern is set in the low three bits, the lock
|
||||
|
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Reference in New Issue
Block a user