8130653: ppc: implement MultiplyToLen intrinsic
Reviewed-by: simonis
This commit is contained in:
parent
b5284a93ce
commit
a5d8b8bf25
@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
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* Copyright 2012, 2014 SAP AG. All rights reserved.
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* Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
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* Copyright 2012, 2015 SAP AG. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -225,7 +225,7 @@ inline BasicObjectLock* frame::interpreter_frame_monitor_begin() const {
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return (BasicObjectLock *) get_ijava_state();
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}
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// SAPJVM ASc 2012-11-21. Return register stack slot addr at which currently interpreted method is found
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// Return register stack slot addr at which currently interpreted method is found.
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inline Method** frame::interpreter_frame_method_addr() const {
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return (Method**) &(get_ijava_state()->method);
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}
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@ -3433,6 +3433,376 @@ void MacroAssembler::char_arrays_equalsImm(Register str1_reg, Register str2_reg,
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bind(Ldone_false);
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}
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// dest_lo += src1 + src2
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// dest_hi += carry1 + carry2
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void MacroAssembler::add2_with_carry(Register dest_hi,
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Register dest_lo,
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Register src1, Register src2) {
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li(R0, 0);
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addc(dest_lo, dest_lo, src1);
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adde(dest_hi, dest_hi, R0);
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addc(dest_lo, dest_lo, src2);
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adde(dest_hi, dest_hi, R0);
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}
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// Multiply 64 bit by 64 bit first loop.
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void MacroAssembler::multiply_64_x_64_loop(Register x, Register xstart,
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Register x_xstart,
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Register y, Register y_idx,
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Register z,
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Register carry,
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Register product_high, Register product,
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Register idx, Register kdx,
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Register tmp) {
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// jlong carry, x[], y[], z[];
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// for (int idx=ystart, kdx=ystart+1+xstart; idx >= 0; idx--, kdx--) {
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// huge_128 product = y[idx] * x[xstart] + carry;
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// z[kdx] = (jlong)product;
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// carry = (jlong)(product >>> 64);
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// }
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// z[xstart] = carry;
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Label L_first_loop, L_first_loop_exit;
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Label L_one_x, L_one_y, L_multiply;
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addic_(xstart, xstart, -1);
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blt(CCR0, L_one_x); // Special case: length of x is 1.
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// Load next two integers of x.
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sldi(tmp, xstart, LogBytesPerInt);
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ldx(x_xstart, x, tmp);
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#ifdef VM_LITTLE_ENDIAN
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rldicl(x_xstart, x_xstart, 32, 0);
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#endif
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align(32, 16);
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bind(L_first_loop);
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cmpdi(CCR0, idx, 1);
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blt(CCR0, L_first_loop_exit);
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addi(idx, idx, -2);
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beq(CCR0, L_one_y);
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// Load next two integers of y.
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sldi(tmp, idx, LogBytesPerInt);
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ldx(y_idx, y, tmp);
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#ifdef VM_LITTLE_ENDIAN
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rldicl(y_idx, y_idx, 32, 0);
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#endif
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bind(L_multiply);
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multiply64(product_high, product, x_xstart, y_idx);
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li(tmp, 0);
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addc(product, product, carry); // Add carry to result.
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adde(product_high, product_high, tmp); // Add carry of the last addition.
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addi(kdx, kdx, -2);
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// Store result.
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#ifdef VM_LITTLE_ENDIAN
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rldicl(product, product, 32, 0);
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#endif
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sldi(tmp, kdx, LogBytesPerInt);
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stdx(product, z, tmp);
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mr_if_needed(carry, product_high);
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b(L_first_loop);
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bind(L_one_y); // Load one 32 bit portion of y as (0,value).
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lwz(y_idx, 0, y);
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b(L_multiply);
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bind( L_one_x ); // Load one 32 bit portion of x as (0,value).
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lwz(x_xstart, 0, x);
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b(L_first_loop);
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bind(L_first_loop_exit);
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}
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// Multiply 64 bit by 64 bit and add 128 bit.
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void MacroAssembler::multiply_add_128_x_128(Register x_xstart, Register y,
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Register z, Register yz_idx,
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Register idx, Register carry,
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Register product_high, Register product,
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Register tmp, int offset) {
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// huge_128 product = (y[idx] * x_xstart) + z[kdx] + carry;
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// z[kdx] = (jlong)product;
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sldi(tmp, idx, LogBytesPerInt);
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if ( offset ) {
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addi(tmp, tmp, offset);
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}
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ldx(yz_idx, y, tmp);
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#ifdef VM_LITTLE_ENDIAN
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rldicl(yz_idx, yz_idx, 32, 0);
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#endif
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multiply64(product_high, product, x_xstart, yz_idx);
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ldx(yz_idx, z, tmp);
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#ifdef VM_LITTLE_ENDIAN
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rldicl(yz_idx, yz_idx, 32, 0);
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#endif
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add2_with_carry(product_high, product, carry, yz_idx);
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sldi(tmp, idx, LogBytesPerInt);
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if ( offset ) {
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addi(tmp, tmp, offset);
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}
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#ifdef VM_LITTLE_ENDIAN
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rldicl(product, product, 32, 0);
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#endif
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stdx(product, z, tmp);
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}
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// Multiply 128 bit by 128 bit. Unrolled inner loop.
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void MacroAssembler::multiply_128_x_128_loop(Register x_xstart,
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Register y, Register z,
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Register yz_idx, Register idx, Register carry,
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Register product_high, Register product,
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Register carry2, Register tmp) {
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// jlong carry, x[], y[], z[];
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// int kdx = ystart+1;
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// for (int idx=ystart-2; idx >= 0; idx -= 2) { // Third loop
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// huge_128 product = (y[idx+1] * x_xstart) + z[kdx+idx+1] + carry;
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// z[kdx+idx+1] = (jlong)product;
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// jlong carry2 = (jlong)(product >>> 64);
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// product = (y[idx] * x_xstart) + z[kdx+idx] + carry2;
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// z[kdx+idx] = (jlong)product;
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// carry = (jlong)(product >>> 64);
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// }
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// idx += 2;
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// if (idx > 0) {
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// product = (y[idx] * x_xstart) + z[kdx+idx] + carry;
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// z[kdx+idx] = (jlong)product;
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// carry = (jlong)(product >>> 64);
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// }
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Label L_third_loop, L_third_loop_exit, L_post_third_loop_done;
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const Register jdx = R0;
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// Scale the index.
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srdi_(jdx, idx, 2);
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beq(CCR0, L_third_loop_exit);
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mtctr(jdx);
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align(32, 16);
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bind(L_third_loop);
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addi(idx, idx, -4);
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multiply_add_128_x_128(x_xstart, y, z, yz_idx, idx, carry, product_high, product, tmp, 8);
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mr_if_needed(carry2, product_high);
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multiply_add_128_x_128(x_xstart, y, z, yz_idx, idx, carry2, product_high, product, tmp, 0);
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mr_if_needed(carry, product_high);
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bdnz(L_third_loop);
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bind(L_third_loop_exit); // Handle any left-over operand parts.
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andi_(idx, idx, 0x3);
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beq(CCR0, L_post_third_loop_done);
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Label L_check_1;
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addic_(idx, idx, -2);
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blt(CCR0, L_check_1);
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multiply_add_128_x_128(x_xstart, y, z, yz_idx, idx, carry, product_high, product, tmp, 0);
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mr_if_needed(carry, product_high);
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bind(L_check_1);
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addi(idx, idx, 0x2);
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andi_(idx, idx, 0x1) ;
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addic_(idx, idx, -1);
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blt(CCR0, L_post_third_loop_done);
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sldi(tmp, idx, LogBytesPerInt);
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lwzx(yz_idx, y, tmp);
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multiply64(product_high, product, x_xstart, yz_idx);
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lwzx(yz_idx, z, tmp);
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add2_with_carry(product_high, product, yz_idx, carry);
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sldi(tmp, idx, LogBytesPerInt);
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stwx(product, z, tmp);
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srdi(product, product, 32);
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sldi(product_high, product_high, 32);
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orr(product, product, product_high);
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mr_if_needed(carry, product);
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bind(L_post_third_loop_done);
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} // multiply_128_x_128_loop
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void MacroAssembler::multiply_to_len(Register x, Register xlen,
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Register y, Register ylen,
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Register z, Register zlen,
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Register tmp1, Register tmp2,
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Register tmp3, Register tmp4,
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Register tmp5, Register tmp6,
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Register tmp7, Register tmp8,
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Register tmp9, Register tmp10,
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Register tmp11, Register tmp12,
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Register tmp13) {
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ShortBranchVerifier sbv(this);
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assert_different_registers(x, xlen, y, ylen, z, zlen,
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tmp1, tmp2, tmp3, tmp4, tmp5, tmp6);
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assert_different_registers(x, xlen, y, ylen, z, zlen,
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tmp1, tmp2, tmp3, tmp4, tmp5, tmp7);
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assert_different_registers(x, xlen, y, ylen, z, zlen,
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tmp1, tmp2, tmp3, tmp4, tmp5, tmp8);
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const Register idx = tmp1;
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const Register kdx = tmp2;
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const Register xstart = tmp3;
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const Register y_idx = tmp4;
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const Register carry = tmp5;
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const Register product = tmp6;
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const Register product_high = tmp7;
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const Register x_xstart = tmp8;
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const Register tmp = tmp9;
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// First Loop.
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//
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// final static long LONG_MASK = 0xffffffffL;
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// int xstart = xlen - 1;
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// int ystart = ylen - 1;
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// long carry = 0;
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// for (int idx=ystart, kdx=ystart+1+xstart; idx >= 0; idx-, kdx--) {
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// long product = (y[idx] & LONG_MASK) * (x[xstart] & LONG_MASK) + carry;
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// z[kdx] = (int)product;
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// carry = product >>> 32;
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// }
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// z[xstart] = (int)carry;
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mr_if_needed(idx, ylen); // idx = ylen
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mr_if_needed(kdx, zlen); // kdx = xlen + ylen
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li(carry, 0); // carry = 0
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Label L_done;
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addic_(xstart, xlen, -1);
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blt(CCR0, L_done);
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multiply_64_x_64_loop(x, xstart, x_xstart, y, y_idx, z,
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carry, product_high, product, idx, kdx, tmp);
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Label L_second_loop;
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cmpdi(CCR0, kdx, 0);
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beq(CCR0, L_second_loop);
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Label L_carry;
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addic_(kdx, kdx, -1);
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beq(CCR0, L_carry);
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// Store lower 32 bits of carry.
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sldi(tmp, kdx, LogBytesPerInt);
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stwx(carry, z, tmp);
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srdi(carry, carry, 32);
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addi(kdx, kdx, -1);
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bind(L_carry);
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// Store upper 32 bits of carry.
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sldi(tmp, kdx, LogBytesPerInt);
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stwx(carry, z, tmp);
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// Second and third (nested) loops.
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//
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// for (int i = xstart-1; i >= 0; i--) { // Second loop
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// carry = 0;
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// for (int jdx=ystart, k=ystart+1+i; jdx >= 0; jdx--, k--) { // Third loop
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// long product = (y[jdx] & LONG_MASK) * (x[i] & LONG_MASK) +
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// (z[k] & LONG_MASK) + carry;
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// z[k] = (int)product;
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// carry = product >>> 32;
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// }
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// z[i] = (int)carry;
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// }
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//
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// i = xlen, j = tmp1, k = tmp2, carry = tmp5, x[i] = rdx
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bind(L_second_loop);
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li(carry, 0); // carry = 0;
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addic_(xstart, xstart, -1); // i = xstart-1;
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blt(CCR0, L_done);
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Register zsave = tmp10;
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mr(zsave, z);
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Label L_last_x;
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sldi(tmp, xstart, LogBytesPerInt);
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add(z, z, tmp); // z = z + k - j
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addi(z, z, 4);
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addic_(xstart, xstart, -1); // i = xstart-1;
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blt(CCR0, L_last_x);
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sldi(tmp, xstart, LogBytesPerInt);
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ldx(x_xstart, x, tmp);
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#ifdef VM_LITTLE_ENDIAN
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rldicl(x_xstart, x_xstart, 32, 0);
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#endif
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Label L_third_loop_prologue;
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bind(L_third_loop_prologue);
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Register xsave = tmp11;
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Register xlensave = tmp12;
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Register ylensave = tmp13;
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mr(xsave, x);
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mr(xlensave, xstart);
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mr(ylensave, ylen);
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multiply_128_x_128_loop(x_xstart, y, z, y_idx, ylen,
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carry, product_high, product, x, tmp);
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mr(z, zsave);
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mr(x, xsave);
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mr(xlen, xlensave); // This is the decrement of the loop counter!
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mr(ylen, ylensave);
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addi(tmp3, xlen, 1);
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sldi(tmp, tmp3, LogBytesPerInt);
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stwx(carry, z, tmp);
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addic_(tmp3, tmp3, -1);
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blt(CCR0, L_done);
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srdi(carry, carry, 32);
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sldi(tmp, tmp3, LogBytesPerInt);
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stwx(carry, z, tmp);
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b(L_second_loop);
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// Next infrequent code is moved outside loops.
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bind(L_last_x);
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lwz(x_xstart, 0, x);
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b(L_third_loop_prologue);
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bind(L_done);
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} // multiply_to_len
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void MacroAssembler::asm_assert(bool check_equal, const char *msg, int id) {
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#ifdef ASSERT
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@ -677,6 +677,31 @@ class MacroAssembler: public Assembler {
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void char_arrays_equalsImm(Register str1_reg, Register str2_reg, int cntval, Register result_reg,
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Register tmp1_reg, Register tmp2_reg);
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// Emitters for BigInteger.multiplyToLen intrinsic.
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inline void multiply64(Register dest_hi, Register dest_lo,
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Register x, Register y);
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void add2_with_carry(Register dest_hi, Register dest_lo,
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Register src1, Register src2);
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void multiply_64_x_64_loop(Register x, Register xstart, Register x_xstart,
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Register y, Register y_idx, Register z,
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Register carry, Register product_high, Register product,
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Register idx, Register kdx, Register tmp);
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void multiply_add_128_x_128(Register x_xstart, Register y, Register z,
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Register yz_idx, Register idx, Register carry,
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Register product_high, Register product, Register tmp,
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int offset);
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void multiply_128_x_128_loop(Register x_xstart,
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Register y, Register z,
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Register yz_idx, Register idx, Register carry,
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Register product_high, Register product,
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Register carry2, Register tmp);
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void multiply_to_len(Register x, Register xlen,
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Register y, Register ylen,
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Register z, Register zlen,
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Register tmp1, Register tmp2, Register tmp3, Register tmp4, Register tmp5,
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Register tmp6, Register tmp7, Register tmp8, Register tmp9, Register tmp10,
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Register tmp11, Register tmp12, Register tmp13);
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//
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// Debugging
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//
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@ -423,6 +423,13 @@ inline void MacroAssembler::trap_range_check_ge(Register a, int si16) {
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twi(traptoEqual | traptoGreaterThanUnsigned, a/*reg a*/, si16);
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}
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// unsigned integer multiplication 64*64 -> 128 bits
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inline void MacroAssembler::multiply64(Register dest_hi, Register dest_lo,
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Register x, Register y) {
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mulld(dest_lo, x, y);
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mulhdu(dest_hi, x, y);
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}
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#if defined(ABI_ELFv2)
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inline address MacroAssembler::function_entry() { return pc(); }
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#else
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@ -10930,7 +10930,7 @@ instruct partialSubtypeCheck(iRegPdst result, iRegP_N2P subklass, iRegP_N2P supe
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instruct cmpFastLock(flagsReg crx, iRegPdst oop, iRegPdst box, iRegPdst tmp1, iRegPdst tmp2, iRegPdst tmp3) %{
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match(Set crx (FastLock oop box));
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effect(TEMP tmp1, TEMP tmp2, TEMP tmp3);
|
||||
predicate(/*(!UseNewFastLockPPC64 || UseBiasedLocking) &&*/ !Compile::current()->use_rtm());
|
||||
predicate(!Compile::current()->use_rtm());
|
||||
|
||||
format %{ "FASTLOCK $oop, $box, $tmp1, $tmp2, $tmp3" %}
|
||||
ins_encode %{
|
||||
|
@ -2053,6 +2053,79 @@ class StubGenerator: public StubCodeGenerator {
|
||||
__ blr();
|
||||
}
|
||||
|
||||
// Stub for BigInteger::multiplyToLen()
|
||||
//
|
||||
// Arguments:
|
||||
//
|
||||
// Input:
|
||||
// R3 - x address
|
||||
// R4 - x length
|
||||
// R5 - y address
|
||||
// R6 - y length
|
||||
// R7 - z address
|
||||
// R8 - z length
|
||||
//
|
||||
address generate_multiplyToLen() {
|
||||
|
||||
StubCodeMark mark(this, "StubRoutines", "multiplyToLen");
|
||||
|
||||
address start = __ function_entry();
|
||||
|
||||
const Register x = R3;
|
||||
const Register xlen = R4;
|
||||
const Register y = R5;
|
||||
const Register ylen = R6;
|
||||
const Register z = R7;
|
||||
const Register zlen = R8;
|
||||
|
||||
const Register tmp1 = R2; // TOC not used.
|
||||
const Register tmp2 = R9;
|
||||
const Register tmp3 = R10;
|
||||
const Register tmp4 = R11;
|
||||
const Register tmp5 = R12;
|
||||
|
||||
// non-volatile regs
|
||||
const Register tmp6 = R31;
|
||||
const Register tmp7 = R30;
|
||||
const Register tmp8 = R29;
|
||||
const Register tmp9 = R28;
|
||||
const Register tmp10 = R27;
|
||||
const Register tmp11 = R26;
|
||||
const Register tmp12 = R25;
|
||||
const Register tmp13 = R24;
|
||||
|
||||
BLOCK_COMMENT("Entry:");
|
||||
|
||||
// Save non-volatile regs (frameless).
|
||||
int current_offs = 8;
|
||||
__ std(R24, -current_offs, R1_SP); current_offs += 8;
|
||||
__ std(R25, -current_offs, R1_SP); current_offs += 8;
|
||||
__ std(R26, -current_offs, R1_SP); current_offs += 8;
|
||||
__ std(R27, -current_offs, R1_SP); current_offs += 8;
|
||||
__ std(R28, -current_offs, R1_SP); current_offs += 8;
|
||||
__ std(R29, -current_offs, R1_SP); current_offs += 8;
|
||||
__ std(R30, -current_offs, R1_SP); current_offs += 8;
|
||||
__ std(R31, -current_offs, R1_SP);
|
||||
|
||||
__ multiply_to_len(x, xlen, y, ylen, z, zlen, tmp1, tmp2, tmp3, tmp4, tmp5,
|
||||
tmp6, tmp7, tmp8, tmp9, tmp10, tmp11, tmp12, tmp13);
|
||||
|
||||
// Restore non-volatile regs.
|
||||
current_offs = 8;
|
||||
__ ld(R24, -current_offs, R1_SP); current_offs += 8;
|
||||
__ ld(R25, -current_offs, R1_SP); current_offs += 8;
|
||||
__ ld(R26, -current_offs, R1_SP); current_offs += 8;
|
||||
__ ld(R27, -current_offs, R1_SP); current_offs += 8;
|
||||
__ ld(R28, -current_offs, R1_SP); current_offs += 8;
|
||||
__ ld(R29, -current_offs, R1_SP); current_offs += 8;
|
||||
__ ld(R30, -current_offs, R1_SP); current_offs += 8;
|
||||
__ ld(R31, -current_offs, R1_SP);
|
||||
|
||||
__ blr(); // Return to caller.
|
||||
|
||||
return start;
|
||||
}
|
||||
|
||||
// Initialization
|
||||
void generate_initial() {
|
||||
// Generates all stubs and initializes the entry points
|
||||
@ -2102,6 +2175,12 @@ class StubGenerator: public StubCodeGenerator {
|
||||
generate_safefetch("SafeFetchN", sizeof(intptr_t), &StubRoutines::_safefetchN_entry,
|
||||
&StubRoutines::_safefetchN_fault_pc,
|
||||
&StubRoutines::_safefetchN_continuation_pc);
|
||||
|
||||
#ifdef COMPILER2
|
||||
if (UseMultiplyToLenIntrinsic) {
|
||||
StubRoutines::_multiplyToLen = generate_multiplyToLen();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
public:
|
||||
|
@ -198,6 +198,10 @@ void VM_Version::initialize() {
|
||||
FLAG_SET_DEFAULT(UseCRC32CIntrinsics, false);
|
||||
}
|
||||
|
||||
if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
|
||||
UseMultiplyToLenIntrinsic = true;
|
||||
}
|
||||
|
||||
// Adjust RTM (Restricted Transactional Memory) flags.
|
||||
if (!has_tcheck() && UseRTMLocking) {
|
||||
// Can't continue because UseRTMLocking affects UseBiasedLocking flag
|
||||
@ -228,7 +232,6 @@ void VM_Version::initialize() {
|
||||
warning("RTMAbortRatio must be in the range 0 to 100, resetting it to 50");
|
||||
FLAG_SET_DEFAULT(RTMAbortRatio, 50);
|
||||
}
|
||||
FLAG_SET_ERGO(bool, UseNewFastLockPPC64, false); // Does not implement TM.
|
||||
guarantee(RTMSpinLoopCount > 0, "unsupported");
|
||||
#else
|
||||
// Only C2 does RTM locking optimization.
|
||||
|
Loading…
x
Reference in New Issue
Block a user