8342014: RISC-V: ZStoreBarrierStubC2 clobbers rflags
Reviewed-by: rehn, aboldtch, mli
This commit is contained in:
parent
bd6264420b
commit
a601cd2e10
@ -74,11 +74,11 @@ static void write_barrier_post(MacroAssembler* masm,
|
||||
|
||||
%}
|
||||
|
||||
instruct g1StoreP(indirect mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3)
|
||||
instruct g1StoreP(indirect mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseG1GC && n->as_Store()->barrier_data() != 0);
|
||||
match(Set mem (StoreP mem src));
|
||||
effect(TEMP tmp1, TEMP tmp2, TEMP tmp3);
|
||||
effect(TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
|
||||
ins_cost(STORE_COST);
|
||||
format %{ "sd $src, $mem\t# ptr" %}
|
||||
ins_encode %{
|
||||
@ -99,11 +99,11 @@ instruct g1StoreP(indirect mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegP
|
||||
ins_pipe(istore_reg_mem);
|
||||
%}
|
||||
|
||||
instruct g1StoreN(indirect mem, iRegN src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3)
|
||||
instruct g1StoreN(indirect mem, iRegN src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseG1GC && n->as_Store()->barrier_data() != 0);
|
||||
match(Set mem (StoreN mem src));
|
||||
effect(TEMP tmp1, TEMP tmp2, TEMP tmp3);
|
||||
effect(TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
|
||||
ins_cost(STORE_COST);
|
||||
format %{ "sw $src, $mem\t# compressed ptr" %}
|
||||
ins_encode %{
|
||||
@ -131,11 +131,11 @@ instruct g1StoreN(indirect mem, iRegN src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegP
|
||||
ins_pipe(istore_reg_mem);
|
||||
%}
|
||||
|
||||
instruct g1EncodePAndStoreN(indirect mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3)
|
||||
instruct g1EncodePAndStoreN(indirect mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseG1GC && n->as_Store()->barrier_data() != 0);
|
||||
match(Set mem (StoreN mem (EncodeP src)));
|
||||
effect(TEMP tmp1, TEMP tmp2, TEMP tmp3);
|
||||
effect(TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
|
||||
ins_cost(STORE_COST);
|
||||
format %{ "encode_heap_oop $tmp1, $src\n\t"
|
||||
"sw $tmp1, $mem\t# compressed ptr" %}
|
||||
@ -162,11 +162,11 @@ instruct g1EncodePAndStoreN(indirect mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp t
|
||||
ins_pipe(istore_reg_mem);
|
||||
%}
|
||||
|
||||
instruct g1CompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2)
|
||||
instruct g1CompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseG1GC && n->as_LoadStore()->barrier_data() != 0);
|
||||
match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
|
||||
effect(TEMP res, TEMP tmp1, TEMP tmp2);
|
||||
effect(TEMP res, TEMP tmp1, TEMP tmp2, KILL cr);
|
||||
ins_cost(2 * VOLATILE_REF_COST);
|
||||
format %{ "cmpxchg $res = $mem, $oldval, $newval\t# ptr" %}
|
||||
ins_encode %{
|
||||
@ -194,11 +194,11 @@ instruct g1CompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
instruct g1CompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2)
|
||||
instruct g1CompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseG1GC && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
|
||||
match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
|
||||
effect(TEMP res, TEMP tmp1, TEMP tmp2);
|
||||
effect(TEMP res, TEMP tmp1, TEMP tmp2, KILL cr);
|
||||
ins_cost(VOLATILE_REF_COST);
|
||||
format %{ "cmpxchg_acq $res = $mem, $oldval, $newval\t# ptr" %}
|
||||
ins_encode %{
|
||||
@ -226,11 +226,11 @@ instruct g1CompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRe
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
instruct g1CompareAndExchangeN(iRegNNoSp res, indirect mem, iRegN oldval, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3)
|
||||
instruct g1CompareAndExchangeN(iRegNNoSp res, indirect mem, iRegN oldval, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseG1GC && n->as_LoadStore()->barrier_data() != 0);
|
||||
match(Set res (CompareAndExchangeN mem (Binary oldval newval)));
|
||||
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3);
|
||||
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
|
||||
ins_cost(2 * VOLATILE_REF_COST);
|
||||
format %{ "cmpxchg $res = $mem, $oldval, $newval\t# narrow oop" %}
|
||||
ins_encode %{
|
||||
@ -256,11 +256,11 @@ instruct g1CompareAndExchangeN(iRegNNoSp res, indirect mem, iRegN oldval, iRegN
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
instruct g1CompareAndExchangeNAcq(iRegNNoSp res, indirect mem, iRegN oldval, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3)
|
||||
instruct g1CompareAndExchangeNAcq(iRegNNoSp res, indirect mem, iRegN oldval, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseG1GC && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
|
||||
match(Set res (CompareAndExchangeN mem (Binary oldval newval)));
|
||||
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3);
|
||||
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
|
||||
ins_cost(VOLATILE_REF_COST);
|
||||
format %{ "cmpxchg_acq $res = $mem, $oldval, $newval\t# narrow oop" %}
|
||||
ins_encode %{
|
||||
@ -286,12 +286,12 @@ instruct g1CompareAndExchangeNAcq(iRegNNoSp res, indirect mem, iRegN oldval, iRe
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
instruct g1CompareAndSwapP(iRegINoSp res, indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegP oldval)
|
||||
instruct g1CompareAndSwapP(iRegINoSp res, indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegP oldval, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseG1GC && n->as_LoadStore()->barrier_data() != 0);
|
||||
match(Set res (CompareAndSwapP mem (Binary oldval newval)));
|
||||
match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
|
||||
effect(TEMP res, TEMP tmp1, TEMP tmp2);
|
||||
effect(TEMP res, TEMP tmp1, TEMP tmp2, KILL cr);
|
||||
ins_cost(2 * VOLATILE_REF_COST);
|
||||
format %{ "cmpxchg $mem, $oldval, $newval\t# (ptr)\n\t"
|
||||
"mv $res, $res == $oldval" %}
|
||||
@ -318,12 +318,12 @@ instruct g1CompareAndSwapP(iRegINoSp res, indirect mem, iRegP newval, iRegPNoSp
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
instruct g1CompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegP oldval)
|
||||
instruct g1CompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegP oldval, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseG1GC && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
|
||||
match(Set res (CompareAndSwapP mem (Binary oldval newval)));
|
||||
match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
|
||||
effect(TEMP res, TEMP tmp1, TEMP tmp2);
|
||||
effect(TEMP res, TEMP tmp1, TEMP tmp2, KILL cr);
|
||||
ins_cost(VOLATILE_REF_COST);
|
||||
format %{ "cmpxchg_acq $mem, $oldval, $newval\t# (ptr)\n\t"
|
||||
"mv $res, $res == $oldval" %}
|
||||
@ -350,12 +350,12 @@ instruct g1CompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP newval, iRegPNo
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
instruct g1CompareAndSwapN(iRegINoSp res, indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegN oldval)
|
||||
instruct g1CompareAndSwapN(iRegINoSp res, indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegN oldval, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseG1GC && n->as_LoadStore()->barrier_data() != 0);
|
||||
match(Set res (CompareAndSwapN mem (Binary oldval newval)));
|
||||
match(Set res (WeakCompareAndSwapN mem (Binary oldval newval)));
|
||||
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3);
|
||||
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
|
||||
ins_cost(2 * VOLATILE_REF_COST);
|
||||
format %{ "cmpxchg $mem, $oldval, $newval\t# (narrow oop)\n\t"
|
||||
"mv $res, $res == $oldval" %}
|
||||
@ -383,12 +383,12 @@ instruct g1CompareAndSwapN(iRegINoSp res, indirect mem, iRegN newval, iRegPNoSp
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
instruct g1CompareAndSwapNAcq(iRegINoSp res, indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegN oldval)
|
||||
instruct g1CompareAndSwapNAcq(iRegINoSp res, indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegN oldval, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseG1GC && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
|
||||
match(Set res (CompareAndSwapN mem (Binary oldval newval)));
|
||||
match(Set res (WeakCompareAndSwapN mem (Binary oldval newval)));
|
||||
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3);
|
||||
effect(TEMP res, TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
|
||||
ins_cost(VOLATILE_REF_COST);
|
||||
format %{ "cmpxchg_acq $mem, $oldval, $newval\t# (narrow oop)\n\t"
|
||||
"mv $res, $res == $oldval" %}
|
||||
@ -416,11 +416,11 @@ instruct g1CompareAndSwapNAcq(iRegINoSp res, indirect mem, iRegN newval, iRegPNo
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
instruct g1GetAndSetP(indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp preval)
|
||||
instruct g1GetAndSetP(indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp preval, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseG1GC && n->as_LoadStore()->barrier_data() != 0);
|
||||
match(Set preval (GetAndSetP mem newval));
|
||||
effect(TEMP preval, TEMP tmp1, TEMP tmp2);
|
||||
effect(TEMP preval, TEMP tmp1, TEMP tmp2, KILL cr);
|
||||
ins_cost(2 * VOLATILE_REF_COST);
|
||||
format %{ "atomic_xchg $preval, $newval, [$mem]" %}
|
||||
ins_encode %{
|
||||
@ -442,11 +442,11 @@ instruct g1GetAndSetP(indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2
|
||||
ins_pipe(pipe_serial);
|
||||
%}
|
||||
|
||||
instruct g1GetAndSetPAcq(indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp preval)
|
||||
instruct g1GetAndSetPAcq(indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp preval, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseG1GC && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
|
||||
match(Set preval (GetAndSetP mem newval));
|
||||
effect(TEMP preval, TEMP tmp1, TEMP tmp2);
|
||||
effect(TEMP preval, TEMP tmp1, TEMP tmp2, KILL cr);
|
||||
ins_cost(VOLATILE_REF_COST);
|
||||
format %{ "atomic_xchg_acq $preval, $newval, [$mem]" %}
|
||||
ins_encode %{
|
||||
@ -468,11 +468,11 @@ instruct g1GetAndSetPAcq(indirect mem, iRegP newval, iRegPNoSp tmp1, iRegPNoSp t
|
||||
ins_pipe(pipe_serial);
|
||||
%}
|
||||
|
||||
instruct g1GetAndSetN(indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegNNoSp preval)
|
||||
instruct g1GetAndSetN(indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegNNoSp preval, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseG1GC && n->as_LoadStore()->barrier_data() != 0);
|
||||
match(Set preval (GetAndSetN mem newval));
|
||||
effect(TEMP preval, TEMP tmp1, TEMP tmp2, TEMP tmp3);
|
||||
effect(TEMP preval, TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
|
||||
ins_cost(2 * VOLATILE_REF_COST);
|
||||
format %{ "atomic_xchgwu $preval, $newval, [$mem]" %}
|
||||
ins_encode %{
|
||||
@ -495,11 +495,11 @@ instruct g1GetAndSetN(indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2
|
||||
ins_pipe(pipe_serial);
|
||||
%}
|
||||
|
||||
instruct g1GetAndSetNAcq(indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegNNoSp preval)
|
||||
instruct g1GetAndSetNAcq(indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegNNoSp preval, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseG1GC && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
|
||||
match(Set preval (GetAndSetN mem newval));
|
||||
effect(TEMP preval, TEMP tmp1, TEMP tmp2, TEMP tmp3);
|
||||
effect(TEMP preval, TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
|
||||
ins_cost(VOLATILE_REF_COST);
|
||||
format %{ "atomic_xchgwu_acq $preval, $newval, [$mem]" %}
|
||||
ins_encode %{
|
||||
@ -522,11 +522,11 @@ instruct g1GetAndSetNAcq(indirect mem, iRegN newval, iRegPNoSp tmp1, iRegPNoSp t
|
||||
ins_pipe(pipe_serial);
|
||||
%}
|
||||
|
||||
instruct g1LoadP(iRegPNoSp dst, indirect mem, iRegPNoSp tmp1, iRegPNoSp tmp2)
|
||||
instruct g1LoadP(iRegPNoSp dst, indirect mem, iRegPNoSp tmp1, iRegPNoSp tmp2, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseG1GC && n->as_Load()->barrier_data() != 0);
|
||||
match(Set dst (LoadP mem));
|
||||
effect(TEMP dst, TEMP tmp1, TEMP tmp2);
|
||||
effect(TEMP dst, TEMP tmp1, TEMP tmp2, KILL cr);
|
||||
ins_cost(LOAD_COST + BRANCH_COST);
|
||||
format %{ "ld $dst, $mem\t# ptr" %}
|
||||
ins_encode %{
|
||||
@ -541,11 +541,11 @@ instruct g1LoadP(iRegPNoSp dst, indirect mem, iRegPNoSp tmp1, iRegPNoSp tmp2)
|
||||
ins_pipe(iload_reg_mem);
|
||||
%}
|
||||
|
||||
instruct g1LoadN(iRegNNoSp dst, indirect mem, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3)
|
||||
instruct g1LoadN(iRegNNoSp dst, indirect mem, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseG1GC && n->as_Load()->barrier_data() != 0);
|
||||
match(Set dst (LoadN mem));
|
||||
effect(TEMP dst, TEMP tmp1, TEMP tmp2, TEMP tmp3);
|
||||
effect(TEMP dst, TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
|
||||
ins_cost(LOAD_COST + BRANCH_COST);
|
||||
format %{ "lwu $dst, $mem\t# compressed ptr" %}
|
||||
ins_encode %{
|
||||
|
@ -52,11 +52,11 @@ static void x_load_barrier_slow_path(MacroAssembler* masm, const MachNode* node,
|
||||
%}
|
||||
|
||||
// Load Pointer
|
||||
instruct xLoadP(iRegPNoSp dst, memory mem, iRegPNoSp tmp)
|
||||
instruct xLoadP(iRegPNoSp dst, memory mem, iRegPNoSp tmp, rFlagsReg cr)
|
||||
%{
|
||||
match(Set dst (LoadP mem));
|
||||
predicate(UseZGC && !ZGenerational && (n->as_Load()->barrier_data() != 0));
|
||||
effect(TEMP dst, TEMP tmp);
|
||||
effect(TEMP dst, TEMP tmp, KILL cr);
|
||||
|
||||
ins_cost(4 * DEFAULT_COST);
|
||||
|
||||
@ -71,11 +71,11 @@ instruct xLoadP(iRegPNoSp dst, memory mem, iRegPNoSp tmp)
|
||||
ins_pipe(iload_reg_mem);
|
||||
%}
|
||||
|
||||
instruct xCompareAndSwapP(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp) %{
|
||||
instruct xCompareAndSwapP(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
|
||||
match(Set res (CompareAndSwapP mem (Binary oldval newval)));
|
||||
match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
|
||||
predicate(UseZGC && !ZGenerational && !needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() == XLoadBarrierStrong);
|
||||
effect(TEMP_DEF res, TEMP tmp);
|
||||
effect(TEMP_DEF res, TEMP tmp, KILL cr);
|
||||
|
||||
ins_cost(2 * VOLATILE_REF_COST);
|
||||
|
||||
@ -105,11 +105,11 @@ instruct xCompareAndSwapP(iRegINoSp res, indirect mem, iRegP oldval, iRegP newva
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
instruct xCompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp) %{
|
||||
instruct xCompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
|
||||
match(Set res (CompareAndSwapP mem (Binary oldval newval)));
|
||||
match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
|
||||
predicate(UseZGC && !ZGenerational && needs_acquiring_load_reserved(n) && (n->as_LoadStore()->barrier_data() == XLoadBarrierStrong));
|
||||
effect(TEMP_DEF res, TEMP tmp);
|
||||
effect(TEMP_DEF res, TEMP tmp, KILL cr);
|
||||
|
||||
ins_cost(2 * VOLATILE_REF_COST);
|
||||
|
||||
@ -139,10 +139,10 @@ instruct xCompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP oldval, iRegP ne
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
instruct xCompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp) %{
|
||||
instruct xCompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
|
||||
match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
|
||||
predicate(UseZGC && !ZGenerational && !needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() == XLoadBarrierStrong);
|
||||
effect(TEMP_DEF res, TEMP tmp);
|
||||
effect(TEMP_DEF res, TEMP tmp, KILL cr);
|
||||
|
||||
ins_cost(2 * VOLATILE_REF_COST);
|
||||
|
||||
@ -167,10 +167,10 @@ instruct xCompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP n
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
instruct xCompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp) %{
|
||||
instruct xCompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp tmp, rFlagsReg cr) %{
|
||||
match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
|
||||
predicate(UseZGC && !ZGenerational && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() == XLoadBarrierStrong);
|
||||
effect(TEMP_DEF res, TEMP tmp);
|
||||
effect(TEMP_DEF res, TEMP tmp, KILL cr);
|
||||
|
||||
ins_cost(2 * VOLATILE_REF_COST);
|
||||
|
||||
@ -195,10 +195,10 @@ instruct xCompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iReg
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
instruct xGetAndSetP(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp) %{
|
||||
instruct xGetAndSetP(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp, rFlagsReg cr) %{
|
||||
match(Set prev (GetAndSetP mem newv));
|
||||
predicate(UseZGC && !ZGenerational && !needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
|
||||
effect(TEMP_DEF prev, TEMP tmp);
|
||||
effect(TEMP_DEF prev, TEMP tmp, KILL cr);
|
||||
|
||||
ins_cost(2 * VOLATILE_REF_COST);
|
||||
|
||||
@ -212,10 +212,10 @@ instruct xGetAndSetP(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp) %{
|
||||
ins_pipe(pipe_serial);
|
||||
%}
|
||||
|
||||
instruct xGetAndSetPAcq(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp) %{
|
||||
instruct xGetAndSetPAcq(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp, rFlagsReg cr) %{
|
||||
match(Set prev (GetAndSetP mem newv));
|
||||
predicate(UseZGC && !ZGenerational && needs_acquiring_load_reserved(n) && (n->as_LoadStore()->barrier_data() != 0));
|
||||
effect(TEMP_DEF prev, TEMP tmp);
|
||||
effect(TEMP_DEF prev, TEMP tmp, KILL cr);
|
||||
|
||||
ins_cost(VOLATILE_REF_COST);
|
||||
|
||||
|
@ -90,11 +90,11 @@ static void z_store_barrier(MacroAssembler* masm, const MachNode* node, Address
|
||||
%}
|
||||
|
||||
// Load Pointer
|
||||
instruct zLoadP(iRegPNoSp dst, memory mem, iRegPNoSp tmp)
|
||||
instruct zLoadP(iRegPNoSp dst, memory mem, iRegPNoSp tmp, rFlagsReg cr)
|
||||
%{
|
||||
match(Set dst (LoadP mem));
|
||||
predicate(UseZGC && ZGenerational && n->as_Load()->barrier_data() != 0);
|
||||
effect(TEMP dst, TEMP tmp);
|
||||
effect(TEMP dst, TEMP tmp, KILL cr);
|
||||
|
||||
ins_cost(4 * DEFAULT_COST);
|
||||
|
||||
@ -110,11 +110,11 @@ instruct zLoadP(iRegPNoSp dst, memory mem, iRegPNoSp tmp)
|
||||
%}
|
||||
|
||||
// Store Pointer
|
||||
instruct zStoreP(memory mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp tmp2)
|
||||
instruct zStoreP(memory mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp tmp2, rFlagsReg cr)
|
||||
%{
|
||||
predicate(UseZGC && ZGenerational && n->as_Store()->barrier_data() != 0);
|
||||
match(Set mem (StoreP mem src));
|
||||
effect(TEMP tmp1, TEMP tmp2);
|
||||
effect(TEMP tmp1, TEMP tmp2, KILL cr);
|
||||
|
||||
ins_cost(125); // XXX
|
||||
format %{ "sd $mem, $src\t# ptr" %}
|
||||
@ -127,11 +127,11 @@ instruct zStoreP(memory mem, iRegP src, iRegPNoSp tmp1, iRegPNoSp tmp2)
|
||||
%}
|
||||
|
||||
instruct zCompareAndSwapP(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval,
|
||||
iRegPNoSp oldval_tmp, iRegPNoSp newval_tmp, iRegPNoSp tmp1) %{
|
||||
iRegPNoSp oldval_tmp, iRegPNoSp newval_tmp, iRegPNoSp tmp1, rFlagsReg cr) %{
|
||||
match(Set res (CompareAndSwapP mem (Binary oldval newval)));
|
||||
match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
|
||||
predicate(UseZGC && ZGenerational && !needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
|
||||
effect(TEMP oldval_tmp, TEMP newval_tmp, TEMP tmp1, TEMP_DEF res);
|
||||
effect(TEMP oldval_tmp, TEMP newval_tmp, TEMP tmp1, TEMP_DEF res, KILL cr);
|
||||
|
||||
ins_cost(2 * VOLATILE_REF_COST);
|
||||
|
||||
@ -150,11 +150,11 @@ instruct zCompareAndSwapP(iRegINoSp res, indirect mem, iRegP oldval, iRegP newva
|
||||
%}
|
||||
|
||||
instruct zCompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP oldval, iRegP newval,
|
||||
iRegPNoSp oldval_tmp, iRegPNoSp newval_tmp, iRegPNoSp tmp1) %{
|
||||
iRegPNoSp oldval_tmp, iRegPNoSp newval_tmp, iRegPNoSp tmp1, rFlagsReg cr) %{
|
||||
match(Set res (CompareAndSwapP mem (Binary oldval newval)));
|
||||
match(Set res (WeakCompareAndSwapP mem (Binary oldval newval)));
|
||||
predicate(UseZGC && ZGenerational && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
|
||||
effect(TEMP oldval_tmp, TEMP newval_tmp, TEMP tmp1, TEMP_DEF res);
|
||||
effect(TEMP oldval_tmp, TEMP newval_tmp, TEMP tmp1, TEMP_DEF res, KILL cr);
|
||||
|
||||
ins_cost(2 * VOLATILE_REF_COST);
|
||||
|
||||
@ -173,10 +173,10 @@ instruct zCompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP oldval, iRegP ne
|
||||
%}
|
||||
|
||||
instruct zCompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval,
|
||||
iRegPNoSp oldval_tmp, iRegPNoSp newval_tmp, iRegPNoSp tmp1) %{
|
||||
iRegPNoSp oldval_tmp, iRegPNoSp newval_tmp, iRegPNoSp tmp1, rFlagsReg cr) %{
|
||||
match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
|
||||
predicate(UseZGC && ZGenerational && !needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
|
||||
effect(TEMP oldval_tmp, TEMP newval_tmp, TEMP tmp1, TEMP_DEF res);
|
||||
effect(TEMP oldval_tmp, TEMP newval_tmp, TEMP tmp1, TEMP_DEF res, KILL cr);
|
||||
|
||||
ins_cost(2 * VOLATILE_REF_COST);
|
||||
|
||||
@ -195,10 +195,10 @@ instruct zCompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP n
|
||||
%}
|
||||
|
||||
instruct zCompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval,
|
||||
iRegPNoSp oldval_tmp, iRegPNoSp newval_tmp, iRegPNoSp tmp1) %{
|
||||
iRegPNoSp oldval_tmp, iRegPNoSp newval_tmp, iRegPNoSp tmp1, rFlagsReg cr) %{
|
||||
match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
|
||||
predicate(UseZGC && ZGenerational && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
|
||||
effect(TEMP oldval_tmp, TEMP newval_tmp, TEMP tmp1, TEMP_DEF res);
|
||||
effect(TEMP oldval_tmp, TEMP newval_tmp, TEMP tmp1, TEMP_DEF res, KILL cr);
|
||||
|
||||
ins_cost(2 * VOLATILE_REF_COST);
|
||||
|
||||
@ -216,10 +216,10 @@ instruct zCompareAndExchangePAcq(iRegPNoSp res, indirect mem, iRegP oldval, iReg
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
instruct zGetAndSetP(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp) %{
|
||||
instruct zGetAndSetP(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp, rFlagsReg cr) %{
|
||||
match(Set prev (GetAndSetP mem newv));
|
||||
predicate(UseZGC && ZGenerational && !needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
|
||||
effect(TEMP_DEF prev, TEMP tmp);
|
||||
effect(TEMP_DEF prev, TEMP tmp, KILL cr);
|
||||
|
||||
ins_cost(2 * VOLATILE_REF_COST);
|
||||
|
||||
@ -234,10 +234,10 @@ instruct zGetAndSetP(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp) %{
|
||||
ins_pipe(pipe_serial);
|
||||
%}
|
||||
|
||||
instruct zGetAndSetPAcq(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp) %{
|
||||
instruct zGetAndSetPAcq(indirect mem, iRegP newv, iRegPNoSp prev, iRegPNoSp tmp, rFlagsReg cr) %{
|
||||
match(Set prev (GetAndSetP mem newv));
|
||||
predicate(UseZGC && ZGenerational && needs_acquiring_load_reserved(n) && n->as_LoadStore()->barrier_data() != 0);
|
||||
effect(TEMP_DEF prev, TEMP tmp);
|
||||
effect(TEMP_DEF prev, TEMP tmp, KILL cr);
|
||||
|
||||
ins_cost(2 * VOLATILE_REF_COST);
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user