8343941: IGV: dump graph at different register allocation steps

Reviewed-by: chagedorn, dfenacci, dlunden
This commit is contained in:
Roberto Castañeda Lozano 2024-11-14 08:56:38 +00:00
parent bd6152f596
commit a8152bdb9a
3 changed files with 46 additions and 0 deletions

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@ -424,6 +424,9 @@ void PhaseChaitin::Register_Allocate() {
live.compute(_lrg_map.max_lrg_id());
_live = &live;
}
C->print_method(PHASE_INITIAL_LIVENESS, 4);
// Create the interference graph using virtual copies
build_ifg_virtual(); // Include stack slots this time
@ -464,6 +467,8 @@ void PhaseChaitin::Register_Allocate() {
_live = &live;
}
C->print_method(PHASE_AGGRESSIVE_COALESCING, 4);
// Build physical interference graph
uint must_spill = 0;
must_spill = build_ifg_physical(&live_arena);
@ -504,6 +509,9 @@ void PhaseChaitin::Register_Allocate() {
live.compute(_lrg_map.max_lrg_id()); // Compute LIVE
_live = &live;
}
C->print_method(PHASE_INITIAL_SPILLING, 4);
build_ifg_physical(&live_arena);
_ifg->SquareUp();
_ifg->Compute_Effective_Degree();
@ -518,6 +526,10 @@ void PhaseChaitin::Register_Allocate() {
}
_lrg_map.compress_uf_map_for_nodes();
if (OptoCoalesce) {
C->print_method(PHASE_CONSERVATIVE_COALESCING, 4);
}
#ifdef ASSERT
verify(&live_arena, true);
#endif
@ -580,6 +592,9 @@ void PhaseChaitin::Register_Allocate() {
live.compute(_lrg_map.max_lrg_id());
_live = &live;
}
C->print_method(PHASE_ITERATIVE_SPILLING, 4);
must_spill = build_ifg_physical(&live_arena);
_ifg->SquareUp();
_ifg->Compute_Effective_Degree();
@ -593,6 +608,11 @@ void PhaseChaitin::Register_Allocate() {
coalesce.coalesce_driver();
}
_lrg_map.compress_uf_map_for_nodes();
if (OptoCoalesce) {
C->print_method(PHASE_CONSERVATIVE_COALESCING, 4);
}
#ifdef ASSERT
verify(&live_arena, true);
#endif
@ -607,6 +627,8 @@ void PhaseChaitin::Register_Allocate() {
spills = Select();
}
C->print_method(PHASE_AFTER_ITERATIVE_SPILLING, 4);
// Count number of Simplify-Select trips per coloring success.
_allocator_attempts += _trip_cnt + 1;
_allocator_successes += 1;
@ -614,9 +636,13 @@ void PhaseChaitin::Register_Allocate() {
// Peephole remove copies
post_allocate_copy_removal();
C->print_method(PHASE_POST_ALLOCATION_COPY_REMOVAL, 4);
// Merge multidefs if multiple defs representing the same value are used in a single block.
merge_multidefs();
C->print_method(PHASE_MERGE_MULTI_DEFS, 4);
#ifdef ASSERT
// Verify the graph after RA.
verify(&live_arena);
@ -645,6 +671,8 @@ void PhaseChaitin::Register_Allocate() {
// Convert CISC spills
fixup_spills();
C->print_method(PHASE_FIX_UP_SPILLS, 4);
// Log regalloc results
CompileLog* log = Compile::current()->log();
if (log != nullptr) {

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@ -93,6 +93,15 @@
flags(BEFORE_MATCHING, "Before matching") \
flags(MATCHING, "After matching") \
flags(GLOBAL_CODE_MOTION, "Global code motion") \
flags(INITIAL_LIVENESS, "Initial liveness") \
flags(AGGRESSIVE_COALESCING, "Aggressive coalescing") \
flags(INITIAL_SPILLING, "Initial spilling") \
flags(CONSERVATIVE_COALESCING, "Conservative coalescing") \
flags(ITERATIVE_SPILLING, "Iterative spilling") \
flags(AFTER_ITERATIVE_SPILLING, "After iterative spilling") \
flags(POST_ALLOCATION_COPY_REMOVAL, "Post-allocation copy removal") \
flags(MERGE_MULTI_DEFS, "Merge multiple definitions") \
flags(FIX_UP_SPILLS, "Fix up spills") \
flags(REGISTER_ALLOCATION, "Register Allocation") \
flags(BLOCK_ORDERING, "Block Ordering") \
flags(PEEPHOLE, "Peephole") \

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@ -104,6 +104,15 @@ public enum CompilePhase {
BEFORE_MATCHING("Before matching"),
MATCHING("After matching", RegexType.MACH),
GLOBAL_CODE_MOTION("Global code motion", RegexType.MACH),
INITIAL_LIVENESS("Initial liveness", RegexType.MACH),
AGGRESSIVE_COALESCING("Aggressive coalescing", RegexType.MACH),
INITIAL_SPILLING("Initial spilling", RegexType.MACH),
CONSERVATIVE_COALESCING("Conservative coalescing", RegexType.MACH, ActionOnRepeat.KEEP_FIRST),
ITERATIVE_SPILLING("Iterative spilling", RegexType.MACH, ActionOnRepeat.KEEP_FIRST),
AFTER_ITERATIVE_SPILLING("After iterative spilling", RegexType.MACH),
POST_ALLOCATION_COPY_REMOVAL("Post-allocation copy removal", RegexType.MACH),
MERGE_MULTI_DEFS("Merge multiple definitions", RegexType.MACH),
FIX_UP_SPILLS("Fix up spills", RegexType.MACH),
REGISTER_ALLOCATION("Register Allocation", RegexType.MACH),
BLOCK_ORDERING("Block Ordering", RegexType.MACH),
PEEPHOLE("Peephole", RegexType.MACH),