8339992: RISC-V: some minor improvements of base64_vector_decode_round
Reviewed-by: fyang, luhenry
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@ -5331,7 +5331,7 @@ class StubGenerator: public StubCodeGenerator {
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* NOTE: each field will occupy a single vector register group
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*/
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void base64_vector_decode_round(Register src, Register dst, Register codec,
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Register size, Register stepSrc, Register stepDst, Register failedIdx, Register minusOne,
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Register size, Register stepSrc, Register stepDst, Register failedIdx,
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VectorRegister inputV1, VectorRegister inputV2, VectorRegister inputV3, VectorRegister inputV4,
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VectorRegister idxV1, VectorRegister idxV2, VectorRegister idxV3, VectorRegister idxV4,
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VectorRegister outputV1, VectorRegister outputV2, VectorRegister outputV3,
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@ -5358,8 +5358,11 @@ class StubGenerator: public StubCodeGenerator {
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__ vor_vv(outputV1, outputV1, outputV2);
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__ vmseq_vi(v0, outputV1, -1);
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__ vfirst_m(failedIdx, v0);
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Label NoFailure;
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__ beq(failedIdx, minusOne, NoFailure);
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Label NoFailure, FailureAtIdx0;
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// valid value can only be -1 when < 0
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__ bltz(failedIdx, NoFailure);
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// when the first data (at index 0) fails, no need to process data anymore
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__ beqz(failedIdx, FailureAtIdx0);
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__ vsetvli(x0, failedIdx, Assembler::e8, lmul, Assembler::mu, Assembler::tu);
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__ slli(stepDst, failedIdx, 1);
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__ add(stepDst, failedIdx, stepDst);
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@ -5382,6 +5385,7 @@ class StubGenerator: public StubCodeGenerator {
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// dst = dst + register_group_len_bytes * 3
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__ add(dst, dst, stepDst);
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__ BIND(FailureAtIdx0);
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}
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/**
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@ -5501,7 +5505,7 @@ class StubGenerator: public StubCodeGenerator {
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// Assembler::m2
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__ BIND(ProcessM2);
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base64_vector_decode_round(src, dst, codec,
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size, stepSrcM2, stepDst, failedIdx, minusOne,
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size, stepSrcM2, stepDst, failedIdx,
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v2, v4, v6, v8, // inputs
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v10, v12, v14, v16, // indexes
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v18, v20, v22, // outputs
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@ -5521,7 +5525,7 @@ class StubGenerator: public StubCodeGenerator {
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__ srli(size, size, 1);
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__ srli(stepDst, stepDst, 1);
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base64_vector_decode_round(src, dst, codec,
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size, stepSrcM1, stepDst, failedIdx, minusOne,
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size, stepSrcM1, stepDst, failedIdx,
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v1, v2, v3, v4, // inputs
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v5, v6, v7, v8, // indexes
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v9, v10, v11, // outputs
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