8077618: Move rtmLocking.cpp to shared directory
Reviewed-by: dholmes, kvn
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cd3cc29559
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af1efee490
hotspot/src
@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -58,4 +58,9 @@ const bool CCallingConventionRequiresIntsAsLongs = false;
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#endif
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#endif
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#if defined(COMPILER2) && !defined(JAVASE_EMBEDDED)
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// Include Restricted Transactional Memory lock eliding optimization
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#define INCLUDE_RTM_OPT 1
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#endif
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#endif // CPU_X86_VM_GLOBALDEFINITIONS_X86_HPP
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2014, 2015, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -23,10 +23,15 @@
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*/
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#include "precompiled.hpp"
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#include "utilities/globalDefinitions.hpp"
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#if INCLUDE_RTM_OPT
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#include "memory/allocation.inline.hpp"
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#include "runtime/task.hpp"
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#include "runtime/rtmLocking.hpp"
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// One-shot PeriodicTask subclass for enabling RTM locking
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uintx RTMLockingCounters::_calculation_flag = 0;
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@ -58,3 +63,5 @@ void RTMLockingCounters::print_on(outputStream* st) {
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tty->print_cr("# rtm lock aborts %d: " UINTX_FORMAT, i, _abortX_count[i]);
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}
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}
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#endif
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@ -407,14 +407,6 @@ const uint64_t KlassEncodingMetaspaceMax = (uint64_t(max_juint) + 1) << LogKlas
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// Machine dependent stuff
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#if defined(X86) && defined(COMPILER2) && !defined(JAVASE_EMBEDDED)
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// Include Restricted Transactional Memory lock eliding optimization
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#define INCLUDE_RTM_OPT 1
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#define RTM_OPT_ONLY(code) code
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#else
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#define INCLUDE_RTM_OPT 0
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#define RTM_OPT_ONLY(code)
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#endif
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// States of Restricted Transactional Memory usage.
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enum RTMState {
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NoRTM = 0x2, // Don't use RTM
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@ -446,6 +438,15 @@ enum RTMState {
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# include "globalDefinitions_aarch64.hpp"
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#endif
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#ifndef INCLUDE_RTM_OPT
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#define INCLUDE_RTM_OPT 0
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#endif
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#if INCLUDE_RTM_OPT
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#define RTM_OPT_ONLY(code) code
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#else
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#define RTM_OPT_ONLY(code)
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#endif
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// To assure the IRIW property on processors that are not multiple copy
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// atomic, sync instructions must be issued between volatile reads to
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// assure their ordering, instead of after volatile stores.
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