Merge

hotspot/make/jprt.properties

@@ -126,7 +126,7 @@ jprt.my.solaris.sparcv9.test.targets= \
     ${jprt.my.solaris.sparcv9}-{product|fastdebug}-c2-jvm98, \
     ${jprt.my.solaris.sparcv9}-{product|fastdebug}-c2-jvm98_nontiered, \
     ${jprt.my.solaris.sparcv9}-{product|fastdebug}-c2-scimark, \
-    ${jprt.my.solaris.sparcv9}-product-c2-runThese, \
+    ${jprt.my.solaris.sparcv9}-product-c2-runThese8, \
     ${jprt.my.solaris.sparcv9}-{product|fastdebug}-c2-GCBasher_SerialGC, \
     ${jprt.my.solaris.sparcv9}-{product|fastdebug}-c2-GCBasher_ParallelGC, \
     ${jprt.my.solaris.sparcv9}-{product|fastdebug}-c2-GCBasher_ParNewGC, \
@@ -150,8 +150,9 @@ jprt.my.solaris.x64.test.targets= \
     ${jprt.my.solaris.x64}-{product|fastdebug}-c2-jvm98, \
     ${jprt.my.solaris.x64}-{product|fastdebug}-c2-jvm98_nontiered, \
     ${jprt.my.solaris.x64}-{product|fastdebug}-c2-scimark, \
-    ${jprt.my.solaris.x64}-product-c2-runThese, \
+    ${jprt.my.solaris.x64}-product-c2-runThese8, \
-    ${jprt.my.solaris.x64}-product-c2-runThese_Xcomp, \
+    ${jprt.my.solaris.x64}-product-c2-runThese8_Xcomp_lang, \
+    ${jprt.my.solaris.x64}-product-c2-runThese8_Xcomp_vm, \
     ${jprt.my.solaris.x64}-{product|fastdebug}-c2-GCBasher_SerialGC, \
     ${jprt.my.solaris.x64}-{product|fastdebug}-c2-GCBasher_ParallelGC, \
     ${jprt.my.solaris.x64}-{product|fastdebug}-c2-GCBasher_ParNewGC, \
@@ -175,9 +176,11 @@ jprt.my.linux.i586.test.targets = \
     ${jprt.my.linux.i586}-{product|fastdebug}-{c1|c2}-jvm98, \
     ${jprt.my.linux.i586}-{product|fastdebug}-c2-jvm98_nontiered, \
     ${jprt.my.linux.i586}-{product|fastdebug}-{c1|c2}-scimark, \
-    ${jprt.my.linux.i586}-product-c1-runThese_Xcomp, \
+    ${jprt.my.linux.i586}-product-c1-runThese8_Xcomp_lang, \
-    ${jprt.my.linux.i586}-fastdebug-c1-runThese_Xshare, \
+    ${jprt.my.linux.i586}-product-c1-runThese8_Xcomp_vm, \
-    ${jprt.my.linux.i586}-fastdebug-c2-runThese_Xcomp, \
+    ${jprt.my.linux.i586}-fastdebug-c1-runThese8_Xshare, \
+    ${jprt.my.linux.i586}-fastdebug-c2-runThese8_Xcomp_lang, \
+    ${jprt.my.linux.i586}-fastdebug-c2-runThese8_Xcomp_vm, \
     ${jprt.my.linux.i586}-{product|fastdebug}-{c1|c2}-GCBasher_SerialGC, \
     ${jprt.my.linux.i586}-{product|fastdebug}-{c1|c2}-GCBasher_ParallelGC, \
     ${jprt.my.linux.i586}-{product|fastdebug}-{c1|c2}-GCBasher_ParNewGC, \
@@ -243,9 +246,10 @@ jprt.my.windows.i586.test.targets = \
     ${jprt.my.windows.i586}-{product|fastdebug}-{c1|c2}-jvm98, \
     ${jprt.my.windows.i586}-{product|fastdebug}-c2-jvm98_nontiered, \
     ${jprt.my.windows.i586}-{product|fastdebug}-{c1|c2}-scimark, \
-    ${jprt.my.windows.i586}-product-{c1|c2}-runThese, \
+    ${jprt.my.windows.i586}-product-{c1|c2}-runThese8, \
-    ${jprt.my.windows.i586}-product-{c1|c2}-runThese_Xcomp, \
+    ${jprt.my.windows.i586}-product-{c1|c2}-runThese8_Xcomp_lang, \
-    ${jprt.my.windows.i586}-fastdebug-c1-runThese_Xshare, \
+    ${jprt.my.windows.i586}-product-{c1|c2}-runThese8_Xcomp_vm, \
+    ${jprt.my.windows.i586}-fastdebug-c1-runThese8_Xshare, \
     ${jprt.my.windows.i586}-{product|fastdebug}-{c1|c2}-GCBasher_SerialGC, \
     ${jprt.my.windows.i586}-{product|fastdebug}-{c1|c2}-GCBasher_ParallelGC, \
     ${jprt.my.windows.i586}-{product|fastdebug}-{c1|c2}-GCBasher_ParNewGC, \
@@ -269,8 +273,9 @@ jprt.my.windows.x64.test.targets = \
     ${jprt.my.windows.x64}-{product|fastdebug}-c2-jvm98, \
     ${jprt.my.windows.x64}-{product|fastdebug}-c2-jvm98_nontiered, \
     ${jprt.my.windows.x64}-{product|fastdebug}-c2-scimark, \
-    ${jprt.my.windows.x64}-product-c2-runThese, \
+    ${jprt.my.windows.x64}-product-c2-runThese8, \
-    ${jprt.my.windows.x64}-product-c2-runThese_Xcomp, \
+    ${jprt.my.windows.x64}-product-c2-runThese8_Xcomp_lang, \
+    ${jprt.my.windows.x64}-product-c2-runThese8_Xcomp_vm, \
     ${jprt.my.windows.x64}-{product|fastdebug}-c2-GCBasher_SerialGC, \
     ${jprt.my.windows.x64}-{product|fastdebug}-c2-GCBasher_ParallelGC, \
     ${jprt.my.windows.x64}-{product|fastdebug}-c2-GCBasher_ParNewGC, \

hotspot/src/cpu/ppc/vm/frame_ppc.cpp

@@ -36,7 +36,6 @@
 #include "runtime/signature.hpp"
 #include "runtime/stubCodeGenerator.hpp"
 #include "runtime/stubRoutines.hpp"
-#include "vmreg_ppc.inline.hpp"
 #ifdef COMPILER1
 #include "c1/c1_Runtime1.hpp"
 #include "runtime/vframeArray.hpp"
@@ -155,15 +154,6 @@ void frame::patch_pc(Thread* thread, address pc) {
   }
 }
 
-void frame::pd_gc_epilog() {
-  if (is_interpreted_frame()) {
-    // Set constant pool cache entry for interpreter.
-    Method* m = interpreter_frame_method();
-
-    *interpreter_frame_cpoolcache_addr() = m->constants()->cache();
-  }
-}
-
 bool frame::is_interpreted_frame_valid(JavaThread* thread) const {
   // Is there anything to do?
   assert(is_interpreted_frame(), "Not an interpreted frame");

hotspot/src/cpu/ppc/vm/frame_ppc.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
  * Copyright 2012, 2014 SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -27,6 +27,7 @@
 #define CPU_PPC_VM_FRAME_PPC_INLINE_HPP
 
 #include "code/codeCache.hpp"
+#include "code/vmreg.inline.hpp"
 
 // Inline functions for ppc64 frames:
 
@@ -134,12 +135,12 @@ inline intptr_t** frame::interpreter_frame_locals_addr() const {
   return (intptr_t**)&istate->_locals;
 }
 
-inline intptr_t* frame::interpreter_frame_bcx_addr() const {
+inline intptr_t* frame::interpreter_frame_bcp_addr() const {
   interpreterState istate = get_interpreterState();
   return (intptr_t*)&istate->_bcp;
 }
 
-inline intptr_t* frame::interpreter_frame_mdx_addr() const {
+inline intptr_t* frame::interpreter_frame_mdp_addr() const {
   interpreterState istate = get_interpreterState();
   return (intptr_t*)&istate->_mdx;
 }
@@ -209,10 +210,10 @@ inline frame::ijava_state* frame::get_ijava_state() const {
 inline intptr_t** frame::interpreter_frame_locals_addr() const {
   return (intptr_t**) &(get_ijava_state()->locals);
 }
-inline intptr_t* frame::interpreter_frame_bcx_addr() const {
+inline intptr_t* frame::interpreter_frame_bcp_addr() const {
   return (intptr_t*) &(get_ijava_state()->bcp);
 }
-inline intptr_t* frame::interpreter_frame_mdx_addr() const {
+inline intptr_t* frame::interpreter_frame_mdp_addr() const {
   return (intptr_t*) &(get_ijava_state()->mdx);
 }
 // Pointer beyond the "oldest/deepest" BasicObjectLock on stack.

hotspot/src/cpu/ppc/vm/icache_ppc.cpp

@@ -68,7 +68,6 @@ int ICache::ppc64_flush_icache(address start, int lines, int magic) {
 }
 
 void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) {
-  StubCodeMark mark(this, "ICache", "flush_icache_stub");
 
   *flush_icache_stub = (ICache::flush_icache_stub_t)ICache::ppc64_flush_icache;
 

hotspot/src/cpu/ppc/vm/interpreterRT_ppc.hpp

@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2002, 2014, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright 2012, 2014 SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -26,6 +26,7 @@
 #ifndef CPU_PPC_VM_INTERPRETERRT_PPC_HPP
 #define CPU_PPC_VM_INTERPRETERRT_PPC_HPP
 
+#include "asm/macroAssembler.hpp"
 #include "memory/allocation.hpp"
 
 // native method calls

hotspot/src/cpu/ppc/vm/interpreter_ppc.cpp

@@ -30,6 +30,7 @@
 #include "interpreter/interpreter.hpp"
 #include "interpreter/interpreterGenerator.hpp"
 #include "interpreter/interpreterRuntime.hpp"
+#include "interpreter/interp_masm.hpp"
 #include "interpreter/templateTable.hpp"
 #include "oops/arrayOop.hpp"
 #include "oops/methodData.hpp"

hotspot/src/cpu/ppc/vm/macroAssembler_ppc.cpp

@@ -32,6 +32,7 @@
 #include "memory/resourceArea.hpp"
 #include "prims/methodHandles.hpp"
 #include "runtime/biasedLocking.hpp"
+#include "runtime/icache.hpp"
 #include "runtime/interfaceSupport.hpp"
 #include "runtime/objectMonitor.hpp"
 #include "runtime/os.hpp"

hotspot/src/cpu/ppc/vm/ppc.ad

@@ -267,7 +267,7 @@ register %{
 // It's worth about 1% on SPEC geomean to get this right.
 
 // Chunk0, chunk1, and chunk2 form the MachRegisterNumbers enumeration
-// in adGlobals_ppc64.hpp which defines the <register>_num values, e.g.
+// in adGlobals_ppc.hpp which defines the <register>_num values, e.g.
 // R3_num. Therefore, R3_num may not be (and in reality is not)
 // the same as R3->encoding()! Furthermore, we cannot make any
 // assumptions on ordering, e.g. R3_num may be less than R2_num.
@@ -1632,7 +1632,7 @@ enum RC { rc_bad, rc_int, rc_float, rc_stack };
 static enum RC rc_class(OptoReg::Name reg) {
   // Return the register class for the given register. The given register
   // reg is a <register>_num value, which is an index into the MachRegisterNumbers
-  // enumeration in adGlobals_ppc64.hpp.
+  // enumeration in adGlobals_ppc.hpp.
 
   if (reg == OptoReg::Bad) return rc_bad;
 

hotspot/src/cpu/ppc/vm/register_ppc.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
  * Copyright 2012, 2014 SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -27,7 +27,6 @@
 #define CPU_PPC_VM_REGISTER_PPC_HPP
 
 #include "asm/register.hpp"
-#include "vm_version_ppc.hpp"
 
 // forward declaration
 class Address;
@@ -92,8 +91,8 @@ class RegisterImpl: public AbstractRegisterImpl {
   inline friend Register as_Register(int encoding);
 
   // accessors
-  int      encoding()  const { assert(is_valid(), "invalid register"); return value(); }
+  int encoding()  const { assert(is_valid(), "invalid register"); return value(); }
-  VMReg    as_VMReg();
+  inline VMReg as_VMReg();
   Register successor() const { return as_Register(encoding() + 1); }
 
   // testers
@@ -208,8 +207,8 @@ class ConditionRegisterImpl: public AbstractRegisterImpl {
   inline friend ConditionRegister as_ConditionRegister(int encoding);
 
   // accessors
-  int   encoding() const { assert(is_valid(), "invalid register"); return value(); }
+  int encoding() const { assert(is_valid(), "invalid register"); return value(); }
-  VMReg as_VMReg();
+  inline VMReg as_VMReg();
 
   // testers
   bool is_valid()       const { return  (0 <= value()        &&  value() < number_of_registers); }
@@ -264,7 +263,7 @@ class FloatRegisterImpl: public AbstractRegisterImpl {
 
   // accessors
   int           encoding() const { assert(is_valid(), "invalid register"); return value(); }
-  VMReg         as_VMReg();
+  inline VMReg  as_VMReg();
   FloatRegister successor() const { return as_FloatRegister(encoding() + 1); }
 
   // testers
@@ -365,7 +364,7 @@ class SpecialRegisterImpl: public AbstractRegisterImpl {
 
   // accessors
   int             encoding()  const { assert(is_valid(), "invalid register"); return value(); }
-  VMReg           as_VMReg();
+  inline VMReg    as_VMReg();
 
   // testers
   bool is_valid()       const { return 0 <= value() && value() < number_of_registers; }

hotspot/src/cpu/ppc/vm/runtime_ppc.cpp

@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1998, 2014, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright 2012, 2014 SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -30,6 +30,7 @@
 #include "classfile/systemDictionary.hpp"
 #include "code/vmreg.hpp"
 #include "interpreter/interpreter.hpp"
+#include "interpreter/interp_masm.hpp"
 #include "nativeInst_ppc.hpp"
 #include "opto/runtime.hpp"
 #include "runtime/interfaceSupport.hpp"
@@ -37,7 +38,6 @@
 #include "runtime/stubRoutines.hpp"
 #include "runtime/vframeArray.hpp"
 #include "utilities/globalDefinitions.hpp"
-#include "vmreg_ppc.inline.hpp"
 #endif
 
 #define __ masm->

hotspot/src/cpu/ppc/vm/sharedRuntime_ppc.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * Copyright 2012, 2014 SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -29,16 +29,17 @@
 #include "code/icBuffer.hpp"
 #include "code/vtableStubs.hpp"
 #include "interpreter/interpreter.hpp"
+#include "interpreter/interp_masm.hpp"
 #include "oops/compiledICHolder.hpp"
 #include "prims/jvmtiRedefineClassesTrace.hpp"
 #include "runtime/sharedRuntime.hpp"
 #include "runtime/vframeArray.hpp"
 #include "vmreg_ppc.inline.hpp"
-#include "adfiles/ad_ppc_64.hpp"
 #ifdef COMPILER1
 #include "c1/c1_Runtime1.hpp"
 #endif
 #ifdef COMPILER2
+#include "adfiles/ad_ppc_64.hpp"
 #include "opto/runtime.hpp"
 #endif
 

hotspot/src/cpu/ppc/vm/stubGenerator_ppc.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * Copyright 2012, 2014 SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -401,11 +401,11 @@ class StubGenerator: public StubCodeGenerator {
     __ load_const(exception_file, (void*)__FILE__);
     __ load_const(exception_line, (void*)__LINE__);
 
-    __ std(R3_ARG1, thread_(pending_exception));
+    __ std(R3_ARG1, in_bytes(JavaThread::pending_exception_offset()), R16_thread);
     // store into `char *'
-    __ std(exception_file, thread_(exception_file));
+    __ std(exception_file, in_bytes(JavaThread::exception_file_offset()), R16_thread);
     // store into `int'
-    __ stw(exception_line, thread_(exception_line));
+    __ stw(exception_line, in_bytes(JavaThread::exception_line_offset()), R16_thread);
 
     // complete return to VM
     assert(StubRoutines::_call_stub_return_address != NULL, "must have been generated before");
@@ -524,8 +524,6 @@ class StubGenerator: public StubCodeGenerator {
     int frame_size_in_bytes = frame::abi_reg_args_size;
     OopMap* map = new OopMap(frame_size_in_bytes / sizeof(jint), 0);
 
-    StubCodeMark mark(this, "StubRoutines", "throw_exception");
-
     address start = __ pc();
 
     __ save_LR_CR(R11_scratch1);
@@ -846,8 +844,6 @@ class StubGenerator: public StubCodeGenerator {
   //
   // Don't generate, rather use C++ code.
   address generate_verify_oop() {
-    StubCodeMark mark(this, "StubRoutines", "verify_oop");
-
     // this is actually a `FunctionDescriptor*'.
     address start = 0;
 

hotspot/src/cpu/ppc/vm/templateInterpreter_ppc.cpp

@@ -30,6 +30,7 @@
 #include "interpreter/interpreter.hpp"
 #include "interpreter/interpreterGenerator.hpp"
 #include "interpreter/interpreterRuntime.hpp"
+#include "interpreter/interp_masm.hpp"
 #include "interpreter/templateTable.hpp"
 #include "oops/arrayOop.hpp"
 #include "oops/methodData.hpp"

hotspot/src/cpu/ppc/vm/templateTable_ppc_64.cpp

@@ -27,6 +27,7 @@
 #include "asm/macroAssembler.inline.hpp"
 #include "interpreter/interpreter.hpp"
 #include "interpreter/interpreterRuntime.hpp"
+#include "interpreter/interp_masm.hpp"
 #include "interpreter/templateInterpreter.hpp"
 #include "interpreter/templateTable.hpp"
 #include "memory/universe.inline.hpp"

hotspot/src/cpu/ppc/vm/vmreg_ppc.hpp

@@ -26,10 +26,28 @@
 #ifndef CPU_PPC_VM_VMREG_PPC_HPP
 #define CPU_PPC_VM_VMREG_PPC_HPP
 
-  bool is_Register();
+inline bool is_Register() {
-  Register as_Register();
+  return (unsigned int)value() < (unsigned int)ConcreteRegisterImpl::max_gpr;
+}
 
-  bool is_FloatRegister();
+inline bool is_FloatRegister() {
-  FloatRegister as_FloatRegister();
+  return value() >= ConcreteRegisterImpl::max_gpr &&
+         value() < ConcreteRegisterImpl::max_fpr;
+}
+
+inline Register as_Register() {
+  assert(is_Register() && is_even(value()), "even-aligned GPR name");
+  return ::as_Register(value()>>1);
+}
+
+inline FloatRegister as_FloatRegister() {
+  assert(is_FloatRegister() && is_even(value()), "must be");
+  return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1);
+}
+
+inline bool is_concrete() {
+  assert(is_reg(), "must be");
+  return is_even(value());
+}
 
 #endif // CPU_PPC_VM_VMREG_PPC_HPP

hotspot/src/cpu/ppc/vm/vmreg_ppc.inline.hpp

@@ -44,28 +44,5 @@ inline VMReg SpecialRegisterImpl::as_VMReg() {
   return VMRegImpl::as_VMReg((encoding()) + ConcreteRegisterImpl::max_cnd);
 }
 
-inline bool VMRegImpl::is_Register() {
-  return (unsigned int)value() < (unsigned int)ConcreteRegisterImpl::max_gpr;
-}
-
-inline bool VMRegImpl::is_FloatRegister() {
-  return value() >= ConcreteRegisterImpl::max_gpr &&
-         value() < ConcreteRegisterImpl::max_fpr;
-}
-
-inline Register VMRegImpl::as_Register() {
-  assert(is_Register() && is_even(value()), "even-aligned GPR name");
-  return ::as_Register(value()>>1);
-}
-
-inline FloatRegister VMRegImpl::as_FloatRegister() {
-  assert(is_FloatRegister() && is_even(value()), "must be");
-  return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1);
-}
-
-inline bool VMRegImpl::is_concrete() {
-  assert(is_reg(), "must be");
-  return is_even(value());
-}
 
 #endif // CPU_PPC_VM_VMREG_PPC_INLINE_HPP

hotspot/src/cpu/sparc/vm/c1_Runtime1_sparc.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -31,7 +31,6 @@
 #include "oops/compiledICHolder.hpp"
 #include "oops/oop.inline.hpp"
 #include "prims/jvmtiExport.hpp"
-#include "register_sparc.hpp"
 #include "runtime/sharedRuntime.hpp"
 #include "runtime/signature.hpp"
 #include "runtime/vframeArray.hpp"

hotspot/src/cpu/sparc/vm/frame_sparc.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -23,6 +23,7 @@
  */
 
 #include "precompiled.hpp"
+#include "code/codeCache.hpp"
 #include "interpreter/interpreter.hpp"
 #include "memory/resourceArea.hpp"
 #include "oops/markOop.hpp"
@@ -593,17 +594,6 @@ bool frame::interpreter_frame_equals_unpacked_fp(intptr_t* fp) {
   return this->fp() == fp;
 }
 
-
-void frame::pd_gc_epilog() {
-  if (is_interpreted_frame()) {
-    // set constant pool cache entry for interpreter
-    Method* m = interpreter_frame_method();
-
-    *interpreter_frame_cpoolcache_addr() = m->constants()->cache();
-  }
-}
-
-
 bool frame::is_interpreted_frame_valid(JavaThread* thread) const {
 #ifdef CC_INTERP
   // Is there anything to do?
@@ -641,10 +631,10 @@ bool frame::is_interpreted_frame_valid(JavaThread* thread) const {
     return false;
   }
 
-  // validate bci/bcx
+  // validate bci/bcp
 
-  intptr_t  bcx    = interpreter_frame_bcx();
+  address bcp = interpreter_frame_bcp();
-  if (m->validate_bci_from_bcx(bcx) < 0) {
+  if (m->validate_bci_from_bcp(bcp) < 0) {
     return false;
   }
 

hotspot/src/cpu/sparc/vm/frame_sparc.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -78,7 +78,6 @@
 //    Lesp         first free element of expression stack
 //                 (which grows towards __higher__ addresses)
 //    Lbcp         is set to address of bytecode to execute
-//                 It is accessed in the frame under the name "bcx".
 //                 It may at times (during GC) be an index instead.
 //    Lmethod      the method being interpreted
 //    Llocals      the base pointer for accessing the locals array

hotspot/src/cpu/sparc/vm/frame_sparc.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -26,6 +26,7 @@
 #define CPU_SPARC_VM_FRAME_SPARC_INLINE_HPP
 
 #include "asm/macroAssembler.hpp"
+#include "code/vmreg.inline.hpp"
 
 // Inline functions for SPARC frames:
 
@@ -98,12 +99,12 @@ inline intptr_t** frame::interpreter_frame_locals_addr() const {
   return (intptr_t**) &istate->_locals;
 }
 
-inline intptr_t* frame::interpreter_frame_bcx_addr() const {
+inline intptr_t* frame::interpreter_frame_bcp_addr() const {
   interpreterState istate = get_interpreterState();
   return (intptr_t*) &istate->_bcp;
 }
 
-inline intptr_t* frame::interpreter_frame_mdx_addr() const {
+inline intptr_t* frame::interpreter_frame_mdp_addr() const {
   interpreterState istate = get_interpreterState();
   return (intptr_t*) &istate->_mdx;
 }
@@ -165,12 +166,11 @@ inline intptr_t** frame::interpreter_frame_locals_addr() const {
   return (intptr_t**) sp_addr_at( Llocals->sp_offset_in_saved_window());
 }
 
-inline intptr_t* frame::interpreter_frame_bcx_addr() const {
+inline intptr_t* frame::interpreter_frame_bcp_addr() const {
-  // %%%%% reinterpreting Lbcp as a bcx
   return (intptr_t*) sp_addr_at( Lbcp->sp_offset_in_saved_window());
 }
 
-inline intptr_t* frame::interpreter_frame_mdx_addr() const {
+inline intptr_t* frame::interpreter_frame_mdp_addr() const {
   // %%%%% reinterpreting ImethodDataPtr as a mdx
   return (intptr_t*) sp_addr_at( ImethodDataPtr->sp_offset_in_saved_window());
 }

hotspot/src/cpu/sparc/vm/interpreterRT_sparc.cpp

@@ -23,6 +23,7 @@
  */
 
 #include "precompiled.hpp"
+#include "asm/macroAssembler.inline.hpp"
 #include "interpreter/interpreter.hpp"
 #include "interpreter/interpreterRuntime.hpp"
 #include "memory/allocation.inline.hpp"

hotspot/src/cpu/sparc/vm/interpreter_sparc.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -28,6 +28,7 @@
 #include "interpreter/interpreter.hpp"
 #include "interpreter/interpreterGenerator.hpp"
 #include "interpreter/interpreterRuntime.hpp"
+#include "interpreter/interp_masm.hpp"
 #include "interpreter/templateTable.hpp"
 #include "oops/arrayOop.hpp"
 #include "oops/methodData.hpp"

hotspot/src/cpu/sparc/vm/macroAssembler_sparc.cpp

@@ -23,7 +23,7 @@
  */
 
 #include "precompiled.hpp"
-#include "asm/assembler.inline.hpp"
+#include "asm/macroAssembler.inline.hpp"
 #include "compiler/disassembler.hpp"
 #include "gc_interface/collectedHeap.inline.hpp"
 #include "interpreter/interpreter.hpp"

hotspot/src/cpu/sparc/vm/macroAssembler_sparc.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -186,8 +186,7 @@ REGISTER_DECLARATION(Register, ImethodDataPtr   , I2); // Pointer to the current
 //       the interpreter to work right
 // (These assignments must be compatible with L7_thread_cache; see above.)
 
-// Since Lbcp points into the middle of the method object,
+// Lbcp points into the middle of the method object.
-// it is temporarily converted into a "bcx" during GC.
 
 // Exception processing
 // These registers are passed into exception handlers.

hotspot/src/cpu/sparc/vm/methodHandles_sparc.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2008, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2008, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -25,6 +25,7 @@
 #include "precompiled.hpp"
 #include "asm/macroAssembler.hpp"
 #include "interpreter/interpreter.hpp"
+#include "interpreter/interp_masm.hpp"
 #include "memory/allocation.inline.hpp"
 #include "prims/methodHandles.hpp"
 

hotspot/src/cpu/sparc/vm/register_sparc.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -26,7 +26,6 @@
 #define CPU_SPARC_VM_REGISTER_SPARC_HPP
 
 #include "asm/register.hpp"
-#include "vm_version_sparc.hpp"
 
 // forward declaration
 class Address;
@@ -65,7 +64,7 @@ class RegisterImpl: public AbstractRegisterImpl {
   friend Register as_oRegister(int number);
   friend Register as_gRegister(int number);
 
-  VMReg as_VMReg();
+  inline VMReg as_VMReg();
 
   // accessors
   int   encoding() const                              { assert(is_valid(), "invalid register"); return value(); }
@@ -234,7 +233,7 @@ class FloatRegisterImpl: public AbstractRegisterImpl {
   };
 
   // construction
-  VMReg as_VMReg( );
+  inline VMReg as_VMReg( );
 
   // accessors
   int encoding() const                                { assert(is_valid(), "invalid register"); return value(); }

hotspot/src/cpu/sparc/vm/templateInterpreter_sparc.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -28,6 +28,7 @@
 #include "interpreter/interpreter.hpp"
 #include "interpreter/interpreterGenerator.hpp"
 #include "interpreter/interpreterRuntime.hpp"
+#include "interpreter/interp_masm.hpp"
 #include "interpreter/templateTable.hpp"
 #include "oops/arrayOop.hpp"
 #include "oops/methodData.hpp"
@@ -1785,7 +1786,7 @@ void TemplateInterpreterGenerator::generate_throw_exception() {
   __ verify_thread();
   // expression stack is undefined here
   // O0: exception, i.e. Oexception
-  // Lbcp: exception bcx
+  // Lbcp: exception bcp
   __ verify_oop(Oexception);
 
 

hotspot/src/cpu/sparc/vm/templateTable_sparc.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -25,6 +25,7 @@
 #include "precompiled.hpp"
 #include "interpreter/interpreter.hpp"
 #include "interpreter/interpreterRuntime.hpp"
+#include "interpreter/interp_masm.hpp"
 #include "interpreter/templateTable.hpp"
 #include "memory/universe.inline.hpp"
 #include "oops/methodData.hpp"

hotspot/src/cpu/sparc/vm/vmreg_sparc.hpp

@@ -25,10 +25,35 @@
 #ifndef CPU_SPARC_VM_VMREG_SPARC_HPP
 #define CPU_SPARC_VM_VMREG_SPARC_HPP
 
-  bool is_Register();
+inline bool is_Register() { return value() >= 0 && value() < ConcreteRegisterImpl::max_gpr; }
-  Register as_Register();
+inline bool is_FloatRegister() { return value() >= ConcreteRegisterImpl::max_gpr &&
+                                                   value() < ConcreteRegisterImpl::max_fpr; }
+inline Register as_Register() {
 
-  bool is_FloatRegister();
+  assert( is_Register() && is_even(value()), "even-aligned GPR name" );
-  FloatRegister as_FloatRegister();
+  // Yuk
+  return ::as_Register(value()>>1);
+}
+
+inline FloatRegister as_FloatRegister() {
+  assert( is_FloatRegister(), "must be" );
+  // Yuk
+  return ::as_FloatRegister( value() - ConcreteRegisterImpl::max_gpr );
+}
+
+inline   bool is_concrete() {
+  assert(is_reg(), "must be");
+  int v = value();
+  if ( v  <  ConcreteRegisterImpl::max_gpr ) {
+    return is_even(v);
+  }
+  // F0..F31
+  if ( v <= ConcreteRegisterImpl::max_gpr + 31) return true;
+  if ( v <  ConcreteRegisterImpl::max_fpr) {
+    return is_even(v);
+  }
+  assert(false, "what register?");
+  return false;
+}
 
 #endif // CPU_SPARC_VM_VMREG_SPARC_HPP

hotspot/src/cpu/sparc/vm/vmreg_sparc.inline.hpp

@@ -33,35 +33,5 @@ inline VMReg RegisterImpl::as_VMReg() {
 inline VMReg FloatRegisterImpl::as_VMReg() { return VMRegImpl::as_VMReg( ConcreteRegisterImpl::max_gpr + encoding() ); }
 
 
-inline bool VMRegImpl::is_Register() { return value() >= 0 && value() < ConcreteRegisterImpl::max_gpr; }
-inline bool VMRegImpl::is_FloatRegister() { return value() >= ConcreteRegisterImpl::max_gpr &&
-                                                   value() < ConcreteRegisterImpl::max_fpr; }
-inline Register VMRegImpl::as_Register() {
-
-  assert( is_Register() && is_even(value()), "even-aligned GPR name" );
-  // Yuk
-  return ::as_Register(value()>>1);
-}
-
-inline FloatRegister VMRegImpl::as_FloatRegister() {
-  assert( is_FloatRegister(), "must be" );
-  // Yuk
-  return ::as_FloatRegister( value() - ConcreteRegisterImpl::max_gpr );
-}
-
-inline   bool VMRegImpl::is_concrete() {
-  assert(is_reg(), "must be");
-  int v = value();
-  if ( v  <  ConcreteRegisterImpl::max_gpr ) {
-    return is_even(v);
-  }
-  // F0..F31
-  if ( v <= ConcreteRegisterImpl::max_gpr + 31) return true;
-  if ( v <  ConcreteRegisterImpl::max_fpr) {
-    return is_even(v);
-  }
-  assert(false, "what register?");
-  return false;
-}
 
 #endif // CPU_SPARC_VM_VMREG_SPARC_INLINE_HPP

hotspot/src/cpu/x86/vm/frame_x86.cpp

@@ -537,10 +537,6 @@ bool frame::interpreter_frame_equals_unpacked_fp(intptr_t* fp) {
   return _fp == (fp - diff);
 }
 
-void frame::pd_gc_epilog() {
-  // nothing done here now
-}
-
 bool frame::is_interpreted_frame_valid(JavaThread* thread) const {
 // QQQ
 #ifdef CC_INTERP
@@ -577,10 +573,10 @@ bool frame::is_interpreted_frame_valid(JavaThread* thread) const {
     return false;
   }
 
-  // validate bci/bcx
+  // validate bci/bcp
 
-  intptr_t  bcx    = interpreter_frame_bcx();
+  address bcp = interpreter_frame_bcp();
-  if (m->validate_bci_from_bcx(bcx) < 0) {
+  if (m->validate_bci_from_bcp(bcp) < 0) {
     return false;
   }
 
@@ -692,10 +688,10 @@ void frame::describe_pd(FrameValues& values, int frame_no) {
     DESCRIBE_FP_OFFSET(interpreter_frame_sender_sp);
     DESCRIBE_FP_OFFSET(interpreter_frame_last_sp);
     DESCRIBE_FP_OFFSET(interpreter_frame_method);
-    DESCRIBE_FP_OFFSET(interpreter_frame_mdx);
+    DESCRIBE_FP_OFFSET(interpreter_frame_mdp);
     DESCRIBE_FP_OFFSET(interpreter_frame_cache);
     DESCRIBE_FP_OFFSET(interpreter_frame_locals);
-    DESCRIBE_FP_OFFSET(interpreter_frame_bcx);
+    DESCRIBE_FP_OFFSET(interpreter_frame_bcp);
     DESCRIBE_FP_OFFSET(interpreter_frame_initial_sp);
 #endif
   }

hotspot/src/cpu/x86/vm/frame_x86.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -40,7 +40,7 @@
 //     ...                        | monitor block size
 //    [monitors              ]   /
 //    [monitor block size    ]
-//    [byte code index/pointr]                   = bcx()                bcx_offset
+//    [byte code pointer     ]                   = bcp()                bcp_offset
 //    [pointer to locals     ]                   = locals()             locals_offset
 //    [constant pool cache   ]                   = cache()              cache_offset
 //    [methodData            ]                   = mdp()                mdx_offset
@@ -111,11 +111,11 @@
     // outgoing sp before a call to an invoked method
     interpreter_frame_last_sp_offset                 = interpreter_frame_sender_sp_offset - 1,
     interpreter_frame_method_offset                  = interpreter_frame_last_sp_offset - 1,
-    interpreter_frame_mdx_offset                     = interpreter_frame_method_offset - 1,
+    interpreter_frame_mdp_offset                     = interpreter_frame_method_offset - 1,
-    interpreter_frame_cache_offset                   = interpreter_frame_mdx_offset - 1,
+    interpreter_frame_cache_offset                   = interpreter_frame_mdp_offset - 1,
     interpreter_frame_locals_offset                  = interpreter_frame_cache_offset - 1,
-    interpreter_frame_bcx_offset                     = interpreter_frame_locals_offset - 1,
+    interpreter_frame_bcp_offset                     = interpreter_frame_locals_offset - 1,
-    interpreter_frame_initial_sp_offset              = interpreter_frame_bcx_offset - 1,
+    interpreter_frame_initial_sp_offset              = interpreter_frame_bcp_offset - 1,
 
     interpreter_frame_monitor_block_top_offset       = interpreter_frame_initial_sp_offset,
     interpreter_frame_monitor_block_bottom_offset    = interpreter_frame_initial_sp_offset,

hotspot/src/cpu/x86/vm/frame_x86.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -26,6 +26,7 @@
 #define CPU_X86_VM_FRAME_X86_INLINE_HPP
 
 #include "code/codeCache.hpp"
+#include "code/vmreg.inline.hpp"
 
 // Inline functions for Intel frames:
 
@@ -168,7 +169,7 @@ inline intptr_t** frame::interpreter_frame_locals_addr() const {
   return &(get_interpreterState()->_locals);
 }
 
-inline intptr_t* frame::interpreter_frame_bcx_addr() const {
+inline intptr_t* frame::interpreter_frame_bcp_addr() const {
   assert(is_interpreted_frame(), "must be interpreted");
   return (intptr_t*) &(get_interpreterState()->_bcp);
 }
@@ -188,7 +189,7 @@ inline Method** frame::interpreter_frame_method_addr() const {
   return &(get_interpreterState()->_method);
 }
 
-inline intptr_t* frame::interpreter_frame_mdx_addr() const {
+inline intptr_t* frame::interpreter_frame_mdp_addr() const {
   assert(is_interpreted_frame(), "must be interpreted");
   return (intptr_t*) &(get_interpreterState()->_mdx);
 }
@@ -210,13 +211,13 @@ inline intptr_t* frame::interpreter_frame_last_sp() const {
   return *(intptr_t**)addr_at(interpreter_frame_last_sp_offset);
 }
 
-inline intptr_t* frame::interpreter_frame_bcx_addr() const {
+inline intptr_t* frame::interpreter_frame_bcp_addr() const {
-  return (intptr_t*)addr_at(interpreter_frame_bcx_offset);
+  return (intptr_t*)addr_at(interpreter_frame_bcp_offset);
 }
 
 
-inline intptr_t* frame::interpreter_frame_mdx_addr() const {
+inline intptr_t* frame::interpreter_frame_mdp_addr() const {
-  return (intptr_t*)addr_at(interpreter_frame_mdx_offset);
+  return (intptr_t*)addr_at(interpreter_frame_mdp_offset);
 }
 
 

hotspot/src/cpu/x86/vm/interp_masm_x86.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -134,7 +134,7 @@ void InterpreterMacroAssembler::profile_arguments_type(Register mdp, Register ca
         shll(tmp, exact_log2(DataLayout::cell_size));
         addptr(mdp, tmp);
       }
-      movptr(Address(rbp, frame::interpreter_frame_mdx_offset * wordSize), mdp);
+      movptr(Address(rbp, frame::interpreter_frame_mdp_offset * wordSize), mdp);
     } else {
       assert(MethodData::profile_return(), "either profile call args or call ret");
       update_mdp_by_constant(mdp, in_bytes(TypeEntriesAtCall::return_only_size()));

hotspot/src/cpu/x86/vm/interp_masm_x86_32.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -826,7 +826,7 @@ void InterpreterMacroAssembler::unlock_object(Register lock_reg) {
 // Test ImethodDataPtr.  If it is null, continue at the specified label
 void InterpreterMacroAssembler::test_method_data_pointer(Register mdp, Label& zero_continue) {
   assert(ProfileInterpreter, "must be profiling interpreter");
-  movptr(mdp, Address(rbp, frame::interpreter_frame_mdx_offset * wordSize));
+  movptr(mdp, Address(rbp, frame::interpreter_frame_mdp_offset * wordSize));
   testptr(mdp, mdp);
   jcc(Assembler::zero, zero_continue);
 }
@@ -853,7 +853,7 @@ void InterpreterMacroAssembler::set_method_data_pointer_for_bcp() {
   addptr(rbx, in_bytes(MethodData::data_offset()));
   addptr(rax, rbx);
   bind(set_mdp);
-  movptr(Address(rbp, frame::interpreter_frame_mdx_offset * wordSize), rax);
+  movptr(Address(rbp, frame::interpreter_frame_mdp_offset * wordSize), rax);
   pop(rbx);
   pop(rax);
 }
@@ -975,7 +975,7 @@ void InterpreterMacroAssembler::update_mdp_by_offset(Register mdp_in, int offset
   assert(ProfileInterpreter, "must be profiling interpreter");
   Address disp_address(mdp_in, offset_of_disp);
   addptr(mdp_in,disp_address);
-  movptr(Address(rbp, frame::interpreter_frame_mdx_offset * wordSize), mdp_in);
+  movptr(Address(rbp, frame::interpreter_frame_mdp_offset * wordSize), mdp_in);
 }
 
 
@@ -983,14 +983,14 @@ void InterpreterMacroAssembler::update_mdp_by_offset(Register mdp_in, Register r
   assert(ProfileInterpreter, "must be profiling interpreter");
   Address disp_address(mdp_in, reg, Address::times_1, offset_of_disp);
   addptr(mdp_in, disp_address);
-  movptr(Address(rbp, frame::interpreter_frame_mdx_offset * wordSize), mdp_in);
+  movptr(Address(rbp, frame::interpreter_frame_mdp_offset * wordSize), mdp_in);
 }
 
 
 void InterpreterMacroAssembler::update_mdp_by_constant(Register mdp_in, int constant) {
   assert(ProfileInterpreter, "must be profiling interpreter");
   addptr(mdp_in, constant);
-  movptr(Address(rbp, frame::interpreter_frame_mdx_offset * wordSize), mdp_in);
+  movptr(Address(rbp, frame::interpreter_frame_mdp_offset * wordSize), mdp_in);
 }
 
 

hotspot/src/cpu/x86/vm/interp_masm_x86_32.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -61,8 +61,8 @@
 
 #else
 
-  void save_bcp()                                          { movptr(Address(rbp, frame::interpreter_frame_bcx_offset * wordSize), rsi); }
+  void save_bcp()                                          { movptr(Address(rbp, frame::interpreter_frame_bcp_offset * wordSize), rsi); }
-  void restore_bcp()                                       { movptr(rsi, Address(rbp, frame::interpreter_frame_bcx_offset * wordSize)); }
+  void restore_bcp()                                       { movptr(rsi, Address(rbp, frame::interpreter_frame_bcp_offset * wordSize)); }
   void restore_locals()                                    { movptr(rdi, Address(rbp, frame::interpreter_frame_locals_offset * wordSize)); }
 
   // Helpers for runtime call arguments/results

hotspot/src/cpu/x86/vm/interp_masm_x86_64.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -841,7 +841,7 @@ void InterpreterMacroAssembler::unlock_object(Register lock_reg) {
 void InterpreterMacroAssembler::test_method_data_pointer(Register mdp,
                                                          Label& zero_continue) {
   assert(ProfileInterpreter, "must be profiling interpreter");
-  movptr(mdp, Address(rbp, frame::interpreter_frame_mdx_offset * wordSize));
+  movptr(mdp, Address(rbp, frame::interpreter_frame_mdp_offset * wordSize));
   testptr(mdp, mdp);
   jcc(Assembler::zero, zero_continue);
 }
@@ -868,7 +868,7 @@ void InterpreterMacroAssembler::set_method_data_pointer_for_bcp() {
   addptr(rbx, in_bytes(MethodData::data_offset()));
   addptr(rax, rbx);
   bind(set_mdp);
-  movptr(Address(rbp, frame::interpreter_frame_mdx_offset * wordSize), rax);
+  movptr(Address(rbp, frame::interpreter_frame_mdp_offset * wordSize), rax);
   pop(rbx);
   pop(rax);
 }
@@ -991,7 +991,7 @@ void InterpreterMacroAssembler::update_mdp_by_offset(Register mdp_in,
   assert(ProfileInterpreter, "must be profiling interpreter");
   Address disp_address(mdp_in, offset_of_disp);
   addptr(mdp_in, disp_address);
-  movptr(Address(rbp, frame::interpreter_frame_mdx_offset * wordSize), mdp_in);
+  movptr(Address(rbp, frame::interpreter_frame_mdp_offset * wordSize), mdp_in);
 }
 
 
@@ -1001,7 +1001,7 @@ void InterpreterMacroAssembler::update_mdp_by_offset(Register mdp_in,
   assert(ProfileInterpreter, "must be profiling interpreter");
   Address disp_address(mdp_in, reg, Address::times_1, offset_of_disp);
   addptr(mdp_in, disp_address);
-  movptr(Address(rbp, frame::interpreter_frame_mdx_offset * wordSize), mdp_in);
+  movptr(Address(rbp, frame::interpreter_frame_mdp_offset * wordSize), mdp_in);
 }
 
 
@@ -1009,7 +1009,7 @@ void InterpreterMacroAssembler::update_mdp_by_constant(Register mdp_in,
                                                        int constant) {
   assert(ProfileInterpreter, "must be profiling interpreter");
   addptr(mdp_in, constant);
-  movptr(Address(rbp, frame::interpreter_frame_mdx_offset * wordSize), mdp_in);
+  movptr(Address(rbp, frame::interpreter_frame_mdp_offset * wordSize), mdp_in);
 }
 
 

hotspot/src/cpu/x86/vm/interp_masm_x86_64.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -58,11 +58,11 @@
 
   // Interpreter-specific registers
   void save_bcp() {
-    movptr(Address(rbp, frame::interpreter_frame_bcx_offset * wordSize), r13);
+    movptr(Address(rbp, frame::interpreter_frame_bcp_offset * wordSize), r13);
   }
 
   void restore_bcp() {
-    movptr(r13, Address(rbp, frame::interpreter_frame_bcx_offset * wordSize));
+    movptr(r13, Address(rbp, frame::interpreter_frame_bcp_offset * wordSize));
   }
 
   void restore_locals() {

hotspot/src/cpu/x86/vm/interpreter_x86_32.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -28,6 +28,7 @@
 #include "interpreter/interpreter.hpp"
 #include "interpreter/interpreterGenerator.hpp"
 #include "interpreter/interpreterRuntime.hpp"
+#include "interpreter/interp_masm.hpp"
 #include "interpreter/templateTable.hpp"
 #include "oops/arrayOop.hpp"
 #include "oops/methodData.hpp"

hotspot/src/cpu/x86/vm/interpreter_x86_64.cpp

@@ -28,6 +28,7 @@
 #include "interpreter/interpreter.hpp"
 #include "interpreter/interpreterGenerator.hpp"
 #include "interpreter/interpreterRuntime.hpp"
+#include "interpreter/interp_masm.hpp"
 #include "interpreter/templateTable.hpp"
 #include "oops/arrayOop.hpp"
 #include "oops/methodData.hpp"

hotspot/src/cpu/x86/vm/register_x86.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -26,7 +26,6 @@
 #define CPU_X86_VM_REGISTER_X86_HPP
 
 #include "asm/register.hpp"
-#include "vm_version_x86.hpp"
 
 class VMRegImpl;
 typedef VMRegImpl* VMReg;
@@ -59,7 +58,7 @@ class RegisterImpl: public AbstractRegisterImpl {
   // construction
   inline friend Register as_Register(int encoding);
 
-  VMReg as_VMReg();
+  inline VMReg as_VMReg();
 
   // accessors
   int   encoding() const                         { assert(is_valid(), "invalid register"); return (intptr_t)this; }
@@ -110,9 +109,10 @@ class FloatRegisterImpl: public AbstractRegisterImpl {
   // construction
   inline friend FloatRegister as_FloatRegister(int encoding);
 
-  VMReg as_VMReg();
+  inline VMReg as_VMReg();
 
   // derived registers, offsets, and addresses
+
   FloatRegister successor() const                          { return as_FloatRegister(encoding() + 1); }
 
   // accessors
@@ -152,7 +152,7 @@ class XMMRegisterImpl: public AbstractRegisterImpl {
   // construction
   friend XMMRegister as_XMMRegister(int encoding);
 
-  VMReg as_VMReg();
+  inline VMReg as_VMReg();
 
   // derived registers, offsets, and addresses
   XMMRegister successor() const                          { return as_XMMRegister(encoding() + 1); }

hotspot/src/cpu/x86/vm/templateInterpreter_x86_32.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -28,6 +28,7 @@
 #include "interpreter/interpreter.hpp"
 #include "interpreter/interpreterGenerator.hpp"
 #include "interpreter/interpreterRuntime.hpp"
+#include "interpreter/interp_masm.hpp"
 #include "interpreter/templateTable.hpp"
 #include "oops/arrayOop.hpp"
 #include "oops/methodData.hpp"
@@ -51,7 +52,7 @@
 
 #ifndef CC_INTERP
 const int method_offset = frame::interpreter_frame_method_offset * wordSize;
-const int bci_offset    = frame::interpreter_frame_bcx_offset    * wordSize;
+const int bcp_offset    = frame::interpreter_frame_bcp_offset    * wordSize;
 const int locals_offset = frame::interpreter_frame_locals_offset * wordSize;
 
 //------------------------------------------------------------------------------------------------------------------------

hotspot/src/cpu/x86/vm/templateInterpreter_x86_64.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -28,6 +28,7 @@
 #include "interpreter/interpreter.hpp"
 #include "interpreter/interpreterGenerator.hpp"
 #include "interpreter/interpreterRuntime.hpp"
+#include "interpreter/interp_masm.hpp"
 #include "interpreter/templateTable.hpp"
 #include "oops/arrayOop.hpp"
 #include "oops/methodData.hpp"
@@ -51,7 +52,7 @@
 #ifndef CC_INTERP
 
 const int method_offset = frame::interpreter_frame_method_offset * wordSize;
-const int bci_offset    = frame::interpreter_frame_bcx_offset    * wordSize;
+const int bcp_offset    = frame::interpreter_frame_bcp_offset    * wordSize;
 const int locals_offset = frame::interpreter_frame_locals_offset * wordSize;
 
 //-----------------------------------------------------------------------------

hotspot/src/cpu/x86/vm/templateTable_x86_32.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -26,6 +26,7 @@
 #include "asm/macroAssembler.hpp"
 #include "interpreter/interpreter.hpp"
 #include "interpreter/interpreterRuntime.hpp"
+#include "interpreter/interp_masm.hpp"
 #include "interpreter/templateTable.hpp"
 #include "memory/universe.inline.hpp"
 #include "oops/methodData.hpp"

hotspot/src/cpu/x86/vm/templateTable_x86_64.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -26,6 +26,7 @@
 #include "asm/macroAssembler.hpp"
 #include "interpreter/interpreter.hpp"
 #include "interpreter/interpreterRuntime.hpp"
+#include "interpreter/interp_masm.hpp"
 #include "interpreter/templateTable.hpp"
 #include "memory/universe.inline.hpp"
 #include "oops/methodData.hpp"

hotspot/src/cpu/x86/vm/vmreg_x86.hpp

@@ -25,13 +25,49 @@
 #ifndef CPU_X86_VM_VMREG_X86_HPP
 #define CPU_X86_VM_VMREG_X86_HPP
 
-  bool is_Register();
-  Register as_Register();
 
-  bool is_FloatRegister();
-  FloatRegister as_FloatRegister();
 
-  bool is_XMMRegister();
+inline bool is_Register() {
-  XMMRegister as_XMMRegister();
+  return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr;
+}
+
+inline bool is_FloatRegister() {
+  return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr;
+}
+
+inline bool is_XMMRegister() {
+  return value() >= ConcreteRegisterImpl::max_fpr && value() < ConcreteRegisterImpl::max_xmm;
+}
+
+inline Register as_Register() {
+
+  assert( is_Register(), "must be");
+  // Yuk
+#ifdef AMD64
+  return ::as_Register(value() >> 1);
+#else
+  return ::as_Register(value());
+#endif // AMD64
+}
+
+inline FloatRegister as_FloatRegister() {
+  assert( is_FloatRegister() && is_even(value()), "must be" );
+  // Yuk
+  return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1);
+}
+
+inline XMMRegister as_XMMRegister() {
+  assert( is_XMMRegister() && is_even(value()), "must be" );
+  // Yuk
+  return ::as_XMMRegister((value() - ConcreteRegisterImpl::max_fpr) >> 3);
+}
+
+inline   bool is_concrete() {
+  assert(is_reg(), "must be");
+#ifndef AMD64
+  if (is_Register()) return true;
+#endif // AMD64
+  return is_even(value());
+}
 
 #endif // CPU_X86_VM_VMREG_X86_HPP

hotspot/src/cpu/x86/vm/vmreg_x86.inline.hpp

@@ -42,48 +42,4 @@ inline VMReg XMMRegisterImpl::as_VMReg() {
   return VMRegImpl::as_VMReg((encoding() << 3) + ConcreteRegisterImpl::max_fpr);
 }
 
-
-inline bool VMRegImpl::is_Register() {
-  return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr;
-}
-
-inline bool VMRegImpl::is_FloatRegister() {
-  return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr;
-}
-
-inline bool VMRegImpl::is_XMMRegister() {
-  return value() >= ConcreteRegisterImpl::max_fpr && value() < ConcreteRegisterImpl::max_xmm;
-}
-
-inline Register VMRegImpl::as_Register() {
-
-  assert( is_Register(), "must be");
-  // Yuk
-#ifdef AMD64
-  return ::as_Register(value() >> 1);
-#else
-  return ::as_Register(value());
-#endif // AMD64
-}
-
-inline FloatRegister VMRegImpl::as_FloatRegister() {
-  assert( is_FloatRegister() && is_even(value()), "must be" );
-  // Yuk
-  return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1);
-}
-
-inline XMMRegister VMRegImpl::as_XMMRegister() {
-  assert( is_XMMRegister() && is_even(value()), "must be" );
-  // Yuk
-  return ::as_XMMRegister((value() - ConcreteRegisterImpl::max_fpr) >> 3);
-}
-
-inline   bool VMRegImpl::is_concrete() {
-  assert(is_reg(), "must be");
-#ifndef AMD64
-  if (is_Register()) return true;
-#endif // AMD64
-  return is_even(value());
-}
-
 #endif // CPU_X86_VM_VMREG_X86_INLINE_HPP

hotspot/src/cpu/x86/vm/x86.ad

@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2011, 2014, Oracle and/or its affiliates. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
 // This code is free software; you can redistribute it and/or modify it
@@ -487,6 +487,8 @@ source_hpp %{
 // To keep related declarations/definitions/uses close together,
 // we switch between source %{ }% and source_hpp %{ }% freely as needed.
 
+class NativeJump;
+
 class CallStubImpl {
  
   //--------------------------------------------------------------

hotspot/src/cpu/zero/vm/frame_zero.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * Copyright 2007, 2008, 2009, 2010, 2011 Red Hat, Inc.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -119,9 +119,6 @@ bool frame::safe_for_sender(JavaThread *thread) {
   return false;
 }
 
-void frame::pd_gc_epilog() {
-}
-
 bool frame::is_interpreted_frame_valid(JavaThread *thread) const {
   ShouldNotCallThis();
   return false;

hotspot/src/cpu/zero/vm/frame_zero.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * Copyright 2007, 2008, 2009, 2010 Red Hat, Inc.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -101,7 +101,7 @@ inline intptr_t** frame::interpreter_frame_locals_addr() const {
   return &(get_interpreterState()->_locals);
 }
 
-inline intptr_t* frame::interpreter_frame_bcx_addr() const {
+inline intptr_t* frame::interpreter_frame_bcp_addr() const {
   return (intptr_t*) &(get_interpreterState()->_bcp);
 }
 
@@ -113,7 +113,7 @@ inline Method** frame::interpreter_frame_method_addr() const {
   return &(get_interpreterState()->_method);
 }
 
-inline intptr_t* frame::interpreter_frame_mdx_addr() const {
+inline intptr_t* frame::interpreter_frame_mdp_addr() const {
   return (intptr_t*) &(get_interpreterState()->_mdx);
 }
 

hotspot/src/os/aix/vm/os_aix.cpp

@@ -66,6 +66,7 @@
 #include "runtime/thread.inline.hpp"
 #include "runtime/threadCritical.hpp"
 #include "runtime/timer.hpp"
+#include "runtime/vm_version.hpp"
 #include "services/attachListener.hpp"
 #include "services/runtimeService.hpp"
 #include "utilities/decoder.hpp"

hotspot/src/os/bsd/dtrace/generateJvmOffsets.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -202,11 +202,11 @@ int generateJvmOffsets(GEN_variant gen_variant) {
   GEN_VALUE(OFFSET_interpreter_frame_method, 2 * pointer_size);     /* L2 in saved window */
   GEN_VALUE(OFFSET_interpreter_frame_sender_sp, 13 * pointer_size); /* I5 in saved window */
   // Fake value for consistency. It is not going to be used.
-  GEN_VALUE(OFFSET_interpreter_frame_bcx_offset, 0xFFFF);
+  GEN_VALUE(OFFSET_interpreter_frame_bcp_offset, 0xFFFF);
 #elif defined(i386) || defined(__i386) || defined(__amd64)
   GEN_VALUE(OFFSET_interpreter_frame_sender_sp, -1 * pointer_size);
   GEN_VALUE(OFFSET_interpreter_frame_method, -3 * pointer_size);
-  GEN_VALUE(OFFSET_interpreter_frame_bcx_offset, -7 * pointer_size);
+  GEN_VALUE(OFFSET_interpreter_frame_bcp_offset, -7 * pointer_size);
 #endif
 
   GEN_OFFS(Klass, _name);

hotspot/src/os/bsd/dtrace/libjvm_db.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -164,7 +164,7 @@ struct jvm_agent {
   int32_t  SIZE_CodeCache_log2_segment;
 
   uint64_t methodPtr;
-  uint64_t bcx;
+  uint64_t bcp;
 
   Nmethod_t *N;                 /*Inlined methods support */
   Frame_t   prev_fr;
@@ -1068,19 +1068,9 @@ name_for_nmethod(jvm_agent_t* J,
   return err;
 }
 
-int is_bci(intptr_t bcx) {
-  switch (DATA_MODEL) {
-  case PR_MODEL_LP64:
-    return ((uintptr_t) bcx) <= ((uintptr_t) MAX_METHOD_CODE_SIZE) ;
-  case PR_MODEL_ILP32:
-  default:
-    return 0 <= bcx && bcx <= MAX_METHOD_CODE_SIZE;
-  }
-}
-
 static int
 name_for_imethod(jvm_agent_t* J,
-                 uint64_t bcx,
+                 uint64_t bcp,
                  uint64_t method,
                  char *result,
                  size_t size,
@@ -1095,7 +1085,7 @@ name_for_imethod(jvm_agent_t* J,
   err = read_pointer(J, method + OFFSET_Method_constMethod, &constMethod);
   CHECK_FAIL(err);
 
-  bci = is_bci(bcx) ? bcx : bcx - (constMethod + (uint64_t) SIZE_ConstMethod);
+  bci = bcp - (constMethod + (uint64_t) SIZE_ConstMethod);
 
   if (debug)
       fprintf(stderr, "\t name_for_imethod: BEGIN: method: %#llx\n", method);
@@ -1169,7 +1159,7 @@ name_for_codecache(jvm_agent_t* J, uint64_t fp, uint64_t pc, char * result,
     if (err == PS_OK && strncmp(name, "Interpreter", 11) == 0) {
       *is_interpreted = 1;
       if (is_method(J, J->methodPtr)) {
-        return name_for_imethod(J, J->bcx, J->methodPtr, result, size, jframe);
+        return name_for_imethod(J, J->bcp, J->methodPtr, result, size, jframe);
       }
     }
 
@@ -1326,7 +1316,7 @@ int Jlookup_by_regs(jvm_agent_t* J, const prgregset_t regs, char *name,
   /* arguments given to read_pointer need to be worst case sized */
   uint64_t methodPtr = 0;
   uint64_t sender_sp;
-  uint64_t bcx = 0;
+  uint64_t bcp = 0;
   int is_interpreted = 0;
   int result = PS_OK;
   int err = PS_OK;
@@ -1357,7 +1347,7 @@ int Jlookup_by_regs(jvm_agent_t* J, const prgregset_t regs, char *name,
      * regs[R_PC] contains a CALL instruction pc offset.
      */
     pc += 8;
-    bcx          = (uintptr_t) regs[R_L1];
+    bcp          = (uintptr_t) regs[R_L1];
     methodPtr = (uintptr_t) regs[R_L2];
     sender_sp = regs[R_I5];
     if (debug > 2) {
@@ -1385,13 +1375,13 @@ int Jlookup_by_regs(jvm_agent_t* J, const prgregset_t regs, char *name,
     if (read_pointer(J,  fp + OFFSET_interpreter_frame_sender_sp, &sender_sp) != PS_OK) {
       sender_sp = 0;
     }
-    if (read_pointer(J,  fp + OFFSET_interpreter_frame_bcx_offset, &bcx) != PS_OK) {
+    if (read_pointer(J,  fp + OFFSET_interpreter_frame_bcp_offset, &bcp) != PS_OK) {
-      bcx = 0;
+      bcp = 0;
     }
 #endif /* i386 */
 
   J->methodPtr = methodPtr;
-  J->bcx = bcx;
+  J->bcp = bcp;
 
   /* On x86 with C2 JVM: native frame may have wrong regs[R_FP]
    * For example: JVM_SuspendThread frame poins to the top interpreted frame.
@@ -1402,7 +1392,7 @@ int Jlookup_by_regs(jvm_agent_t* J, const prgregset_t regs, char *name,
    */
 #ifndef X86_COMPILER2
   if (is_method(J, J->methodPtr)) {
-    result = name_for_imethod(J, bcx, J->methodPtr, name, size, jframe);
+    result = name_for_imethod(J, bcp, J->methodPtr, name, size, jframe);
     /* If the methodPtr is a method then this is highly likely to be
        an interpreter frame */
     if (result >= 0) {
@@ -1416,7 +1406,7 @@ int Jlookup_by_regs(jvm_agent_t* J, const prgregset_t regs, char *name,
   }
 #ifdef X86_COMPILER2
   else if (is_method(J, J->methodPtr)) {
-    result = name_for_imethod(J, bcx, J->methodPtr, name, size, jframe);
+    result = name_for_imethod(J, bcp, J->methodPtr, name, size, jframe);
     /* If the methodPtr is a method then this is highly likely to be
        an interpreter frame */
     if (result >= 0) {

hotspot/src/os/solaris/dtrace/generateJvmOffsets.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -197,11 +197,11 @@ int generateJvmOffsets(GEN_variant gen_variant) {
   GEN_VALUE(OFFSET_interpreter_frame_method, 2 * pointer_size);     /* L2 in saved window */
   GEN_VALUE(OFFSET_interpreter_frame_sender_sp, 13 * pointer_size); /* I5 in saved window */
   // Fake value for consistency. It is not going to be used.
-  GEN_VALUE(OFFSET_interpreter_frame_bcx_offset, 0xFFFF);
+  GEN_VALUE(OFFSET_interpreter_frame_bcp_offset, 0xFFFF);
 #elif defined(i386) || defined(__i386) || defined(__amd64)
   GEN_VALUE(OFFSET_interpreter_frame_sender_sp, -1 * pointer_size);
   GEN_VALUE(OFFSET_interpreter_frame_method, -3 * pointer_size);
-  GEN_VALUE(OFFSET_interpreter_frame_bcx_offset, -7 * pointer_size);
+  GEN_VALUE(OFFSET_interpreter_frame_bcp_offset, -7 * pointer_size);
 #endif
 
   GEN_OFFS(Klass, _name);

hotspot/src/os/solaris/dtrace/libjvm_db.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -164,7 +164,7 @@ struct jvm_agent {
   int32_t  SIZE_CodeCache_log2_segment;
 
   uint64_t methodPtr;
-  uint64_t bcx;
+  uint64_t bcp;
 
   Nmethod_t *N;                 /*Inlined methods support */
   Frame_t   prev_fr;
@@ -1068,19 +1068,9 @@ name_for_nmethod(jvm_agent_t* J,
   return err;
 }
 
-int is_bci(intptr_t bcx) {
-  switch (DATA_MODEL) {
-  case PR_MODEL_LP64:
-    return ((uintptr_t) bcx) <= ((uintptr_t) MAX_METHOD_CODE_SIZE) ;
-  case PR_MODEL_ILP32:
-  default:
-    return 0 <= bcx && bcx <= MAX_METHOD_CODE_SIZE;
-  }
-}
-
 static int
 name_for_imethod(jvm_agent_t* J,
-                 uint64_t bcx,
+                 uint64_t bcp,
                  uint64_t method,
                  char *result,
                  size_t size,
@@ -1095,7 +1085,7 @@ name_for_imethod(jvm_agent_t* J,
   err = read_pointer(J, method + OFFSET_Method_constMethod, &constMethod);
   CHECK_FAIL(err);
 
-  bci = is_bci(bcx) ? bcx : bcx - (constMethod + (uint64_t) SIZE_ConstMethod);
+  bci = bcp - (constMethod + (uint64_t) SIZE_ConstMethod);
 
   if (debug)
       fprintf(stderr, "\t name_for_imethod: BEGIN: method: %#llx\n", method);
@@ -1169,7 +1159,7 @@ name_for_codecache(jvm_agent_t* J, uint64_t fp, uint64_t pc, char * result,
     if (err == PS_OK && strncmp(name, "Interpreter", 11) == 0) {
       *is_interpreted = 1;
       if (is_method(J, J->methodPtr)) {
-        return name_for_imethod(J, J->bcx, J->methodPtr, result, size, jframe);
+        return name_for_imethod(J, J->bcp, J->methodPtr, result, size, jframe);
       }
     }
 
@@ -1326,7 +1316,7 @@ int Jlookup_by_regs(jvm_agent_t* J, const prgregset_t regs, char *name,
   /* arguments given to read_pointer need to be worst case sized */
   uint64_t methodPtr = 0;
   uint64_t sender_sp;
-  uint64_t bcx = 0;
+  uint64_t bcp = 0;
   int is_interpreted = 0;
   int result = PS_OK;
   int err = PS_OK;
@@ -1357,7 +1347,7 @@ int Jlookup_by_regs(jvm_agent_t* J, const prgregset_t regs, char *name,
      * regs[R_PC] contains a CALL instruction pc offset.
      */
     pc += 8;
-    bcx          = (uintptr_t) regs[R_L1];
+    bcp          = (uintptr_t) regs[R_L1];
     methodPtr = (uintptr_t) regs[R_L2];
     sender_sp = regs[R_I5];
     if (debug > 2) {
@@ -1385,13 +1375,13 @@ int Jlookup_by_regs(jvm_agent_t* J, const prgregset_t regs, char *name,
     if (read_pointer(J,  fp + OFFSET_interpreter_frame_sender_sp, &sender_sp) != PS_OK) {
       sender_sp = 0;
     }
-    if (read_pointer(J,  fp + OFFSET_interpreter_frame_bcx_offset, &bcx) != PS_OK) {
+    if (read_pointer(J,  fp + OFFSET_interpreter_frame_bcp_offset, &bcp) != PS_OK) {
-      bcx = 0;
+      bcp = 0;
     }
 #endif /* i386 */
 
   J->methodPtr = methodPtr;
-  J->bcx = bcx;
+  J->bcp = bcp;
 
   /* On x86 with C2 JVM: native frame may have wrong regs[R_FP]
    * For example: JVM_SuspendThread frame poins to the top interpreted frame.
@@ -1402,7 +1392,7 @@ int Jlookup_by_regs(jvm_agent_t* J, const prgregset_t regs, char *name,
    */
 #ifndef X86_COMPILER2
   if (is_method(J, J->methodPtr)) {
-    result = name_for_imethod(J, bcx, J->methodPtr, name, size, jframe);
+    result = name_for_imethod(J, bcp, J->methodPtr, name, size, jframe);
     /* If the methodPtr is a method then this is highly likely to be
        an interpreter frame */
     if (result >= 0) {
@@ -1416,7 +1406,7 @@ int Jlookup_by_regs(jvm_agent_t* J, const prgregset_t regs, char *name,
   }
 #ifdef X86_COMPILER2
   else if (is_method(J, J->methodPtr)) {
-    result = name_for_imethod(J, bcx, J->methodPtr, name, size, jframe);
+    result = name_for_imethod(J, bcp, J->methodPtr, name, size, jframe);
     /* If the methodPtr is a method then this is highly likely to be
        an interpreter frame */
     if (result >= 0) {

hotspot/src/os/solaris/vm/os_solaris.cpp

@@ -59,6 +59,7 @@
 #include "runtime/thread.inline.hpp"
 #include "runtime/threadCritical.hpp"
 #include "runtime/timer.hpp"
+#include "runtime/vm_version.hpp"
 #include "services/attachListener.hpp"
 #include "services/memTracker.hpp"
 #include "services/runtimeService.hpp"

hotspot/src/os/windows/vm/os_windows.cpp

@@ -62,6 +62,7 @@
 #include "runtime/thread.inline.hpp"
 #include "runtime/threadCritical.hpp"
 #include "runtime/timer.hpp"
+#include "runtime/vm_version.hpp"
 #include "services/attachListener.hpp"
 #include "services/memTracker.hpp"
 #include "services/runtimeService.hpp"

hotspot/src/os_cpu/aix_ppc/vm/atomic_aix_ppc.inline.hpp

@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2014, SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -28,7 +28,6 @@
 
 #include "runtime/atomic.hpp"
 #include "runtime/os.hpp"
-#include "vm_version_ppc.hpp"
 
 #ifndef _LP64
 #error "Atomic currently only impleneted for PPC64"

hotspot/src/os_cpu/aix_ppc/vm/orderAccess_aix_ppc.inline.hpp

@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2014, SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -27,7 +27,6 @@
 #define OS_CPU_AIX_OJDKPPC_VM_ORDERACCESS_AIX_PPC_INLINE_HPP
 
 #include "runtime/orderAccess.hpp"
-#include "vm_version_ppc.hpp"
 
 // Implementation of class OrderAccess.
 

hotspot/src/os_cpu/bsd_x86/vm/atomic_bsd_x86.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -27,7 +27,6 @@
 
 #include "runtime/atomic.hpp"
 #include "runtime/os.hpp"
-#include "vm_version_x86.hpp"
 
 // Implementation of class atomic
 

hotspot/src/os_cpu/bsd_x86/vm/orderAccess_bsd_x86.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -28,7 +28,6 @@
 #include "runtime/atomic.inline.hpp"
 #include "runtime/orderAccess.hpp"
 #include "runtime/os.hpp"
-#include "vm_version_x86.hpp"
 
 // Implementation of class OrderAccess.
 

hotspot/src/os_cpu/bsd_zero/vm/atomic_bsd_zero.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * Copyright 2007, 2008, 2011 Red Hat, Inc.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -28,7 +28,6 @@
 
 #include "runtime/atomic.hpp"
 #include "runtime/os.hpp"
-#include "vm_version_zero.hpp"
 
 // Implementation of class atomic
 

hotspot/src/os_cpu/bsd_zero/vm/orderAccess_bsd_zero.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * Copyright 2007, 2008, 2009 Red Hat, Inc.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -27,7 +27,6 @@
 #define OS_CPU_BSD_ZERO_VM_ORDERACCESS_BSD_ZERO_INLINE_HPP
 
 #include "runtime/orderAccess.hpp"
-#include "vm_version_zero.hpp"
 
 #ifdef ARM
 

hotspot/src/os_cpu/linux_ppc/vm/atomic_linux_ppc.inline.hpp

@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2014, SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -28,7 +28,6 @@
 
 #include "runtime/atomic.hpp"
 #include "runtime/os.hpp"
-#include "vm_version_ppc.hpp"
 
 #ifndef PPC64
 #error "Atomic currently only implemented for PPC64"

hotspot/src/os_cpu/linux_ppc/vm/orderAccess_linux_ppc.inline.hpp

@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2014, SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -27,7 +27,6 @@
 #define OS_CPU_LINUX_PPC_VM_ORDERACCESS_LINUX_PPC_INLINE_HPP
 
 #include "runtime/orderAccess.hpp"
-#include "vm_version_ppc.hpp"
 
 #ifndef PPC64
 #error "OrderAccess currently only implemented for PPC64"

hotspot/src/os_cpu/linux_sparc/vm/atomic_linux_sparc.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -27,7 +27,6 @@
 
 #include "runtime/atomic.hpp"
 #include "runtime/os.hpp"
-#include "vm_version_sparc.hpp"
 
 // Implementation of class atomic
 

hotspot/src/os_cpu/linux_sparc/vm/orderAccess_linux_sparc.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -26,7 +26,6 @@
 #define OS_CPU_LINUX_SPARC_VM_ORDERACCESS_LINUX_SPARC_INLINE_HPP
 
 #include "runtime/orderAccess.hpp"
-#include "vm_version_sparc.hpp"
 
 // Implementation of class OrderAccess.
 

hotspot/src/os_cpu/linux_sparc/vm/os_linux_sparc.cpp

@@ -142,12 +142,10 @@ frame os::fetch_frame_from_context(void* ucVoid) {
 }
 
 frame os::get_sender_for_C_frame(frame* fr) {
-  return frame(fr->sender_sp(), fr->link(), fr->sender_pc());
+  return frame(fr->sender_sp(), frame::unpatchable, fr->sender_pc());
 }
 
 frame os::current_frame() {
-  fprintf(stderr, "current_frame()");
-
   intptr_t* sp = StubRoutines::Sparc::flush_callers_register_windows_func()();
   frame myframe(sp, frame::unpatchable,
                 CAST_FROM_FN_PTR(address, os::current_frame));

hotspot/src/os_cpu/linux_x86/vm/atomic_linux_x86.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -27,7 +27,6 @@
 
 #include "runtime/atomic.hpp"
 #include "runtime/os.hpp"
-#include "vm_version_x86.hpp"
 
 // Implementation of class atomic
 

hotspot/src/os_cpu/linux_x86/vm/orderAccess_linux_x86.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -28,7 +28,6 @@
 #include "runtime/atomic.inline.hpp"
 #include "runtime/orderAccess.hpp"
 #include "runtime/os.hpp"
-#include "vm_version_x86.hpp"
 
 // Implementation of class OrderAccess.
 

hotspot/src/os_cpu/linux_zero/vm/atomic_linux_zero.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * Copyright 2007, 2008, 2011 Red Hat, Inc.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -28,7 +28,6 @@
 
 #include "runtime/atomic.hpp"
 #include "runtime/os.hpp"
-#include "vm_version_zero.hpp"
 
 // Implementation of class atomic
 

hotspot/src/os_cpu/linux_zero/vm/orderAccess_linux_zero.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * Copyright 2007, 2008, 2009 Red Hat, Inc.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -27,7 +27,6 @@
 #define OS_CPU_LINUX_ZERO_VM_ORDERACCESS_LINUX_ZERO_INLINE_HPP
 
 #include "runtime/orderAccess.hpp"
-#include "vm_version_zero.hpp"
 
 #ifdef ARM
 

hotspot/src/os_cpu/solaris_sparc/vm/atomic_solaris_sparc.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -27,7 +27,6 @@
 
 #include "runtime/atomic.hpp"
 #include "runtime/os.hpp"
-#include "vm_version_sparc.hpp"
 
 // Implementation of class atomic
 

hotspot/src/os_cpu/solaris_sparc/vm/orderAccess_solaris_sparc.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -27,7 +27,6 @@
 
 #include "runtime/atomic.inline.hpp"
 #include "runtime/orderAccess.hpp"
-#include "vm_version_sparc.hpp"
 
 // Implementation of class OrderAccess.
 

hotspot/src/os_cpu/solaris_sparc/vm/os_solaris_sparc.cpp

@@ -27,6 +27,7 @@
 #include "classfile/classLoader.hpp"
 #include "classfile/systemDictionary.hpp"
 #include "classfile/vmSymbols.hpp"
+#include "code/codeCache.hpp"
 #include "code/icBuffer.hpp"
 #include "code/vtableStubs.hpp"
 #include "interpreter/interpreter.hpp"

hotspot/src/os_cpu/solaris_x86/vm/atomic_solaris_x86.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -27,7 +27,6 @@
 
 #include "runtime/atomic.hpp"
 #include "runtime/os.hpp"
-#include "vm_version_x86.hpp"
 
 inline void Atomic::store    (jbyte    store_value, jbyte*    dest) { *dest = store_value; }
 inline void Atomic::store    (jshort   store_value, jshort*   dest) { *dest = store_value; }

hotspot/src/os_cpu/solaris_x86/vm/orderAccess_solaris_x86.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -28,7 +28,6 @@
 #include "runtime/atomic.inline.hpp"
 #include "runtime/orderAccess.hpp"
 #include "runtime/os.hpp"
-#include "vm_version_x86.hpp"
 
 // Implementation of class OrderAccess.
 

hotspot/src/os_cpu/windows_x86/vm/atomic_windows_x86.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -27,7 +27,6 @@
 
 #include "runtime/atomic.hpp"
 #include "runtime/os.hpp"
-#include "vm_version_x86.hpp"
 
 // The following alternative implementations are needed because
 // Windows 95 doesn't support (some of) the corresponding Windows NT

hotspot/src/os_cpu/windows_x86/vm/orderAccess_windows_x86.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -28,7 +28,6 @@
 #include "runtime/atomic.inline.hpp"
 #include "runtime/orderAccess.hpp"
 #include "runtime/os.hpp"
-#include "vm_version_x86.hpp"
 
 // Implementation of class OrderAccess.
 

hotspot/src/share/vm/adlc/main.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -213,7 +213,8 @@ int main(int argc, char *argv[])
   AD.addInclude(AD._CPP_file, "memory/allocation.inline.hpp");
   AD.addInclude(AD._CPP_file, "asm/macroAssembler.inline.hpp");
   AD.addInclude(AD._CPP_file, "code/compiledIC.hpp");
-  AD.addInclude(AD._CPP_file, "code/vmreg.hpp");
+  AD.addInclude(AD._CPP_file, "code/nativeInst.hpp");
+  AD.addInclude(AD._CPP_file, "code/vmreg.inline.hpp");
   AD.addInclude(AD._CPP_file, "gc_interface/collectedHeap.inline.hpp");
   AD.addInclude(AD._CPP_file, "oops/compiledICHolder.hpp");
   AD.addInclude(AD._CPP_file, "oops/markOop.hpp");
@@ -230,23 +231,8 @@ int main(int argc, char *argv[])
   AD.addInclude(AD._CPP_file, "runtime/sharedRuntime.hpp");
   AD.addInclude(AD._CPP_file, "runtime/stubRoutines.hpp");
   AD.addInclude(AD._CPP_file, "utilities/growableArray.hpp");
-#ifdef TARGET_ARCH_x86
-  AD.addInclude(AD._CPP_file, "nativeInst_x86.hpp");
-  AD.addInclude(AD._CPP_file, "vmreg_x86.inline.hpp");
-#endif
-#ifdef TARGET_ARCH_sparc
-  AD.addInclude(AD._CPP_file, "nativeInst_sparc.hpp");
-  AD.addInclude(AD._CPP_file, "vmreg_sparc.inline.hpp");
-#endif
-#ifdef TARGET_ARCH_arm
-  AD.addInclude(AD._CPP_file, "nativeInst_arm.hpp");
-  AD.addInclude(AD._CPP_file, "vmreg_arm.inline.hpp");
-#endif
-#ifdef TARGET_ARCH_ppc
-  AD.addInclude(AD._CPP_file, "nativeInst_ppc.hpp");
-  AD.addInclude(AD._CPP_file, "vmreg_ppc.inline.hpp");
-#endif
   AD.addInclude(AD._HPP_file, "memory/allocation.hpp");
+  AD.addInclude(AD._HPP_file, "code/nativeInst.hpp");
   AD.addInclude(AD._HPP_file, "opto/machnode.hpp");
   AD.addInclude(AD._HPP_file, "opto/node.hpp");
   AD.addInclude(AD._HPP_file, "opto/regalloc.hpp");

hotspot/src/share/vm/asm/assembler.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -26,34 +26,15 @@
 #define SHARE_VM_ASM_ASSEMBLER_HPP
 
 #include "asm/codeBuffer.hpp"
+#include "asm/register.hpp"
 #include "code/oopRecorder.hpp"
 #include "code/relocInfo.hpp"
 #include "memory/allocation.hpp"
+#include "runtime/vm_version.hpp"
 #include "utilities/debug.hpp"
 #include "utilities/growableArray.hpp"
 #include "utilities/top.hpp"
 
-#ifdef TARGET_ARCH_x86
-# include "register_x86.hpp"
-# include "vm_version_x86.hpp"
-#endif
-#ifdef TARGET_ARCH_sparc
-# include "register_sparc.hpp"
-# include "vm_version_sparc.hpp"
-#endif
-#ifdef TARGET_ARCH_zero
-# include "register_zero.hpp"
-# include "vm_version_zero.hpp"
-#endif
-#ifdef TARGET_ARCH_arm
-# include "register_arm.hpp"
-# include "vm_version_arm.hpp"
-#endif
-#ifdef TARGET_ARCH_ppc
-# include "register_ppc.hpp"
-# include "vm_version_ppc.hpp"
-#endif
-
 // This file contains platform-independent assembler declarations.
 
 class MacroAssembler;

hotspot/src/share/vm/asm/codeBuffer.cpp

@@ -28,6 +28,7 @@
 #include "memory/gcLocker.hpp"
 #include "oops/methodData.hpp"
 #include "oops/oop.inline.hpp"
+#include "runtime/icache.hpp"
 #include "utilities/copy.hpp"
 #include "utilities/xmlstream.hpp"
 

hotspot/src/share/vm/c1/c1_CodeStubs.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -30,6 +30,7 @@
 #include "c1/c1_Instruction.hpp"
 #include "c1/c1_LIR.hpp"
 #include "c1/c1_Runtime1.hpp"
+#include "code/nativeInst.hpp"
 #include "utilities/array.hpp"
 #include "utilities/macros.hpp"
 

hotspot/src/share/vm/c1/c1_Defs.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000, 2011, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -26,21 +26,7 @@
 #define SHARE_VM_C1_C1_DEFS_HPP
 
 #include "utilities/globalDefinitions.hpp"
-#ifdef TARGET_ARCH_x86
+#include "asm/register.hpp"
-# include "register_x86.hpp"
-#endif
-#ifdef TARGET_ARCH_sparc
-# include "register_sparc.hpp"
-#endif
-#ifdef TARGET_ARCH_zero
-# include "register_zero.hpp"
-#endif
-#ifdef TARGET_ARCH_arm
-# include "register_arm.hpp"
-#endif
-#ifdef TARGET_ARCH_ppc
-# include "register_ppc.hpp"
-#endif
 
 // set frame size and return address offset to these values in blobs
 // (if the compiled frame uses ebp as link pointer on IA; otherwise,

hotspot/src/share/vm/c1/c1_FrameMap.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -25,24 +25,8 @@
 #include "precompiled.hpp"
 #include "c1/c1_FrameMap.hpp"
 #include "c1/c1_LIR.hpp"
+#include "code/vmreg.inline.hpp"
 #include "runtime/sharedRuntime.hpp"
-#ifdef TARGET_ARCH_x86
-# include "vmreg_x86.inline.hpp"
-#endif
-#ifdef TARGET_ARCH_sparc
-# include "vmreg_sparc.inline.hpp"
-#endif
-#ifdef TARGET_ARCH_zero
-# include "vmreg_zero.inline.hpp"
-#endif
-#ifdef TARGET_ARCH_arm
-# include "vmreg_arm.inline.hpp"
-#endif
-#ifdef TARGET_ARCH_ppc
-# include "vmreg_ppc.inline.hpp"
-#endif
-
-
 
 //-----------------------------------------------------
 

hotspot/src/share/vm/c1/c1_GraphBuilder.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -36,6 +36,7 @@
 #include "interpreter/bytecode.hpp"
 #include "runtime/sharedRuntime.hpp"
 #include "runtime/compilationPolicy.hpp"
+#include "runtime/vm_version.hpp"
 #include "utilities/bitMap.inline.hpp"
 
 class BlockListBuilder VALUE_OBJ_CLASS_SPEC {

hotspot/src/share/vm/c1/c1_LIRAssembler.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -30,27 +30,6 @@
 #include "c1/c1_MacroAssembler.hpp"
 #include "c1/c1_ValueStack.hpp"
 #include "ci/ciInstance.hpp"
-#ifdef TARGET_ARCH_x86
-# include "nativeInst_x86.hpp"
-# include "vmreg_x86.inline.hpp"
-#endif
-#ifdef TARGET_ARCH_sparc
-# include "nativeInst_sparc.hpp"
-# include "vmreg_sparc.inline.hpp"
-#endif
-#ifdef TARGET_ARCH_zero
-# include "nativeInst_zero.hpp"
-# include "vmreg_zero.inline.hpp"
-#endif
-#ifdef TARGET_ARCH_arm
-# include "nativeInst_arm.hpp"
-# include "vmreg_arm.inline.hpp"
-#endif
-#ifdef TARGET_ARCH_ppc
-# include "nativeInst_ppc.hpp"
-# include "vmreg_ppc.inline.hpp"
-#endif
-
 
 void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
   // we must have enough patching space so that call can be inserted

hotspot/src/share/vm/c1/c1_LIRGenerator.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2005, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2005, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -34,6 +34,7 @@
 #include "ci/ciObjArray.hpp"
 #include "runtime/sharedRuntime.hpp"
 #include "runtime/stubRoutines.hpp"
+#include "runtime/vm_version.hpp"
 #include "utilities/bitMap.inline.hpp"
 #include "utilities/macros.hpp"
 #if INCLUDE_ALL_GCS

hotspot/src/share/vm/c1/c1_LinearScan.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2005, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2005, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -31,23 +31,8 @@
 #include "c1/c1_LIRGenerator.hpp"
 #include "c1/c1_LinearScan.hpp"
 #include "c1/c1_ValueStack.hpp"
+#include "code/vmreg.inline.hpp"
 #include "utilities/bitMap.inline.hpp"
-#ifdef TARGET_ARCH_x86
-# include "vmreg_x86.inline.hpp"
-#endif
-#ifdef TARGET_ARCH_sparc
-# include "vmreg_sparc.inline.hpp"
-#endif
-#ifdef TARGET_ARCH_zero
-# include "vmreg_zero.inline.hpp"
-#endif
-#ifdef TARGET_ARCH_arm
-# include "vmreg_arm.inline.hpp"
-#endif
-#ifdef TARGET_ARCH_ppc
-# include "vmreg_ppc.inline.hpp"
-#endif
-
 
 #ifndef PRODUCT
 

hotspot/src/share/vm/c1/c1_Runtime1.cpp

@@ -56,6 +56,7 @@
 #include "runtime/threadCritical.hpp"
 #include "runtime/vframe.hpp"
 #include "runtime/vframeArray.hpp"
+#include "runtime/vm_version.hpp"
 #include "utilities/copy.hpp"
 #include "utilities/events.hpp"
 

hotspot/src/share/vm/classfile/bytecodeAssembler.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2012, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -28,22 +28,7 @@
 #include "interpreter/bytecodes.hpp"
 #include "memory/oopFactory.hpp"
 #include "oops/constantPool.hpp"
-
+#include "utilities/bytes.hpp"
-#ifdef TARGET_ARCH_x86
-# include "bytes_x86.hpp"
-#endif
-#ifdef TARGET_ARCH_sparc
-# include "bytes_sparc.hpp"
-#endif
-#ifdef TARGET_ARCH_zero
-# include "bytes_zero.hpp"
-#endif
-#ifdef TARGET_ARCH_arm
-# include "bytes_arm.hpp"
-#endif
-#ifdef TARGET_ARCH_ppc
-# include "bytes_ppc.hpp"
-#endif
 
 u2 BytecodeConstantPool::find_or_add(BytecodeCPEntry const& bcpe) {
   u2 index;

hotspot/src/share/vm/classfile/classFileStream.hpp

@@ -25,22 +25,8 @@
 #ifndef SHARE_VM_CLASSFILE_CLASSFILESTREAM_HPP
 #define SHARE_VM_CLASSFILE_CLASSFILESTREAM_HPP
 
+#include "utilities/bytes.hpp"
 #include "utilities/top.hpp"
-#ifdef TARGET_ARCH_x86
-# include "bytes_x86.hpp"
-#endif
-#ifdef TARGET_ARCH_sparc
-# include "bytes_sparc.hpp"
-#endif
-#ifdef TARGET_ARCH_zero
-# include "bytes_zero.hpp"
-#endif
-#ifdef TARGET_ARCH_arm
-# include "bytes_arm.hpp"
-#endif
-#ifdef TARGET_ARCH_ppc
-# include "bytes_ppc.hpp"
-#endif
 
 // Input stream for reading .class file
 //

hotspot/src/share/vm/classfile/javaClasses.cpp

@@ -1639,9 +1639,9 @@ void java_lang_Throwable::fill_in_stack_trace(Handle throwable, methodHandle met
       if (fr.is_first_frame()) break;
       address pc = fr.pc();
       if (fr.is_interpreted_frame()) {
-        intptr_t bcx = fr.interpreter_frame_bcx();
+        address bcp = fr.interpreter_frame_bcp();
         method = fr.interpreter_frame_method();
-        bci =  fr.is_bci(bcx) ? bcx : method->bci_from((address)bcx);
+        bci =  method->bci_from(bcp);
         fr = fr.sender(&map);
       } else {
         CodeBlob* cb = fr.cb();

hotspot/src/share/vm/classfile/stackMapTable.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -30,22 +30,8 @@
 #include "memory/allocation.hpp"
 #include "oops/constantPool.hpp"
 #include "oops/method.hpp"
+#include "utilities/bytes.hpp"
 #include "utilities/globalDefinitions.hpp"
-#ifdef TARGET_ARCH_x86
-# include "bytes_x86.hpp"
-#endif
-#ifdef TARGET_ARCH_sparc
-# include "bytes_sparc.hpp"
-#endif
-#ifdef TARGET_ARCH_zero
-# include "bytes_zero.hpp"
-#endif
-#ifdef TARGET_ARCH_arm
-# include "bytes_arm.hpp"
-#endif
-#ifdef TARGET_ARCH_ppc
-# include "bytes_ppc.hpp"
-#endif
 
 class StackMapReader;
 

hotspot/src/share/vm/classfile/verifier.cpp

@@ -45,21 +45,7 @@
 #include "runtime/javaCalls.hpp"
 #include "runtime/orderAccess.inline.hpp"
 #include "runtime/os.hpp"
-#ifdef TARGET_ARCH_x86
+#include "utilities/bytes.hpp"
-# include "bytes_x86.hpp"
-#endif
-#ifdef TARGET_ARCH_sparc
-# include "bytes_sparc.hpp"
-#endif
-#ifdef TARGET_ARCH_zero
-# include "bytes_zero.hpp"
-#endif
-#ifdef TARGET_ARCH_arm
-# include "bytes_arm.hpp"
-#endif
-#ifdef TARGET_ARCH_ppc
-# include "bytes_ppc.hpp"
-#endif
 
 #define NOFAILOVER_MAJOR_VERSION                       51
 #define NONZERO_PADDING_BYTES_IN_SWITCH_MAJOR_VERSION  51
@@ -439,7 +425,7 @@ void ErrorContext::location_details(outputStream* ss, const Method* method) cons
   if (_bci != -1 && method != NULL) {
     streamIndentor si(ss);
     const char* bytecode_name = "<invalid>";
-    if (method->validate_bci_from_bcx(_bci) != -1) {
+    if (method->validate_bci(_bci) != -1) {
       Bytecodes::Code code = Bytecodes::code_or_bp_at(method->bcp_from(_bci));
       if (Bytecodes::is_defined(code)) {
           bytecode_name = Bytecodes::name(code);

hotspot/src/share/vm/code/codeBlob.cpp

@@ -39,21 +39,6 @@
 #include "runtime/sharedRuntime.hpp"
 #include "runtime/vframe.hpp"
 #include "services/memoryService.hpp"
-#ifdef TARGET_ARCH_x86
-# include "nativeInst_x86.hpp"
-#endif
-#ifdef TARGET_ARCH_sparc
-# include "nativeInst_sparc.hpp"
-#endif
-#ifdef TARGET_ARCH_zero
-# include "nativeInst_zero.hpp"
-#endif
-#ifdef TARGET_ARCH_arm
-# include "nativeInst_arm.hpp"
-#endif
-#ifdef TARGET_ARCH_ppc
-# include "nativeInst_ppc.hpp"
-#endif
 #ifdef COMPILER1
 #include "c1/c1_Runtime1.hpp"
 #endif

hotspot/src/share/vm/code/compiledIC.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -25,23 +25,9 @@
 #ifndef SHARE_VM_CODE_COMPILEDIC_HPP
 #define SHARE_VM_CODE_COMPILEDIC_HPP
 
+#include "code/nativeInst.hpp"
 #include "interpreter/linkResolver.hpp"
 #include "oops/compiledICHolder.hpp"
-#ifdef TARGET_ARCH_x86
-# include "nativeInst_x86.hpp"
-#endif
-#ifdef TARGET_ARCH_sparc
-# include "nativeInst_sparc.hpp"
-#endif
-#ifdef TARGET_ARCH_zero
-# include "nativeInst_zero.hpp"
-#endif
-#ifdef TARGET_ARCH_arm
-# include "nativeInst_arm.hpp"
-#endif
-#ifdef TARGET_ARCH_ppc
-# include "nativeInst_ppc.hpp"
-#endif
 
 //-----------------------------------------------------------------------------
 // The CompiledIC represents a compiled inline cache.

hotspot/src/share/vm/code/nativeInst.hpp

@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ *
+ */
+
+#ifndef SHARE_VM_CODE_NATIVEINST_HPP
+#define SHARE_VM_CODE_NATIVEINST_HPP
+
+#ifdef TARGET_ARCH_x86
+# include "nativeInst_x86.hpp"
+#endif
+#ifdef TARGET_ARCH_sparc
+# include "nativeInst_sparc.hpp"
+#endif
+#ifdef TARGET_ARCH_zero
+# include "nativeInst_zero.hpp"
+#endif
+#ifdef TARGET_ARCH_arm
+# include "nativeInst_arm.hpp"
+#endif
+#ifdef TARGET_ARCH_ppc
+# include "nativeInst_ppc.hpp"
+#endif
+
+#endif // SHARE_VM_CODE_NATIVEINST_HPP

hotspot/src/share/vm/code/vmreg.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1998, 2014, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -25,34 +25,13 @@
 #ifndef SHARE_VM_CODE_VMREG_HPP
 #define SHARE_VM_CODE_VMREG_HPP
 
+#include "asm/register.hpp"
 #include "memory/allocation.hpp"
 #include "utilities/globalDefinitions.hpp"
-#include "asm/register.hpp"
 
 #ifdef COMPILER2
 #include "opto/adlcVMDeps.hpp"
 #include "utilities/ostream.hpp"
-#ifdef TARGET_ARCH_MODEL_x86_32
-# include "adfiles/adGlobals_x86_32.hpp"
-#endif
-#ifdef TARGET_ARCH_MODEL_x86_64
-# include "adfiles/adGlobals_x86_64.hpp"
-#endif
-#ifdef TARGET_ARCH_MODEL_sparc
-# include "adfiles/adGlobals_sparc.hpp"
-#endif
-#ifdef TARGET_ARCH_MODEL_zero
-# include "adfiles/adGlobals_zero.hpp"
-#endif
-#ifdef TARGET_ARCH_MODEL_arm
-# include "adfiles/adGlobals_arm.hpp"
-#endif
-#ifdef TARGET_ARCH_MODEL_ppc_32
-# include "adfiles/adGlobals_ppc_32.hpp"
-#endif
-#ifdef TARGET_ARCH_MODEL_ppc_64
-# include "adfiles/adGlobals_ppc_64.hpp"
-#endif
 #endif
 
 //------------------------------VMReg------------------------------------------
@@ -107,7 +86,7 @@ public:
   // also a register you could use in the assembler. On machines with
   // 64bit registers only one half of the VMReg (and OptoReg) is considered
   // concrete.
-  bool is_concrete();
+  //  bool is_concrete();
 
   // VMRegs are 4 bytes wide on all platforms
   static const int stack_slot_size;

hotspot/src/share/vm/code/vmreg.inline.hpp

@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ *
+ */
+
+#ifndef SHARE_VM_CODE_VMREG_INLINE_HPP
+#define SHARE_VM_CODE_VMREG_INLINE_HPP
+
+#include "asm/register.hpp"
+#include "code/vmreg.hpp"
+#ifdef TARGET_ARCH_x86
+# include "vmreg_x86.inline.hpp"
+#endif
+#ifdef TARGET_ARCH_sparc
+# include "vmreg_sparc.inline.hpp"
+#endif
+#ifdef TARGET_ARCH_zero
+# include "vmreg_zero.inline.hpp"
+#endif
+#ifdef TARGET_ARCH_arm
+# include "vmreg_arm.inline.hpp"
+#endif
+#ifdef TARGET_ARCH_ppc
+# include "vmreg_ppc.inline.hpp"
+#endif
+
+#endif // SHARE_VM_CODE_VMREG_INLINE_HPP