8329254: optimize integral reverse operations on x86 GFNI target.

Reviewed-by: sviswanathan
This commit is contained in:
Jatin Bhateja 2024-04-11 06:28:26 +00:00
parent d9c84e763a
commit b04b3047ff
2 changed files with 4 additions and 4 deletions

View File

@ -2951,6 +2951,8 @@ uint64_t VM_Version::CpuidInfo::feature_flags() const {
if (sef_cpuid7_ecx1_eax.bits.avx_ifma != 0) if (sef_cpuid7_ecx1_eax.bits.avx_ifma != 0)
result |= CPU_AVX_IFMA; result |= CPU_AVX_IFMA;
} }
if (sef_cpuid7_ecx.bits.gfni != 0)
result |= CPU_GFNI;
if (sef_cpuid7_ebx.bits.avx512f != 0 && if (sef_cpuid7_ebx.bits.avx512f != 0 &&
xem_xcr0_eax.bits.opmask != 0 && xem_xcr0_eax.bits.opmask != 0 &&
xem_xcr0_eax.bits.zmm512 != 0 && xem_xcr0_eax.bits.zmm512 != 0 &&
@ -2976,8 +2978,6 @@ uint64_t VM_Version::CpuidInfo::feature_flags() const {
result |= CPU_AVX512_VPCLMULQDQ; result |= CPU_AVX512_VPCLMULQDQ;
if (sef_cpuid7_ecx.bits.vaes != 0) if (sef_cpuid7_ecx.bits.vaes != 0)
result |= CPU_AVX512_VAES; result |= CPU_AVX512_VAES;
if (sef_cpuid7_ecx.bits.gfni != 0)
result |= CPU_GFNI;
if (sef_cpuid7_ecx.bits.avx512_vnni != 0) if (sef_cpuid7_ecx.bits.avx512_vnni != 0)
result |= CPU_AVX512_VNNI; result |= CPU_AVX512_VNNI;
if (sef_cpuid7_ecx.bits.avx512_bitalg != 0) if (sef_cpuid7_ecx.bits.avx512_bitalg != 0)

View File

@ -5662,7 +5662,7 @@ instruct bytes_reversebit_int(rRegI dst, rRegI src, rRegI rtmp, rFlagsReg cr) %{
ins_pipe( ialu_reg ); ins_pipe( ialu_reg );
%} %}
instruct bytes_reversebit_int_gfni(rRegI dst, rRegI src, regF xtmp1, regF xtmp2, rRegL rtmp, rFlagsReg cr) %{ instruct bytes_reversebit_int_gfni(rRegI dst, rRegI src, vlRegF xtmp1, vlRegF xtmp2, rRegL rtmp, rFlagsReg cr) %{
predicate(VM_Version::supports_gfni()); predicate(VM_Version::supports_gfni());
match(Set dst (ReverseI src)); match(Set dst (ReverseI src));
effect(TEMP dst, TEMP xtmp1, TEMP xtmp2, TEMP rtmp, KILL cr); effect(TEMP dst, TEMP xtmp1, TEMP xtmp2, TEMP rtmp, KILL cr);
@ -5684,7 +5684,7 @@ instruct bytes_reversebit_long(rRegL dst, rRegL src, rRegL rtmp1, rRegL rtmp2, r
ins_pipe( ialu_reg ); ins_pipe( ialu_reg );
%} %}
instruct bytes_reversebit_long_gfni(rRegL dst, rRegL src, regD xtmp1, regD xtmp2, rRegL rtmp, rFlagsReg cr) %{ instruct bytes_reversebit_long_gfni(rRegL dst, rRegL src, vlRegD xtmp1, vlRegD xtmp2, rRegL rtmp, rFlagsReg cr) %{
predicate(VM_Version::supports_gfni()); predicate(VM_Version::supports_gfni());
match(Set dst (ReverseL src)); match(Set dst (ReverseL src));
effect(TEMP dst, TEMP xtmp1, TEMP xtmp2, TEMP rtmp, KILL cr); effect(TEMP dst, TEMP xtmp1, TEMP xtmp2, TEMP rtmp, KILL cr);