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8245047: [PPC64] C2: ReverseBytes + Load always match to unordered Load (acquire semantics missing)

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Introduce separate nodes with acquire semantics which match ReverseBytes + Load.acquire.

Reviewed-by: shade, lucy
This commit is contained in:
Martin Doerr 2020-05-19 15:11:58 +02:00
parent ebf928a0e7
commit b6fde85f33
1 changed files with 58 additions and 1 deletions
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59
src/hotspot/cpu/ppc/ppc.ad
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@ -13830,6 +13830,7 @@ instruct bytes_reverse_short_Ex(iRegIdst dst, iRegIsrc src) %{
// Load Integer reversed byte order
instruct loadI_reversed(iRegIdst dst, indirect mem) %{
match(Set dst (ReverseBytesI (LoadI mem)));
predicate(n->in(1)->as_Load()->is_unordered() || followed_by_acquire(n->in(1)));
ins_cost(MEMORY_REF_COST);
size(4);
@ -13839,10 +13840,23 @@ instruct loadI_reversed(iRegIdst dst, indirect mem) %{
ins_pipe(pipe_class_default);
%}
instruct loadI_reversed_acquire(iRegIdst dst, indirect mem) %{
match(Set dst (ReverseBytesI (LoadI mem)));
ins_cost(2 * MEMORY_REF_COST);
size(12);
ins_encode %{
__ lwbrx($dst$$Register, $mem$$Register);
__ twi_0($dst$$Register);
__ isync();
%}
ins_pipe(pipe_class_default);
%}
// Load Long - aligned and reversed
instruct loadL_reversed(iRegLdst dst, indirect mem) %{
match(Set dst (ReverseBytesL (LoadL mem)));
predicate(VM_Version::has_ldbrx());
predicate(VM_Version::has_ldbrx() && (n->in(1)->as_Load()->is_unordered() || followed_by_acquire(n->in(1))));
ins_cost(MEMORY_REF_COST);
size(4);
@ -13852,9 +13866,24 @@ instruct loadL_reversed(iRegLdst dst, indirect mem) %{
ins_pipe(pipe_class_default);
%}
instruct loadL_reversed_acquire(iRegLdst dst, indirect mem) %{
match(Set dst (ReverseBytesL (LoadL mem)));
predicate(VM_Version::has_ldbrx());
ins_cost(2 * MEMORY_REF_COST);
size(12);
ins_encode %{
__ ldbrx($dst$$Register, $mem$$Register);
__ twi_0($dst$$Register);
__ isync();
%}
ins_pipe(pipe_class_default);
%}
// Load unsigned short / char reversed byte order
instruct loadUS_reversed(iRegIdst dst, indirect mem) %{
match(Set dst (ReverseBytesUS (LoadUS mem)));
predicate(n->in(1)->as_Load()->is_unordered() || followed_by_acquire(n->in(1)));
ins_cost(MEMORY_REF_COST);
size(4);
@ -13864,9 +13893,23 @@ instruct loadUS_reversed(iRegIdst dst, indirect mem) %{
ins_pipe(pipe_class_default);
%}
instruct loadUS_reversed_acquire(iRegIdst dst, indirect mem) %{
match(Set dst (ReverseBytesUS (LoadUS mem)));
ins_cost(2 * MEMORY_REF_COST);
size(12);
ins_encode %{
__ lhbrx($dst$$Register, $mem$$Register);
__ twi_0($dst$$Register);
__ isync();
%}
ins_pipe(pipe_class_default);
%}
// Load short reversed byte order
instruct loadS_reversed(iRegIdst dst, indirect mem) %{
match(Set dst (ReverseBytesS (LoadS mem)));
predicate(n->in(1)->as_Load()->is_unordered() || followed_by_acquire(n->in(1)));
ins_cost(MEMORY_REF_COST + DEFAULT_COST);
size(8);
@ -13877,6 +13920,20 @@ instruct loadS_reversed(iRegIdst dst, indirect mem) %{
ins_pipe(pipe_class_default);
%}
instruct loadS_reversed_acquire(iRegIdst dst, indirect mem) %{
match(Set dst (ReverseBytesS (LoadS mem)));
ins_cost(2 * MEMORY_REF_COST + DEFAULT_COST);
size(16);
ins_encode %{
__ lhbrx($dst$$Register, $mem$$Register);
__ twi_0($dst$$Register);
__ extsh($dst$$Register, $dst$$Register);
__ isync();
%}
ins_pipe(pipe_class_default);
%}
// Store Integer reversed byte order
instruct storeI_reversed(iRegIsrc src, indirect mem) %{
match(Set mem (StoreI mem (ReverseBytesI src)));