6662967: Optimize I2D conversion on new x86
Use CVTDQ2PS and CVTDQ2PD for integer values conversions to float and double values on new AMD cpu. Reviewed-by: sgoldman, never
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@ -2672,6 +2672,22 @@ void Assembler::movlpd(XMMRegister dst, Address src) {
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emit_sse_operand(dst, src);
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}
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void Assembler::cvtdq2pd(XMMRegister dst, XMMRegister src) {
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assert(VM_Version::supports_sse2(), "");
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emit_byte(0xF3);
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emit_byte(0x0F);
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emit_byte(0xE6);
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emit_sse_operand(dst, src);
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}
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void Assembler::cvtdq2ps(XMMRegister dst, XMMRegister src) {
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assert(VM_Version::supports_sse2(), "");
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emit_byte(0x0F);
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emit_byte(0x5B);
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emit_sse_operand(dst, src);
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}
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emit_sse_instruction(andps, sse, 0, 0x54, XMMRegister, XMMRegister);
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emit_sse_instruction(andpd, sse2, 0x66, 0x54, XMMRegister, XMMRegister);
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@ -901,6 +901,8 @@ class Assembler : public AbstractAssembler {
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void cvtss2sd(XMMRegister dst, XMMRegister src);
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void cvtsd2ss(XMMRegister dst, Address src); // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
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void cvtsd2ss(XMMRegister dst, XMMRegister src);
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void cvtdq2pd(XMMRegister dst, XMMRegister src);
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void cvtdq2ps(XMMRegister dst, XMMRegister src);
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void cvtsi2ss(XMMRegister dst, Address src); // Convert Doubleword Integer to Scalar Single-Precision Floating-Point Value
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void cvtsi2ss(XMMRegister dst, Register src);
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@ -3372,6 +3372,21 @@ void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) {
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emit_byte(0xC0 | encode);
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}
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void Assembler::cvtdq2pd(XMMRegister dst, XMMRegister src) {
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emit_byte(0xF3);
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int encode = prefix_and_encode(dst->encoding(), src->encoding());
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emit_byte(0x0F);
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emit_byte(0xE6);
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emit_byte(0xC0 | encode);
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}
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void Assembler::cvtdq2ps(XMMRegister dst, XMMRegister src) {
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int encode = prefix_and_encode(dst->encoding(), src->encoding());
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emit_byte(0x0F);
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emit_byte(0x5B);
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emit_byte(0xC0 | encode);
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}
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void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) {
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emit_byte(0xF2);
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int encode = prefix_and_encode(dst->encoding(), src->encoding());
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@ -922,6 +922,8 @@ class Assembler : public AbstractAssembler {
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void cvttsd2siq(Register dst, XMMRegister src); // truncates
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void cvtss2sd(XMMRegister dst, XMMRegister src);
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void cvtsd2ss(XMMRegister dst, XMMRegister src);
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void cvtdq2pd(XMMRegister dst, XMMRegister src);
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void cvtdq2ps(XMMRegister dst, XMMRegister src);
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void pxor(XMMRegister dst, Address src); // Xor Packed Byte Integer Values
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void pxor(XMMRegister dst, XMMRegister src); // Xor Packed Byte Integer Values
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@ -321,6 +321,20 @@ void VM_Version::get_processor_features() {
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UseXmmRegToRegMoveAll = false;
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}
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}
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if( FLAG_IS_DEFAULT(UseXmmI2F) ) {
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if( supports_sse4a() ) {
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UseXmmI2F = true;
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} else {
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UseXmmI2F = false;
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}
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}
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if( FLAG_IS_DEFAULT(UseXmmI2D) ) {
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if( supports_sse4a() ) {
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UseXmmI2D = true;
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} else {
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UseXmmI2D = false;
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}
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}
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}
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if( is_intel() ) { // Intel cpus specific settings
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@ -265,6 +265,20 @@ void VM_Version::get_processor_features() {
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UseXmmRegToRegMoveAll = false;
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}
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}
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if( FLAG_IS_DEFAULT(UseXmmI2F) ) {
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if( supports_sse4a() ) {
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UseXmmI2F = true;
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} else {
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UseXmmI2F = false;
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}
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}
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if( FLAG_IS_DEFAULT(UseXmmI2D) ) {
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if( supports_sse4a() ) {
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UseXmmI2D = true;
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} else {
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UseXmmI2D = false;
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}
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}
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}
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if( is_intel() ) { // Intel cpus specific settings
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@ -10970,7 +10970,7 @@ instruct convI2D_reg(regD dst, stackSlotI src) %{
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%}
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instruct convI2XD_reg(regXD dst, eRegI src) %{
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predicate( UseSSE>=2 );
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predicate( UseSSE>=2 && !UseXmmI2D );
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match(Set dst (ConvI2D src));
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format %{ "CVTSI2SD $dst,$src" %}
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opcode(0xF2, 0x0F, 0x2A);
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@ -10987,6 +10987,20 @@ instruct convI2XD_mem(regXD dst, memory mem) %{
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ins_pipe( pipe_slow );
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%}
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instruct convXI2XD_reg(regXD dst, eRegI src)
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%{
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predicate( UseSSE>=2 && UseXmmI2D );
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match(Set dst (ConvI2D src));
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format %{ "MOVD $dst,$src\n\t"
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"CVTDQ2PD $dst,$dst\t# i2d" %}
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ins_encode %{
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__ movd($dst$$XMMRegister, $src$$Register);
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__ cvtdq2pd($dst$$XMMRegister, $dst$$XMMRegister);
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%}
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ins_pipe(pipe_slow); // XXX
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%}
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instruct convI2D_mem(regD dst, memory mem) %{
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predicate( UseSSE<=1 && !Compile::current()->select_24_bit_instr());
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match(Set dst (ConvI2D (LoadI mem)));
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@ -11062,7 +11076,7 @@ instruct convI2F_mem(regF dst, memory mem) %{
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// Convert an int to a float in xmm; no rounding step needed.
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instruct convI2X_reg(regX dst, eRegI src) %{
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predicate(UseSSE>=1);
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predicate( UseSSE==1 || UseSSE>=2 && !UseXmmI2F );
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match(Set dst (ConvI2F src));
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format %{ "CVTSI2SS $dst, $src" %}
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@ -11071,6 +11085,20 @@ instruct convI2X_reg(regX dst, eRegI src) %{
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ins_pipe( pipe_slow );
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%}
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instruct convXI2X_reg(regX dst, eRegI src)
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%{
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predicate( UseSSE>=2 && UseXmmI2F );
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match(Set dst (ConvI2F src));
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format %{ "MOVD $dst,$src\n\t"
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"CVTDQ2PS $dst,$dst\t# i2f" %}
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ins_encode %{
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__ movd($dst$$XMMRegister, $src$$Register);
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__ cvtdq2ps($dst$$XMMRegister, $dst$$XMMRegister);
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%}
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ins_pipe(pipe_slow); // XXX
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%}
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instruct convI2L_reg( eRegL dst, eRegI src, eFlagsReg cr) %{
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match(Set dst (ConvI2L src));
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effect(KILL cr);
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@ -10098,6 +10098,7 @@ instruct convD2L_reg_reg(rRegL dst, regD src, rFlagsReg cr)
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instruct convI2F_reg_reg(regF dst, rRegI src)
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%{
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predicate(!UseXmmI2F);
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match(Set dst (ConvI2F src));
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format %{ "cvtsi2ssl $dst, $src\t# i2f" %}
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@ -10118,6 +10119,7 @@ instruct convI2F_reg_mem(regF dst, memory src)
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instruct convI2D_reg_reg(regD dst, rRegI src)
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%{
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predicate(!UseXmmI2D);
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match(Set dst (ConvI2D src));
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format %{ "cvtsi2sdl $dst, $src\t# i2d" %}
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@ -10136,6 +10138,34 @@ instruct convI2D_reg_mem(regD dst, memory src)
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ins_pipe(pipe_slow); // XXX
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%}
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instruct convXI2F_reg(regF dst, rRegI src)
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%{
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predicate(UseXmmI2F);
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match(Set dst (ConvI2F src));
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format %{ "movdl $dst, $src\n\t"
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"cvtdq2psl $dst, $dst\t# i2f" %}
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ins_encode %{
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__ movdl($dst$$XMMRegister, $src$$Register);
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__ cvtdq2ps($dst$$XMMRegister, $dst$$XMMRegister);
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%}
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ins_pipe(pipe_slow); // XXX
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%}
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instruct convXI2D_reg(regD dst, rRegI src)
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%{
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predicate(UseXmmI2D);
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match(Set dst (ConvI2D src));
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format %{ "movdl $dst, $src\n\t"
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"cvtdq2pdl $dst, $dst\t# i2d" %}
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ins_encode %{
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__ movdl($dst$$XMMRegister, $src$$Register);
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__ cvtdq2pd($dst$$XMMRegister, $dst$$XMMRegister);
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%}
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ins_pipe(pipe_slow); // XXX
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%}
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instruct convL2F_reg_reg(regF dst, rRegL src)
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%{
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match(Set dst (ConvL2F src));
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@ -949,6 +949,12 @@ class CommandLineFlags {
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product(bool, UseXmmRegToRegMoveAll, false, \
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"Copy all XMM register bits when moving value between registers") \
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\
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product(bool, UseXmmI2D, false, \
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"Use SSE2 CVTDQ2PD instruction to convert Integer to Double") \
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\
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product(bool, UseXmmI2F, false, \
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"Use SSE2 CVTDQ2PS instruction to convert Integer to Float") \
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\
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product(intx, FieldsAllocationStyle, 1, \
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"0 - type based with oops first, 1 - with oops last") \
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\
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