8324123: aarch64: fix prfm literal encoding in assembler

Reviewed-by: aph, dlong
This commit is contained in:
Wang Zhuo 2024-01-26 02:30:49 +00:00 committed by Denghui Dong
parent b5995a76f7
commit bde87895c8
2 changed files with 22 additions and 11 deletions

@ -187,6 +187,26 @@ void Address::lea(MacroAssembler *as, Register r) const {
zrf(Rd, 0);
}
// This encoding is similar (but not quite identical) to the encoding used
// by literal ld/st. see JDK-8324123.
// PRFM does not support writeback or pre/post index.
void Assembler::prfm(const Address &adr, prfop pfop) {
Address::mode mode = adr.getMode();
// PRFM does not support pre/post index
guarantee((mode != Address::pre) && (mode != Address::post), "prfm does not support pre/post indexing");
if (mode == Address::literal) {
starti;
f(0b11, 31, 30), f(0b011, 29, 27), f(0b000, 26, 24);
f(pfop, 4, 0);
int64_t offset = (adr.target() - pc()) >> 2;
sf(offset, 23, 5);
} else {
assert((mode == Address::base_plus_offset)
|| (mode == Address::base_plus_offset_reg), "must be base_plus_offset/base_plus_offset_reg");
ld_st2(as_Register(pfop), adr, 0b11, 0b10);
}
}
// An "all-purpose" add/subtract immediate, per ARM documentation:
// A "programmer-friendly" assembler may accept a negative immediate
// between -(2^24 -1) and -1 inclusive, causing it to convert a

@ -797,6 +797,8 @@ public:
void adrp(Register Rd, const Address &dest, uint64_t &offset) = delete;
void prfm(const Address &adr, prfop pfop = PLDL1KEEP);
#undef INSN
void add_sub_immediate(Instruction_aarch64 &current_insn, Register Rd, Register Rn,
@ -1574,17 +1576,6 @@ public:
#undef INSN
#define INSN(NAME, size, op) \
void NAME(const Address &adr, prfop pfop = PLDL1KEEP) { \
ld_st2(as_Register(pfop), adr, size, op); \
}
INSN(prfm, 0b11, 0b10); // FIXME: PRFM should not be used with
// writeback modes, but the assembler
// doesn't enfore that.
#undef INSN
#define INSN(NAME, size, op) \
void NAME(FloatRegister Rt, const Address &adr) { \
ld_st2(as_Register(Rt), adr, size, op, 1); \